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US20140151636 SINGLE-WALLED CARBON NANOTUBES/QUANTUM DOT HYBRID STRUCTURES AND METHODS OF MAKING AND USE OF THE HYBRID STRUCTURES  
Briefly described, embodiments of the present disclosure relate to structures including single-walled carbon nanotube/quantum dot networks, devices including the structures, and methods of making...
US20120280208 QUANTUM DOT CHANNEL (QDC) QUANTUM DOT GATE TRANSISTORS, MEMORIES AND OTHER DEVICES  
This invention describes a field-effect transistor in which the channel is formed in an array of quantum dots. In one embodiment the quantum dots are cladded with a thin layer serving as an energy...
US20140264273 SUPERLATTICE CRENELATED GATE FIELD EFFECT TRANSISTOR  
The present invention is directed to a device comprising an epitaxial structure comprising a superlattice structure having an uppermost 2DxG channel, a lowermost 2DxG channel and at least one...
US20140291615 EXTREME HIGH MOBILITY CMOS LOGIC  
A CMOS device includes a PMOS transistor with a first quantum well structure and an NMOS device with a second quantum well structure. The PMOS and NMOS transistors are formed on a substrate.
US20130328015 EXTREME HIGH MOBILITY CMOS LOGIC  
A CMOS device includes a PMOS transistor with a first quantum well structure and an NMOS device with a second quantum well structure. The PMOS and NMOS transistors are formed on a substrate.
US20120199813 EXTREME HIGH MOBILITY CMOS LOGIC  
A CMOS device includes a PMOS transistor with a first quantum well structure and an NMOS device with a second quantum well structure. The PMOS and NMOS transistors are formed on a substrate.
US20140084245 QUANTUM DOT ARRAY DEVICES WITH METAL SOURCE AND DRAIN  
Metal quantum dots are incorporated into doped source and drain regions of a MOSFET array to assist in controlling transistor performance by altering the energy gap of the semiconductor crystal....
US20100181551 Quantum dot transistor  
One or more quantum dots are used to control current flow in a transistor. Instead of being disposed in a channel between source and drain, the quantum dot (or dots) are vertically separated from...
US20050145838 Vertical Carbon Nanotube Field Effect Transistor  
A field effect transistor employs a vertically oriented carbon nanotube as the transistor body, the nanotube being formed by deposition within a vertical aperture, with an optional combination of...
US20060138397 Manipulation of conductive and magnetic phases in an electron trapping semiconducting  
A semiconductor strip array that can be configured to exhibit distinct electrical and/or magnetic phase characteristics according to the many-body effects phenomenon in electron gases is...
US20120256166 DEPOSITION OF NANOPARTICLES  
The invention relates to a process for deposition of elongated nanoparticles from a liquid carrier onto a substrate, and to electronic devices prepared by this process.
US20100006821 NANOSCALE MULTI-JUNCTION QUANTUM DOT DEVICE AND FABRICATION METHOD THEREOF  
The present invention relates to a method of fabricating a nanoscale multi-junction quantum dot device wherein it can minimize constraints depending on the number or shape of patterns and a line...
US20120199812 STRAIN TUNABLE SILICON AND GERMANIUM NANOWIRE OPTOELECTRONIC DEVICES  
Silicon, silicon-germanium alloy, and germanium nanowire optoelectronic devices and methods for fabricating the same are provided. According to one embodiment, a P-I-N device is provided that...
US20120229167 Twin-Drain Spatial Wavefunction Switched Field-Effect Transistors  
A field-effect transistor is provided and includes source, gate and drain regions, where the gate region controls charge carrier location in the transport channel, the transport channel includes a...
US20110316565 SCHOTTKY JUNCTION SI NANOWIRE FIELD-EFFECT BIO-SENSOR/MOLECULE DETECTOR  
A Schottky junction silicon nanowire field-effect biosensor/molecule detector with a nanowire thickness of 10 nanometer or less and an aligned source/drain workfunction for increased sensitivity....
US20050006639 Semiconductor electronic devices and methods  
Embodiments disclosed herein include electronic device designs based upon electronic properties of Group III-N materials and quantum-mechanical effects of specialized heterostructures. Such...
US20130313520 APPARATUS AND METHODS FOR IMPROVING PARALLEL CONDUCTION IN A QUANTUM WELL DEVICE  
Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.
US20120032146 APPARATUS AND METHODS FOR IMPROVING PARALLEL CONDUCTION IN A QUANTUM WELL DEVICE  
Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.
US20060071205 Nanocrystal switch  
A switch comprises a set of electrodes with a nanocrystal channel disposed between the electrodes. The nanocrystal channel has bridges between conductive nanocrystals. A gate electrode is disposed...
US20110309330 2-dimensional quantum wire array field effect transistor/power-transistor/switch/photo-cell  
One, groups of several or many parallel vertical quantum wires arranged as 2-dimensional array interconnecting the source and drain of a transistor, are modulated with respect to their...
US20150021552 III-NITRIDE TRANSISTOR INCLUDING A P-TYPE DEPLETING LAYER  
A transistor includes a III-N layer structure comprising a III-N channel layer between a III-N barrier layer and a p-type III-N layer. The transistor further includes a source, a drain, and a gate...
US20150108429 CARBON NANOTUBE PRINTED ELECTRONICS DEVICES  
Electronic devices include a network of purified and randomly aligned carbon nanotubes. The electronic devices include conductive regions that comprise conductive inks, and substrates such as...
US20100084631 Phase-controlled field effect transistor device and method for manufacturing thereof  
A phase controllable field effect transistor device is described. The device provides first and second scattering sites disposed at either side of a conducting channel region, the conducting...
US20090003028 Carbon nanotube fuse element  
In one embodiment of the invention, a fuse element for a one time programmable memory may include carbon nanotubes coupled to a first transistor node and to a second transistor node. The carbon...
US20100090197 METHOD OF MANUFACTURING SEMICONDUCTOR NANOWIRE SENSOR DEVICE AND SEMICONDUCTOR NANOWIRE SENSOR DEVICE MANUFACTURED ACCORDING TO THE METHOD  
Provided are a method of manufacturing a semiconductor nanowire sensor device and a semiconductor nanowire sensor device manufactured according to the method. The method includes preparing a first...
US20130082240 HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME  
A high electron mobility transistor (HEMT) includes a substrate, an HEMT stack spaced apart from the substrate, and a pseudo-insulation layer (PIL) disposed between the substrate and the HEMT...
US20080061285 Metal layer inducing strain in silicon  
A metal layer, especially a metal compound, induces strain into a gate channel of a MOS transistor. Compressive strain of over 4 GPa is available from sputter deposited TiN. The amount of strain...
US20110147706 TECHNIQUES AND CONFIGURATIONS TO IMPART STRAIN TO INTEGRATED CIRCUIT DEVICES  
Embodiments of the present disclosure describe techniques and configurations to impart strain to integrated circuit devices such as horizontal field effect transistors. An integrated circuit...
US20100224861 Twin-drain spatial wavefunction switched field-effect transistors  
A field-effect transistor is provided and includes source, gate and drain regions, where the gate region controls charge carrier location in the transport channel, the transport channel includes a...
US20150123076 QUANTUM CASCADE DETECTOR  
A quantum cascade detector includes a semiconductor substrate, and an active layer formed by laminating unit laminate structures each having an absorption region with a first barrier layer to a...
US20150155357 III-Nitride Semiconductor Structures with Strain Absorbing Interlayers  
There are disclosed herein various implementations of semiconductor structures including III-Nitride interlayer modules. One exemplary implementation comprises a substrate and a first transition...
US20100096619 ELECTRONIC DEVICES USING CARBON NANOTUBES HAVING VERTICAL STRUCTURE AND THE MANUFACTURING METHOD THEREOF  
Provided are an electronic device to which vertical carbon nanotubes (CNTs) are applied and a method of manufacturing the same. The method of manufacturing an electronic device having a vertical...
US20140326951 FIELD EFFECT POWER TRANSISTORS  
A normally OFF field effect transistor (FET) comprising: a plurality of contiguous nitride semiconductor layers having different composition and heterojunction interfaces between contiguous...
US20080012004 SPINTRONIC DEVICES WITH CONSTRAINED SPINTRONIC DOPANT  
A spintronic device may include at least one superlattice and at least one electrical contact coupled thereto, with the at least one superlattice including a plurality of groups of layers. Each...
US20150221779 THIN FILM TRANSISTOR AND METHOD FOR PRODUCING SAME  
A thin film transistor is equipped with a silicon substrate, a channel layer, a source electrode and a drain electrode. The channel layer, the source electrode and the drain electrode are arranged...
US20090032802 MOSFET DEVICE FEATURING A SUPERLATTICE BARRIER LAYER AND METHOD  
A method of forming a semiconductor structure comprises forming a channel layer; forming a superlattice barrier layer overlying the channel layer, and forming a gate dielectric overlying the...
US20080017844 Low-Temperature-Grown (Ltg) Insulated-Gate Phemt Device and Method  
A pseudomorphic-high-electron-mobility-transistor (PHEMT) includes a substrate, a low-temperature-grown (LTG) GaAs gate-insulator layer disposed on the substrate, and a gate electrode disposed on...
US20110233520 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
There is provided a semiconductor device including a base substrate; a semiconductor layer formed on the base substrate and having a mesa protrusion including a receiving groove; a source...
US20130207078 InGaN-Based Double Heterostructure Field Effect Transistor and Method of Forming the Same  
A double heterojunction field effect transistor (DHFET) includes a substrate, a buffer layer consisting of GaN back-barrier buffer layer formed on the substrate, a channel layer consisting of an...
US20080179588 SEMICONDUCTOR DEVICE INCLUDING A METAL-TO-SEMICONDUCTOR SUPERLATTICE INTERFACE LAYER AND RELATED METHODS  
A semiconductor device which may include a semiconductor layer, and a superlattice interface layer therebetween. The superlattice interface layer may include a plurality of stacked groups of...
US20140175379 EPITAXIAL FILM ON NANOSCALE STRUCTURE  
An embodiment of the invention includes an epitaxial layer that directly contacts, for example, a nanowire, fin, or pillar in a manner that allows the layer to relax with two or three degrees of...
US20100270535 ELECTRONIC DEVICE INCLUDING AN ELECTRICALLY POLLED SUPERLATTICE AND RELATED METHODS  
A method for making an electronic device may include forming a selectively polable superlattice comprising a plurality of stacked groups of layers. Each group of layers of the selectively polable...
US20100243989 SEMICONDUCTOR DEVICE  
A semiconductor device includes a substrate, a superlattice buffer layer that is formed on the substrate and is composed of first AlxGa1-xN layers and second AlxGa1-xN layers having an Al...
US20100213440 Silicon-Quantum-Dot Semiconductor Near-Infrared Photodetector  
A mesoporous silica having adjustable pores is obtained to form a template and thus a three-terminal metal-oxide-semiconductor field-effect transistor (MOSFET) photodetector is obtained. A gate...
US20100127241 Electronic Devices with Carbon Nanotube Components  
An electronic device has a source electrode, a drain electrode spaced apart from said source electrode, and at least one of a conducting material, dielectric material and a semiconductor material...
US20100108987 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
A CNT channel layer of a transistor is cut along a direction perpendicular to the channel to form a plurality of CNT patches, which are used to connect between a source and a drain. The...
US20170170093 METHOD OF FORMING AN INTEGRATED CIRCUIT WITH HEAT-MITIGATING DIAMOND-FILLED CHANNELS  
An integrated circuit and method of forming the integrated circuit, including the steps of forming channels partially into a thickness of a semiconductor layer or through the thickness of the...
US20170162683 SEMICONDUCTOR DEVICE  
A semiconductor device includes a first nitride semiconductor layer formed over a substrate, a second nitride semiconductor layer formed over the first nitride semiconductor layer, a third nitride...
US20170141187 NITRIDE COMPOUND SEMICONDUCTOR  
A nitride compound semiconductor has a substrate and a nitride compound semiconductor stack on the substrate. The nitride compound semiconductor stack includes a multilayer buffer layer, a channel...
US20170117494 SINGLE-WALLED CARBON NANOTUBES/QUANTUM DOT HYBRID STRUCTURES AND METHODS OF MAKING AND USE OF THE HYBRID STRUCTURES  
Briefly described, embodiments of the present disclosure relate to structures including single-walled carbon nanotube/quantum dot networks, devices including the structures, and methods of making...
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