Title:
***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Image sensing and printing device
United States Patent 9036162


Abstract:
An image sensing and printing digital camera device includes a housing defining a slot for receiving a printed instruction card having printed thereon an array of dots representing a programming script, the housing further storing therein a roll of print media; an area image sensor for sensing an image and generating pixel data representing the image; a linear image sensor for scanning the array of dots on the card and converting the array of dots into a data signal; a microcontroller provided in the housing, the microcontroller for decoding the data signal into the programming script and applying the programming script on the pixel data; and a printing mechanism for printing the pixel data, having applied thereto the programming script, on the roll of print media. The microcontroller integrates on a single chip a VLIW processor, a printhead interface, and an output buffer effecting communication between the VLIW processor and the printhead interface.



Inventors:
Silverbrook, Kia (Balmain, AU)
Application Number:
13/540613
Publication Date:
05/19/2015
Filing Date:
07/03/2012
Assignee:
Google Inc. (Mountain View, CA, US)
Primary Class:
Other Classes:
358/1.3, 358/1.18, 358/1.8, 358/501, 358/505, 358/514, 358/530, 358/401, 358/448, 358/474, 358/483, 358/498, 358/296, 358/909.1, 348/207.99, 348/207.2, 348/222.1, 348/374, 396/229, 717/149
International Classes:
G06F3/12; G06K15/02; H04N1/54; H04N1/56; H04N1/034; G06F13/00; G06F15/16; H04N1/00; B41J2/14; B41J2/16; B41J2/175; B41J3/44; B41J11/00; B41J11/70; B41J15/04; B41J29/02; B82Y30/00; G03B17/02; G03B27/02; G06F1/16; G06F12/08; G06F21/79; G06F21/86; G06K1/12; G06K7/10; G06K7/14; G06K19/06; G06K19/073; G06T1/20; G06T3/00; G07F7/08; G07F7/12; G11C11/56; G11C16/22; H01L23/00; H04N1/21; H04N1/23; H04N1/32; H04N5/225; H04N5/262; H04N5/335; H04N9/04; B42D25/00; B42D15/02; B41J2/165; B41J2/04; H04N101/00; H05K1/14; H05K1/18
Field of Search:
358/1.1, 358/1.3, 358/1.18, 358/1.8, 358/501, 358/505, 358/514, 358/530, 358/401, 358/448, 358/474, 358/483, 358/498, 358/296, 358/909.1, 396/229, 717/149, 348/207.99, 348/207.2, 348/222.1, 348/374
View Patent Images:
US Patent References:
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6294101Method of manufacture of a thermoelastic bend actuator ink jet printerSeptember, 2001Silverbrook
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6276850Sticker printing camera deviceAugust, 2001Silverbrook et al.
6275239Media coprocessor with graphics video and audio tasks partitioned by time division multiplexingAugust, 2001Ezer et al.
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6273340Coding method, coding equipment and resulting coded productAugust, 2001Rivailler
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6238044Print cartridgeMay, 2001Silverbrook
6238043Ink cartridge for compact printer systemMay, 2001Silverbrook
6238033Reusable camera system which authenticates a refill stationMay, 2001Silverbrook
6236433Scaling algorithm for efficient color representation/recovery in videoMay, 2001Acharya et al.
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6203147Electrical and fluidic interface for an ink supplyMarch, 2001Battey et al.
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6178271Methods and systems for registering image dataJanuary, 2001Maas, III
6177683Portable viewer for invisible bar codesJanuary, 2001Kolesar et al.
6172706Video camera with automatic zoom adjustment based on distance between user's eyesJanuary, 2001Tatsumi
6172688Printer and printing methodJanuary, 2001Iwasaki
6170943Large and small format ink jet printing apparatusJanuary, 2001Wen et al.
6169854Display device connectable to a cameraJanuary, 2001Hasegawa et al.
6167806Device for controlling the printing of one or more webs of material in a rotary printing pressJanuary, 2001Chretinat et al.
6167551DVD controller with embedded DRAM for ECC-block bufferingDecember, 2000Nguyen et al.
6166832Contact-type image sensorDecember, 2000Fujimoto
6166826Printing apparatus, printing method, and printing systemDecember, 2000Yokoyama
6163361Digital camera including a printer for receiving a cartridge having security control circuitryDecember, 2000McIntyre et al.
6163340Automatic focus adjusting deviceDecember, 2000Yasuda
6163338Apparatus and method for recapture of realtime eventsDecember, 2000Johnson et al.
6161915Identification of thermal inkjet printer cartridgesDecember, 2000Bolash et al.
6161203Communication system utilizing Reed-Solomon code to achieve auto frame synchronization acquistionDecember, 2000Zuranski et al.
6160642Integrated printer and scanner deviceDecember, 2000Mui et al.
6160633Code printing apparatus for printing an optically readable code image at set positions on a print mediumDecember, 2000Mori
6158907PC card printerDecember, 2000Silverbrook et al.
6157394Flexible digital image processing via an image processing chain with modular image processorsDecember, 2000Anderson et al.
6154254Electronic camera for producing a digital image having a multimode microfluidic printing deviceNovember, 2000Hawkins et al.
6152619Portable camera with an ink jet printer and cutting bladeNovember, 2000Silverbrook
6152374Method for renting fabric articles and data code-printed sheetNovember, 2000Moriyama et al.
6151049Liquid discharge head, recovery method and manufacturing method for liquid discharge head, and liquid discharge apparatus using liquid discharge headNovember, 2000Karita et al.
6149256Insertable cartridge for digital camera with ink jet printerNovember, 2000McIntyre et al.
6147704Image processing system having a selector for selecting a picked-up image or a stored image for displayNovember, 2000Ito et al.
6147682Monitor for use with computer system and method of controlling supply of power to computer peripherals connected with the monitorNovember, 2000Kim
6145025Method for transferring DMA data in a multimedia intergrated circuit including preloading DMA instructions in a frame bufferNovember, 2000Lim
6144414Image recording and reproduction apparatusNovember, 2000Toba
6141431Image processing apparatusOctober, 2000Munetsugu et al.
6141036Image recording and reproducing apparatusOctober, 2000Katayama et al.
6137525Personal data communication apparatusOctober, 2000Lee et al.
6137521Information recording apparatus and information recording methodOctober, 2000Matsui
6137509Recording apparatus having a substrate for a recording head and method of producing the sameOctober, 2000Hayasaki
6137495Method for storing, accessing, transforming, and displaying multi-variable digital dataOctober, 2000Gondek
6136212Polymer-based micromachining for microfluidic devicesOctober, 2000Mastrangelo et al.
6135586Large area inkjet printheadOctober, 2000McClelland et al.
6134353Digital image processing method for automatic extraction of strip-shaped objectsOctober, 2000Makram-Ebeid
6134339Method and apparatus for determining the position of eyes and for correcting eye-defects in a captured frameOctober, 2000Luo
6134030Image reading apparatus and image reading unit and control apparatusOctober, 2000Kaneko et al.
6133954Integrated circuit color chip with cells with integral color filters including triplets of photodiodes with each having integrated therewith transistors for reading from and writing to the photodiode and methods of manufacture and operation thereofOctober, 2000Jie et al.
6133951Still-video camera with function setting operationOctober, 2000Miyadera
6131807Information recording medium and information reproduction systemOctober, 2000Fukuda et al.
6128446Method and apparatus for annotation of photographic film in a cameraOctober, 2000Schrock et al.
6128035Anti-blur image pickup deviceOctober, 2000Kai et al.
6126268Multi-chamber ink supplyOctober, 2000Askeland et al.
6124892Panhead device for movably supporting an apparatusSeptember, 2000Nakano
6123263Hand held dataform reader having strobing ultraviolet light illumination assembly for reading fluorescent dataformsSeptember, 2000Feng
6122526Cellular telephone and electronic camera system with programmable transmission capabilitySeptember, 2000Parulski et al.
6122403Computer system linked by using information in data objectsSeptember, 2000Rhoads
6121990Printing apparatus and cartridgeSeptember, 2000Fujiwara
6120379Portable game machine and portable game machine cartridgeSeptember, 2000Tanaka et al.
6119944Down-loadable hand-held optical readerSeptember, 2000Mulla et al.
6119931System and method for requesting and dispensing negotiable instrumentsSeptember, 2000Novogrod
6118554Image reading apparatus incorporating connector board for electrical connection and testingSeptember, 2000Horaguchi
6118485Card type camera with image processing functionSeptember, 2000Hinoue et al.
6118484Imaging apparatusSeptember, 2000Yokota et al.
6116715Device and method for sensing low ink level in an ink cartridge of a postage meterSeptember, 2000Lefebvre et al.
6116510Code reading and recording apparatusSeptember, 2000Nishino
6115837Dual-column syndrome generation for DVD error correction using an embedded DRAMSeptember, 2000Nguyen et al.
6115137Image processing system, digital camera, and printing apparatusSeptember, 2000Ozawa et al.
6115131Embedded display list interpreter for multiprocessor-based printerSeptember, 2000Payne
6111605Digital still video camera, image data output system for digital still video camera, frame for data relay for digital still video camera, data transfer system for digital still video camera, and image regenerating apparatusAugust, 2000Suzuki
6111598System and method for producing and displaying spectrally-multiplexed images of three-dimensional imagery for use in flicker-free stereoscopic viewing thereofAugust, 2000Faris
6107988Portable electronic apparatusAugust, 2000Phillipps
6106147Re-writeable optical card reader/writer unit using ink dots for data storageAugust, 2000Silverbrook
6104430Digital electronic still camera which receives an input/output control program through a detachable communication interface cardAugust, 2000Fukuoka
6102505Recording audio and electronic imagesAugust, 2000McIntyre et al.
61022891D finder pattern for 2D bar codesAugust, 2000Gabrielson
6097431Method and system for reviewing and navigating among images on an image capture unitAugust, 2000Anderson et al.
6095633Process for priming a multi-chamber ink jet print headAugust, 2000Harshbarger et al.
6095566Image recorded product, image recording system, image reproducing system, and recording medium for use to superimpose-record/reproduce additional informationAugust, 2000Yamamoto et al.
6095418Apparatus for processing symbol-encoded document informationAugust, 2000Swartz et al.
6094282Camera capable of recording and reproducing a photographed imageJuly, 2000Hoda et al.358/401
6094280Method and apparatus for correcting print density by printhead, printhead corrected by this apparatus, and printing apparatus using this printheadJuly, 2000Hayasaki et al.
6094279System and process for non-perceptibly integrating sound data into a printed imageJuly, 2000Soscia
6094223Automatic focus sensing deviceJuly, 2000Kobayashi
6094221System and method for using a scripting language to set digital camera device featuresJuly, 2000Anderson
6091909Battery control for digital camera and integral printerJuly, 2000McIntyre et al.
6091514Ink jet recording apparatus recording images when an ink jet recording head is installed thereon and reading images when an image reading head is installed thereonJuly, 2000Hasegawa et al.
6088530Method of recycling one-time-use cameraJuly, 2000Rydelek et al.
6088025Terminal device with built-in image sensorJuly, 2000Akamine et al.
6087638Corrugated MEMS heater structureJuly, 2000Silverbrook
6085037APS camera structure for film preloadingJuly, 2000Zawodny et al.
6084713Lenticular optical systemJuly, 2000Rosenthal
6082581Business card dispenserJuly, 2000Anderson et al.
6081422Universal mount for computer peripheral deviceJune, 2000Ganthier et al.
6081284Recording apparatus with plural ink tank configurationsJune, 2000Tosaka et al.
6078758Printing and decoding 3-D sound data that has been optically recorded onto the film at the time the image is capturedJune, 2000Patton et al.
6078307Method for increasing luminance resolution of color panel display systemsJune, 2000Daly
6076913Optical encoding of printhead service moduleJune, 2000Garcia et al.
6075882System and method for optically inspecting cigarettes by detecting the lengths of cigarette sectionsJune, 2000Mullins et al.
6074111Printing system, photographing apparatus, printing apparatus and combining methodJune, 2000Kasahara et al.
6074042Ink container having a guide feature for insuring reliable fluid, air and electrical connections to a printing systemJune, 2000Gasvoda et al.
6073034Wireless telephone display systemJune, 2000Jacobsen
6072586Computer program product for storing preselected zoom and crop dataJune, 2000Bhargava et al.
6069642Cassette for holding ink ribbon and print paper therein and printer incorporating the cassette thereinMay, 2000Isobe
6067088Image processing method and apparatus thereofMay, 2000Tanioka et al.
6064492Image data interface between digital front end and printerMay, 2000Eldridge et al.
6062681Bubble valve and bubble valve-based pressure regulatorMay, 2000Field et al.
6062667Ink jet recording apparatus constructed to detect a properly mounted ink cartridgeMay, 2000Matsui et al.
6061179Stereoscopic image display apparatus with two-/three-dimensional image display switching functionMay, 2000Inoguchi et al.
6058498Dot code and information recording/reproducing system for recording/reproducing the sameMay, 2000Nagasaki et al.
6057850Blended texture illumination mappingMay, 2000Kichury
6056286Automatic cut-sheet feederMay, 2000Koga
6053407Maxicode data extraction using spatial domain featuresApril, 2000Wang et al.
6052648Method and system for display of weather-related informationApril, 2000Burfeind et al.
6050669Method of controlling an ink-jet recording apparatus according to recording apparatus in which the method is implementedApril, 2000Yano et al.
6049450Portable computer on which a communication device can be mountedApril, 2000Cho et al.
6048269Coinless slot machine system and methodApril, 2000Burns et al.
6047130Apparatus and method for portrait photographyApril, 2000Oles
6046768Apparatus used for image blur preventionApril, 2000Kaneda et al.
6044428Configurable universal serial bus nodeMarch, 2000Rayabhari
6043821Method and apparatus for rendering pixel information from blended texture mapsMarch, 2000Sprague et al.
6042213Method and apparatus for correcting printhead, printhead corrected by this apparatus, and printing apparatus using this printheadMarch, 2000Hayasaki
6040849Insertable thermal printer cartridges for digital cameraMarch, 2000McIntyre et al.
6039430Method and apparatus for storing and retrieving information on a replaceable printing componentMarch, 2000Helterline et al.
6038491Monitoring and reporting system using cellular carriersMarch, 2000McGarry et al.
6037915Optical reproducing system for multimedia informationMarch, 2000Matsueda et al.
6035214Laptop computer with integrated telephoneMarch, 2000Henderson
6034740Keying system and composite image producing methodMarch, 2000Mitsui et al.
6033137Ink jet printing apparatus performing printing with correction of image data at boundary portion of imageMarch, 2000Ito
6032861Method and apparatus for encoding and decoding bar codes with primary and secondary information and method of using such bar codesMarch, 2000Lemelson et al.
6028611Modular digital image processing via an image processing chainFebruary, 2000Anderson et al.
6023757Data processorFebruary, 2000Nishimoto et al.
6023524Method for determining amount of exposureFebruary, 2000Yamaguchi
6022274Video game system using memory moduleFebruary, 2000Takeda et al.
6022099Ink printing with drop separationFebruary, 2000Chwalek et al.
6020931Video composition and position system and media signal communication systemFebruary, 2000Bilbrey et al.
6020920Method and system for speculative decompression of compressed image data in an image capture unitFebruary, 2000Anderson
6020898Information display system for displaying time-series numerical values and graph simultaneouslyFebruary, 2000Saito et al.
6019466Multicolor liquid ink printer and method for printing on plain paperFebruary, 2000Hermanson
6019461Printer and printing cartridge thereforFebruary, 2000Yoshimura et al.
6019449Apparatus controlled by data from consumable parts with incorporated memory devicesFebruary, 2000Bullock et al.
RE36589Audio data recording system for recording voice data as an optically readable code on a recording medium for recording still image data photographed by a cameraFebruary, 2000Akamine et al.
6016184Filing system and reproduction apparatusJanuary, 2000Haneda
6015211Portable printing device with shutter for covering print headJanuary, 2000Kinoshita et al.
6014457Image processing apparatusJanuary, 2000Kubo et al.
6014170Information processing apparatus and methodJanuary, 2000Pont et al.
6014165Apparatus and method of producing digital image with improved performance characteristicJanuary, 2000McIntyre et al.
6011937Assembly of a printer and its consumption tank for business machineJanuary, 2000Chaussade et al.
6011923Single use camera having flexure of a front cover constrained by an exposed-film doorJanuary, 2000Solomon et al.
6011585Apparatus and method for rotating the display orientation of a captured imageJanuary, 2000Anderson
6011536Method and system for generating an image having a hand-painted appearanceJanuary, 2000Hertzmann et al.
6010065Service method for automated banking machineJanuary, 2000Ramachandran et al.
6009188Method and system for digital plenoptic imagingDecember, 1999Cohen et al.
6007195Scanner printer connectable to a PCMCIA card slot of an external computer and method for connecting a scanning printer to a PCMCIA card slot of an external computerDecember, 1999Kokubo
6006039Method and apparatus for configuring a camera through external meansDecember, 1999Steinberg et al.
6006020Video peripheral circuitry exercising bus master control over a bus of a host computerDecember, 1999Cutter
6005613Multi-mode digital camera with computer interface using data packets combining image and mode dataDecember, 1999Endsley et al.
6005582Method and system for texture mapping images with anisotropic filteringDecember, 1999Gabriel et al.
6000791Printer having a removable print cartridge with handle incorporating an ink inlet valueDecember, 1999Scheffelin et al.
6000773Ink jet printer having ink use information stored in a memory mounted on a replaceable printer ink cartridgeDecember, 1999Murray et al.
6000621Tilings of mono-code and dual-code embedded data pattern strips for robust asynchronous captureDecember, 1999Hecht et al.
6000614Two-dimensional code reading apparatusDecember, 1999Yang et al.
5999697Apparatus for recording and/or reproducing still imagesDecember, 1999Murase et al.
5999203Printer assembly with easily loaded paper cartridgeDecember, 1999Cane et al.
5999190Computer imaging using graphics componentsDecember, 1999Sheasby et al.
5997124Method and apparatus for drop volume normalization in an ink jet printing operationDecember, 1999Capps et al.
5996893Method and apparatus for visually identifying an area on a photograph or image where digital data is storedDecember, 1999Soscia
5995772Imaging apparatus cartridge including an encoded deviceNovember, 1999Barry et al.
5995193Self-contained device for recording data encoded either in visible or invisible formNovember, 1999Stephany et al.
5992994Large inkjet print swath media support systemNovember, 1999Rasmussen et al.
5991865MPEG motion compensation using operand routing and performing add and divide in a single instructionNovember, 1999Longhenry et al.
5991429Facial recognition system for security access and identificationNovember, 1999Coffin et al.
5990973Red-eye detection/retouch apparatusNovember, 1999Sakamoto
5990948Noise cancelling circuit for pixel signals and an image pickup device using the noise cancelling circuitNovember, 1999Sugiki
5990469Control circuit for image array sensorsNovember, 1999Bechtel et al.
5989678Method of simultaneously printing a portion of a hook and loop fabric and attaching the fabric to another fabric and the fabric or garment resulting therefromNovember, 1999Jacobson
5989010Matrix bed for generating non-planar reaction wave fronts, and method thereofNovember, 1999Martin et al.
5988900Hand-held sweep electronic printer with compensation for non-linear movementNovember, 1999Bobry
5986718Photographic method using chroma-key and a photobooth employing the sameNovember, 1999Barwacz et al.
5986706Electronic apparatusNovember, 1999Hirasawa
5986698Image sensing apparatus with a moving image mode and a still image modeNovember, 1999Nobuoka
5986671Method of combining two digitally generated imagesNovember, 1999Fredlund et al.
5986634Display/monitor with orientation dependent rotatable imageNovember, 1999Alioshin et al.
5984193Printer media with bar code identification systemNovember, 1999Uhling
5982853Telephone for the deaf and method of using sameNovember, 1999Liebermann
5982424CCD camera with adaptive compression control mechanismNovember, 1999Simerly et al.
5982378System and method for modeling a three dimensional objectNovember, 1999Kato
5980010Scanning ink jet printer for electronic displaysNovember, 1999Stephenson
5978838Coordination and synchronization of an asymmetric, single-chip, dual multiprocessorNovember, 1999Mohamed et al.
5978609Electronic still video camera having electro-developing recording mediumNovember, 1999Aoki
5978511Method and apparatus of inputting and outputting color pictures and continually-changing tone picturesNovember, 1999Horiuchi et al.
5978100Method of determining a principal portion of an image and method of determining a copying conditionNovember, 1999Kinjo
5977982System and method for modification of the visual characteristics of digital 3D objectsNovember, 1999Lauzon
5974238Automatic data synchronization between a handheld and a host computer using pseudo cache including tags and logical data elementsOctober, 1999Chase, Jr.
5974234Centralized print server for interfacing one or more network clients with a plurality of printing devicesOctober, 1999Levine et al.
5974190Photographed image reproducing apparatusOctober, 1999Maeda et al.
5974168Acquiring bump maps from curved objectsOctober, 1999Rushmeier et al.
5973751Picture replacement system and picture replacement methodOctober, 1999Ishida et al.
5973733Video stabilization system and methodOctober, 1999Gove
5973664Parameterized image orientation for computer displaysOctober, 1999Badger
5971641Carriage driven tray lowering device for an ink jet printerOctober, 1999Looney
5971533Ink cartridge and printerOctober, 1999Kinoshita et al.
5969322Apparatus having a film condition judging deviceOctober, 1999Mori et al.
5966553Still cameraOctober, 1999Nishitani et al.
5966134Simulating cel animation and shadingOctober, 1999Arias
5965871Column readout multiplexer for CMOS image sensors with multiple readout and fixed pattern noise cancellationOctober, 1999Zhou et al.
5964156Optimizing workflow in a prepress printing systemOctober, 1999Smith et al.
5963104Standard cell ring oscillator of a non-deterministic randomizer circuitOctober, 1999Buer
RE36338Electronic still camera for recording and regenerating image data and sound dataOctober, 1999Fukuoka
5960412Method and apparatus for communicating with a card distribution center for management, selection, and delivery of social expression cardsSeptember, 1999Tackbary et al.
5959943Information recording medium with clock information thereinSeptember, 1999Yonezawa
5956163Image sensorSeptember, 1999Clarke et al.
5956051Disabling a mailing machine when a print head is not installedSeptember, 1999Davies et al.
5955817Thermal arched beam microelectromechanical switching arraySeptember, 1999Dhuler et al.
5949967Transforming input color values to device control signalsSeptember, 1999Spaulding et al.
5949467Method and apparatus for preventing usage of an unauthorized inking ribbon in a thermal printing processSeptember, 1999Gunther et al.
5949459Method and apparatus for securing an ink containerSeptember, 1999Gasvoda et al.
5949458Ink cartridge for an ink jet printerSeptember, 1999Studholme
5949439Computing apparatus and operating method using software queues to improve graphics performanceSeptember, 1999Ben-Yoseph et al.
5949426Non-linear texture map blendingSeptember, 1999Rich
5946473LFSR implementation using split-table lookupAugust, 1999Lotspiech et al.
5946007Temperature control of ink-jet recording head using heat energyAugust, 1999Otsuka et al.
5940095Ink jet print head identification circuit with serial out, dynamic shift registersAugust, 1999Parish et al.
5939742Field-effect photo-transistorAugust, 1999Yiannoulos
5938766System for extending functionality of a digital ROM using RAM/ROM jump tables and patch manager for updating the tablesAugust, 1999Anderson et al.
5938742Method for configuring an intelligent low power serial busAugust, 1999Faddell et al.
5937089Color conversion method and apparatusAugust, 1999Kobayashi
5937063Secure bootAugust, 1999Davis
5933179Method of insuring print quality of a thermal printerAugust, 1999Fogle et al.
5933137Method and system for acclerating a user interface of an image capture unit during play modeAugust, 1999Anderson et al.
5931467Probability gameAugust, 1999Kamille
5930528Photography booth with multiple video and confirming image displayJuly, 1999Ito et al.
5929946Retarder stack for preconditioning light for a modulator having modulation and isotropic states of polarizationJuly, 1999Sharp et al.
5924737Postcard checkJuly, 1999Schrupp
5923882Cross-module optimization for dynamically-shared programs and librariesJuly, 1999Ho et al.
5923406Personal postage stamp vending machineJuly, 1999Brasington et al.
5921686Kiosk printerJuly, 1999Baird et al.
5920923Hydro-therapeutic stimulatorJuly, 1999Jillette
5920062Combined linear and two-dimensional bar code structureJuly, 1999Williams
5917963Image processing apparatus and image processing methodJune, 1999Miyake
5917937Method for performing stereo matching to recover depths, colors and opacities of surface elementsJune, 1999Szeliski et al.
5917545Electronic still camera that can be directly inserted in an external deviceJune, 1999Kowno et al.
5917542System and method for digital image capture and transmissionJune, 1999Moghadam et al.
5916358Ink compositions containing surfactant sols comprising mixtures of solid surfactantsJune, 1999Bagchi et al.
5915027Digital watermarkingJune, 1999Cox et al.
5914996Multiple clock frequency divider with fifty percent duty cycle outputJune, 1999Huang
5914801Microelectromechanical devices including rotating plates and related methodsJune, 1999Dhuler et al.
5914748Method and apparatus for generating a composite image using the difference of two imagesJune, 1999Parulski et al.
5914737Color printer having concurrent drop selection and drop separation, the printer being adapted for connection to a computerJune, 1999Silverbrook
5913542System for producing a personal ID cardJune, 1999Belucci et al.
5911056High speed interconnect busJune, 1999Faget et al.
5909562Backup FIFO in-line storageJune, 1999Faget et al.
5909248Exposure control of camera attached to printer electronic cameraJune, 1999Stephenson
5909227Photograph processing and copying system using coincident force drop-on-demand ink jet printingJune, 1999Silverbrook
5907434Image pickup apparatusMay, 1999Sekine et al.
5907415Image processing apparatus with color gamut dependent on color modeMay, 1999Yabe
5907354Memory card housing with a center-actuated ejectorMay, 1999Cama et al.
5907149Identification card with delimited usageMay, 1999Marckini
5905529Video camera, printer apparatus and method of controlling same, and a apparatus and method for detecting print inhibit signalMay, 1999Inuiya et al.
5903706Imager apparatus with rotatable camera headMay, 1999Wakabayashi et al.
5901242Method and apparatus for decoding spatiochromatically multiplexed color images using predetermined coefficientsMay, 1999Crane et al.
5900909Electronic still camera having automatic orientation sensing and image correctionMay, 1999Parulski et al.
5896403Dot code and information recording/reproducing system for recording/reproducing the sameApril, 1999Nagasaki et al.
5896176Content-based video compressionApril, 1999Das et al.
5896169Video level measuring apparatus for X-ray imaging systemsApril, 1999Boelart
5896155Ink transfer printing apparatus with drop volume adjustmentApril, 1999Lebens et al.
5896122Color image processingApril, 1999MacDonald et al.
5894326Electronic camera having a printerApril, 1999McIntyre et al.
5894309System for modifying lighting in photographsApril, 1999Freeman et al.
5893662Image forming deviceApril, 1999Ito
5893132Method and system for encoding a book for reading using an electronic bookApril, 1999Huffman et al.
5893037Combined electronic/silver-halide image capture system with cellular transmission capabilityApril, 1999Reele et al.
5892540Low noise amplifier for passive pixel CMOS imagerApril, 1999Kozlowski et al.
5889597Image processing apparatus and system having a detachable scanner unitMarch, 1999Ara et al.
5887992Compact printing device with means for maintaining distance between print head and print mediumMarch, 1999Yamanashi
5886659On-focal-plane analog-to-digital conversion for current-mode imaging devicesMarch, 1999Pain et al.
5886371Integrated circuit with gate-array interconnections routed over memory areaMarch, 1999Shinagawa
5884118Printer having print output linked to scanner input for automated image quality adjustmentMarch, 1999Mestha et al.
5884013Autotypical screening with optimised dotshapeMarch, 1999Bosschaerts et al.
5883830CMOS imaging device with integrated flash memory image correction circuitryMarch, 1999Hirt et al.
5883663Multiple image camera for measuring the alignment of objects in different planesMarch, 1999Siwko
5883653Ink jet recording device and head holder with ink reserve section having a plurality of reserve groovesMarch, 1999Sasaki et al.
5882128Self-adjusting wheel for directly positioning and holding media during a cutting operation in a printerMarch, 1999Hinojosa
5881211Data conversion table changingMarch, 1999Matsumura
5878292Image-audio print, method of making and player for usingMarch, 1999Bell et al.
5877715Correlated double sampling with up/down counterMarch, 1999Gowda et al.
5875034Camera system having a recordable medium positioned between photographing and reproducing portionsFebruary, 1999Shintani et al.
5874836High reliability I/O stacked fetsFebruary, 1999Nowak et al.
5874718Information recording mediumFebruary, 1999Matsui
5872594Method for open loop camera control using a motion model to control camera movementFebruary, 1999Thompon
5870102Texture compositing apparatus and methodFebruary, 1999Tarolli et al.
5869595Polyimide curing process and improved thermal ink jet printhead prepared therebyFebruary, 1999Fuller et al.
5867704Multiprocessor system shaving processor based idle state detection and method of executing tasks in such a multiprocessor systemFebruary, 1999Tanaka et al.
5867394Document dispenser operational program downloadingFebruary, 1999LaDue et al.
5867213Image pickup apparatus having image-shake correcting devices determined according to zoom magnifying powerFebruary, 1999Ouchi
5866895Information recording medium and information reproduction systemFebruary, 1999Fukuda et al.
5866253Synthetic reinforcing strands with spaced filamentsFebruary, 1999Phillipps et al.
5864630Multi-modal method for locating objects in imagesJanuary, 1999Cosatto et al.
5861897Inkjet recording apparatus with a memory device disposed substantially within boundaries if a recording head unitJanuary, 1999Ide et al.
5860363Ink jet cartridge with separately replaceable ink reservoirJanuary, 1999Childers et al.
5860036Controlling display useable in printersJanuary, 1999Stephenson
5859921Apparatus for processing an image of a faceJanuary, 1999Suzuki
5859657Led printhead and driver chip for use therewith having boundary scan test architectureJanuary, 1999Donahue et al.
5854882Halftone correction systemsDecember, 1998Wang
5854648Ink jet recording method and apparatusDecember, 1998Hanabusa
5852673Method for general image manipulation and compositionDecember, 1998Young et al.
5852502Apparatus and method for digital camera and recorder having a high resolution color composite image outputDecember, 1998Beckett358/512
5850234Ink jet printhead with improved operationDecember, 1998Kneezel et al.
5848420System and method for accessing data of a digital camera from a personal computerDecember, 1998Xu
5848307Camera for taking consecutive exposuresDecember, 1998Uchiyama et al.
5848264Debug and video queue for multi-processor chipDecember, 1998Baird et al.
5848255Method and aparatus for increasing the number of instructions capable of being used in a parallel processor by providing programmable operation decordersDecember, 1998Kondo
5847836Printer-built-in image-sensing apparatus and using strobe-light means electric-consumption control method thereofDecember, 1998Suzuki
5847698Electronic book deviceDecember, 1998Reavey et al.
5845166Hybrid camera with identification matching of film and electronic imagesDecember, 1998Fellegara et al.
5841885Print and method and apparatus for printing, storing and retrieving an image recordNovember, 1998Neff et al.
5841513Apparatus for reproducing sound signals recorded on a motion picture film with digital sound trackNovember, 1998Yoshimura et al.
5841441High-speed three-dimensional texture mapping systems and methodsNovember, 1998Smith
5841126CMOS active pixel sensor type imaging system on a chipNovember, 1998Fossum et al.
5838458Method and apparatus for linking designated portions of a received document image with an electronic addressNovember, 1998Tsai
5838331Computer graphics system for creating and enhancing texture mapsNovember, 1998Debry
5835817Replaceable part with integral memory for usage, calibration and other dataNovember, 1998Bullock et al.
5835641Image pick-up apparatus for detecting and enlarging registered objectsNovember, 1998Sotoda et al.
5835616Face detection using templatesNovember, 1998Lobo et al.
5835136Electronic printer cameraNovember, 1998Watanabe et al.
5831644A recording medium feed mechanism and maintenance mechanism, having a common drive source, for an ink jet printerNovember, 1998Kato
5829745Video game control unit with self-centering steering wheelNovember, 1998Houle
5828578Microprocessor with a large cache shared by redundant CPUs for increasing manufacturing yieldOctober, 1998Blomgren
5826333Method of manufacturing an ink jet headOctober, 1998Iketani et al.
5826263Data management, display, and retrieval system for a hierarchical collectionOctober, 1998Nakabayashi
5825947Optical reproducing system for multimedia information recorded with code data having function for correcting image reading distortionOctober, 1998Sasaki et al.
5825882Encryption and authentication method and circuit for synchronous smart cardOctober, 1998Kowalski et al.
5825383Ink jet head compact and allowing ink to be discharged with great force by using deformable structureOctober, 1998Abe et al.
5825006Optical reader having improved autodiscrimination featuresOctober, 1998Longacre, Jr. et al.
5824410Fiber reinforced thermoplastic resin structure, process for production of same, and extruder for production of sameOctober, 1998Sakai et al.
5822623Camera with vibration correcting functionOctober, 1998Urata et al.
5822608Associative parallel processing systemOctober, 1998Dieffenderfer et al.
5822606DSP having a plurality of like processors controlled in parallel by an instruction word, and a control processor also controlled by the instruction wordOctober, 1998Morton
5822465Image encoding by vector quantization of regions of an image and codebook updatesOctober, 1998Normile et al.
5821886Variable length code detection in a signal processing systemOctober, 1998Son
5819662PrinterOctober, 1998Koyabu
5819240System and method for generating personalized postage indicaOctober, 1998Kara
5818032Encoded color halftone micro-dots for high density digital information storageOctober, 1998Sun et al.
5818023Portable ID card verification apparatusOctober, 1998Meyerson et al.
5816918Prize redemption system for gamesOctober, 1998Kelly et al.
5816718Hand-held label printer applicatorOctober, 1998Poole
5815211Image processing system and method for outputting a superposed video signal including video and informationSeptember, 1998Umei
5815186Removable roll-feed apparatus and methodSeptember, 1998Lewis et al.
5814809Apparatus for optically scanning images using transmissive and reflective light sourcesSeptember, 1998Han
5812156Apparatus controlled by data from consumable parts with incorporated memory devicesSeptember, 1998Bullock et al.
5812071Apparatus and method for lossy compression using dynamic domain quantizationSeptember, 1998Kairouz
5809331System for retrieving configuration information from node configuration memory identified by key field used as search criterion during retrievalSeptember, 1998Staats et al.
5809292Floating point for simid array machineSeptember, 1998Wilkinson et al.
5809288Synchronized MIMD multi-processing system and method inhibiting instruction fetch on memory access stallSeptember, 1998Balmer
5809181Color conversion apparatusSeptember, 1998Metcalfe
5808672Apparatus for removably mounting an electronic camera to a computer systemSeptember, 1998Wakabayashi et al.
5808631Integrated fault tolerance in printing mechanismsSeptember, 1998Silverbrook
5806997Dot matrix printerSeptember, 1998Kawanabe
5805936Instant cameraSeptember, 1998Matsuzaki et al.
5805550Recording medium capable of recording a first data-type and a second data-type, playback method and playback device for playing back from the recording medium, and recording device for recording first-type data and second type data on the recording mediumSeptember, 1998Ohmori
5805296Optical scanning apparatus including an image reading section and an image printing section that share a common optical system and a method of printing and reading an image using the common optical systemSeptember, 1998Hattori
5805213Method and apparatus for color-correcting multi-channel signals of a digital cameraSeptember, 1998Spaulding et al.
5802413Printer receiving electronic cameraSeptember, 1998Stephenson
5801854Color conversion methodSeptember, 1998Naylor, Jr.
5801736Ink jet printer with cartridge having integral ink storage chamberSeptember, 1998Ikkatai et al.
5801657Serial analog-to-digital converter using successive comparisonsSeptember, 1998Fowler et al.
5796928Image reading apparatus with automatic document feederAugust, 1998Toyomura et al.
5796429Apparatus for recording a video signal together with information from an external storage deviceAugust, 1998Suzuki et al.
5796288Graphics accelerator having minimal logic multiplexer system for sharing a microprocessorAugust, 1998Krech, Jr. et al.
5793900Generating categorical depth maps using passive defocus sensingAugust, 1998Nourbakhsh et al.
5793885Computationally efficient low-artifact system for spatially filtering digital color imagesAugust, 1998Kasson
5793423Solid state image sensing deviceAugust, 1998Hamasaki
5792249Liquid composition, ink set, image-forming method and apparatus using the sameAugust, 1998Shirota et al.
5790699Macrodetector based image conversion systemAugust, 1998Jackson et al.
5790193Accessory module for an electronic cameraAugust, 1998Ohmori
5790158Ink-jet recording apparatus and ink tank cartridge thereforAugust, 1998Shinada et al.
5788388Ink jet cartridge with ink level detectionAugust, 1998Cowger et al.
5788387Tape cartidge and printing deviceAugust, 1998Takayama et al.
5787193System for converting color image signals from RGB to CMY color spaces through look-up tablesJuly, 1998Balasubramanian
5784959Hand-held printer and method for adhesive tapeJuly, 1998Larios
5784521Signal recording systemJuly, 1998Nakatani et al.
5784434Digital intra-oral imaging system for dental radiographyJuly, 1998Shieh
5784088Ink jet recording apparatus using recording unit with ink cartridge having ink inducing elementJuly, 1998Ujita et al.
5784076Video processor implementing various data translations using control registersJuly, 1998Crump et al.
5781924Computer caching methods and apparatusJuly, 1998Zaitzeva et al.
5781708Integral bar code printer and reader system and method of operationJuly, 1998Austin et al.
5781202Fax machine with concurrent drop selection and drop separation ink jet printingJuly, 1998Silverbrook
5777626Video image special effect deviceJuly, 1998Takashima et al.
5774760Method of controlling color correction and apparatus for imagewise exposure using said methodJune, 1998Nagashima
5771245Process for independently protecting two dimensional codes from one or more burst errors patternsJune, 1998Zhang
5771012Integrated circuit analog-to-digital converter and associated calibration method and apparatusJune, 1998Shu et al.
5768609Reduced area of crossbar and method of operationJune, 1998Gove et al.
5768482Resolution-triggered sharpening for scaling of a digital-matrix imageJune, 1998Winter et al.
5768382Remote-auditing of computer generated outcomes and authenticated biling and access control system using cryptographic and other protocolsJune, 1998Schneier et al.
5767945Methods of changing the visibility of some characteristic or information to be included in a hard copy of a recorded imageJune, 1998Fields et al.
5765197Method and system for authentication of a memory unit for a computer systemJune, 1998Combs
5764816Image forming apparatus capable of converting the resolutionJune, 1998Kohno et al.
5764248Production of digitized stereoscopic polarizing images by ink jet printingJune, 1998Scarpetti
5761726Base address generation in a multi-processing system having plural memories with a unified address space corresponding to each processorJune, 1998Guttag et al.
5761698Computer system having audio/video/CD drive controller/coprocessor having integral memory interface, graphics coprocessor, digital signal processor, compact disk controller, and video controllerJune, 1998Combs
5761219Error correction for PDF417 and other machine-readable symbologiesJune, 1998Maltsev
5761200Intelligent distributed data transfer systemJune, 1998Hsieh
5760814Device for uncurling thermal sensitive recording paperJune, 1998Kang
5757393Image recording apparatusMay, 1998Suzuki
5757388Electronic camera and integral ink jet printerMay, 1998Stephenson
5757354Portable data communication apparatus with rotatable display images for accomodating a wireless remote keyboardMay, 1998Kawamura
5756978Modular optical memory card image display point of sale terminalMay, 1998Soltesz et al.
5755519Printer ribbon identification sensorMay, 1998Klinefelter
5754700Method and apparatus for improving the quality of images for non-real time sensitive applicationsMay, 1998Kuzma
5754690Position sensitive detector based image conversion system capable of preserving subpixel informationMay, 1998Jackson et al.
5754682Picture processing method and apparatusMay, 1998Katoh
5754227Digital electronic camera having an external input/output interface through which the camera is monitored and controlledMay, 1998Fukuoka
5753344In-line printing production of three dimensional image products incorporating lenticular transparent materialMay, 1998Jacobsen
5752114Photographic and video image systemMay, 1998Saito et al.
5751590System for printing social expression cardsMay, 1998Cannon et al.
5751318Elongated ink jet printhead using joined piezoelectric actuatorMay, 1998Granzow
5751303Printing medium management apparatusMay, 1998Erickson et al.
5750974Lighting apparatus having light emitting diodes arranged in a plurality of planes on a printed circuit boardMay, 1998Sasaki et al.
5749551Portable device to allow for simultaneous duplex printing and scanning on single pass machinesMay, 1998Torres et al.
5748856Method for reducing pixel density along a plurality of axes of a multiple dimension image representationMay, 1998Cariffe et al.
5748764Automated detection and correction of eye color defects due to flash illuminationMay, 1998Benati et al.
5748448Solid-state image sensor assembly with image sensor element chip mounted in packageMay, 1998Hokari
5748326Instant special effects electronic cameraMay, 1998Thompson-Bell et al.
5748228Image information enlarging reading deviceMay, 1998Kobayashi et al.
5748202Image data processor for processing pixel data in block bufferMay, 1998Nakatsuka et al.
5745175Method and system for providing automatic focus control for a still digital cameraApril, 1998Anderson et al.
5743746Reward enriched learning system and methodApril, 1998Ho et al.
5742861Electronic camera and associated printer which uses a display imageApril, 1998Stephenson
5742333Electro-optical device for selectively transmitting polarized spectral componentsApril, 1998Faris
5742305PWA inkjet printer element with resident memoryApril, 1998Hackleman
5742296Image processing method and apparatus thereforApril, 1998Yamada et al.
5741155Cable connector gender changerApril, 1998Herman
5740480Camera with movable first lens cover which supports movable second lens cover which opens during movement of first lens coverApril, 1998Kuhn et al.
5737729Interactive kiosk for selecting and sending mail piecesApril, 1998Denman
5734425Electronic still camera with replaceable digital processing programMarch, 1998Takizawa et al.
5734414Camera apparatus for electronic conferenceMarch, 1998Nishimura et al.
5734154Smart card with Iintegrated reader and visual image displayMarch, 1998Jachimowicz et al.
5731829Information processing and recording apparatus with two recording medium conveyance routesMarch, 1998Saito et al.
5731062Thermoplastic three-dimensional fiber networkMarch, 1998Kim et al.
5729471Machine dynamic selection of one video camera/image of a scene from multiple video cameras/images of the scene in accordance with a particular perspective on the scene, an object in the scene, or an event in the sceneMarch, 1998Jain et al.
5729252Multimedia program editing system and methodMarch, 1998Fraser
5726772Method and apparatus for halftone rendering of a gray scale image using a blue noise maskMarch, 1998Parker et al.
5726693Ink printing apparatus using ink surfactantsMarch, 1998Sharma et al.
5726435Optically readable two-dimensional code and method and apparatus using the sameMarch, 1998Hara et al.
5726219Resin composition and printed circuit board using the sameMarch, 1998Hosomi et al.
5722893Card dispensing shoe with scannerMarch, 1998Hill et al.
5722055Portable radiotelephone terminal adaptable to multiple modelsFebruary, 1998Kobayashi et al.
5719970Image processing method and deviceFebruary, 1998Aoki et al.
5719936Communication device for mobile operation having a telephone and notebook with displayFebruary, 1998Hillenmayer
5719621Film image reproducing apparatusFebruary, 1998Tsunefuji
5719602Controlling PWA inkjet nozzle timing as a function of media speedFebruary, 1998Hackleman et al.
5717776Certification card producing apparatus and certification cardFebruary, 1998Watanabe
5717197Tiled embedded data block-types for generic embedded data block systemsFebruary, 1998Petrie
5715493Apparatus and electronic camera and associated printer with light tight storage receptacleFebruary, 1998Stephenson
5715325Apparatus and method for detecting a face in a video imageFebruary, 1998Bang et al.
5715234Electronic camera and associated printer which uses a display imageFebruary, 1998Stephenson et al.
5715228Optical recording apparatusFebruary, 1998Takiguchi
5713678Low-paper sensing apparatusFebruary, 1998Smith et al.
5710948Camera system with color temperature meterJanuary, 1998Takagi
5710582Hybrid ink jet printerJanuary, 1998Hawkins et al.
5709253Method for refilling an inkjet cartridge and apparatus to modify a cartridge with a negative pressure reservoirJanuary, 1998Maerzke
5708900CameraJanuary, 1998Yokoyama et al.
5708518Method and apparatus for halftone rendering of a gray scale image using a blue noise maskJanuary, 1998Parker et al.
5706870Kit and method for refilling ink cartridgesJanuary, 1998Maerzke
5706049Camera that records an active image area identifier with an imageJanuary, 1998Moghadam et al.
5703961Image transformation and synthesis methodsDecember, 1997Rogina et al.
5699491Printer driver having gamut-mapped colorsDecember, 1997Barzel
5699102Non-impact copier/printer system communicating rosterized, printer independant dataDecember, 1997Ng et al.
5697006Method and apparatus for recording stereoscopic images and lenticular recording material used thereforDecember, 1997Toguchi et al.
5696913Unique processor identifier in a multi-processing system having plural memories with a unified address space corresponding to each processorDecember, 1997Gove et al.
5696892Method and apparatus for providing animation in a three-dimensional computer generated virtual world using a succession of textures derived from temporally related source imagesDecember, 1997Redmann et al.
5692225Voice recognition of recorded messages for photographic printersNovember, 1997Bernardi et al.
5691768Multiple resolution, multi-stream video system using a single standard decoderNovember, 1997Civanlar et al.
5689740Focus detection deviceNovember, 1997Uchiyama
5688056Method for controlling a printer in order to obtain postagesNovember, 1997Peyret
5687304Real-time image generation system for simulating physical paint, drawing media, and feature modeling with 3-D graphicsNovember, 1997Kiss
5682191Ink jet printing apparatus having modular componentsOctober, 1997Barrett et al.
5680533Videographics program/video game fabricating system and methodOctober, 1997Yamato et al.
5679943Hand-held terminal with display screens, interactive screens, magnetic credit card readers, scanners, printers and handlersOctober, 1997Schultz et al.
5679456Fiber reinforced thermoplastic resin structure, process for production of same, and extruder for production of sameOctober, 1997Sakai et al.
5678081Photographic camera having a picture size switching deviceOctober, 1997Tanaka
5678001Computerized game teaching methodOctober, 1997Nagel et al.
5677716Maximum-diagonal print mask and multipass printing modes, for high quality and high throughput with liquid-base inksOctober, 1997Cleveland
5677715Pivoting cap actuating assembly for printheadsOctober, 1997Beck
5673073Syringe for filling print cartridge and establishing correct back pressureSeptember, 1997Childers et al.
5670935Rearview vision system for vehicle including panoramic viewSeptember, 1997Schofield et al.
5666516Protected programmable memory cartridge having selective access circuitrySeptember, 1997Combs
5666411System for computer software protectionSeptember, 1997McCarty
5666226Optical apparatusSeptember, 1997Ezra et al.
5666141Ink jet head and a method of manufacturing thereofSeptember, 1997Matoba et al.
5665249Micro-electromechanical die module with planarized thick film layerSeptember, 1997Burke et al.
5664013Embedded notepad system for a cellular telephoneSeptember, 1997Rossi
5663552Portable information terminal apparatus having image processing functionSeptember, 1997Komizo
5661506Pen and paper information recording system using an imaging penAugust, 1997Lazzouni et al.
5657237Instrument and method for the digital electronic measurement of periodic electrical quantitiesAugust, 1997Mazzoni
5655164Still film sound photography method and apparatusAugust, 1997Tsai
5652918Image blur suppression device for an optical cameraJuly, 1997Usui
5652618Image reproducing apparatusJuly, 1997Nanba
5649031Image information processor for producing high-quality output imageJuly, 1997Nakamura et al.
5647484Laptop computer encasement device adapted for printerJuly, 1997Fleming
5646752Color image processing apparatus which uses private tags to alter a predefined color transformation sequence of a device profileJuly, 1997Kohler et al.
5646658Modular ink jet printer headJuly, 1997Thiel et al.
5644647User-interactive reduction of scene balance failuresJuly, 1997Cosgrove et al.382/162
5644557Audio data recording system for recording voice data as an optically readable code on a recording medium for recording still image data photographed by a cameraJuly, 1997Akamine et al.
5644431Directional image transmission sheet and method of making sameJuly, 1997Magee
5644410Image sensing apparatusJuly, 1997Suzuki et al.
5644341Ink jet head drive apparatus and drive method, and a printer using theseJuly, 1997Fuji et al.
5642226Lenticular optical systemJune, 1997Rosenthal
5640627Display device in a camera finderJune, 1997Nakano et al.
5640203Recording operation control deviceJune, 1997Wakui
5640002Portable RF ID tag and barcode readerJune, 1997Ruppert et al.
5638103Method for recording and reproducing information, apparatus therefor and recording mediumJune, 1997Obata et al.
5634730Hand-held electronic printerJune, 1997Bobry
5633678Electronic still camera for capturing and categorizing imagesMay, 1997Parulski et al.
5633667Ink cartridge for printerMay, 1997Miyazawa
5625770File system for filing documents, using a catalog card having a plurality of marks thereonApril, 1997Nomura
5625669Mobile phone with internal call accounting controlsApril, 1997McGregor et al.
5624732Bright printed sheetApril, 1997Oshima et al.
5623581Direct view interactive photo kiosk and image forming process for sameApril, 1997Attenberg
5621868Generating imitation custom artwork by simulating brush strokes and enhancing edgesApril, 1997Mizutani et al.
5621864Label generation apparatusApril, 1997Benade et al.
5621545Image production using color error diffusionApril, 1997Motta et al.
5621524Method for testing ink-jet recording headsApril, 1997Mitani
5621445Apparatus for refilling ink cartridgesApril, 1997Fang et al.
5620269Print media transport apparatus for moving print media through a printer from a high volume input tray accessoryApril, 1997Gustafson
5619737Encodement-on-film recording apparatus utilizes flash components in a cameraApril, 1997Horning et al.
5619622Raster output interface for a printbarApril, 1997Audi et al.
5619590System for electronic image signal processing to provide a tonescale corrected full resolution luminance and two half resolution chrominance signalsApril, 1997Moore, Jr.
5619030Control apparatus for image blur prevention employing an angular velocity and an image field sensorApril, 1997Shiomi
5615393Computer system having a cordless keyboard and an induction coil in a plug-in electronic card moduleMarch, 1997Kikinis et al.
5615384Personal communicator having improved zoom and pan functions for editing information on touch sensitive displayMarch, 1997Allard
5615123System for creating and producing custom card productsMarch, 1997Davidson et al.
5613415Paper cutting apparatusMarch, 1997Sanpei
5613175Anisotropic imaging memberMarch, 1997Frankel
5613146Reconfigurable SIMD/MIMD processor using switch matrix to allow access to a parameter memory by any of the plurality of processorsMarch, 1997Gove et al.
5610761Telescope having mechanism for automatically returning optical system to a reference dioptric powerMarch, 1997Ishibashi et al.
5608437Ink container and ink jet recording apparatus using sameMarch, 1997Iwata et al.
5606420Camera system including a camera section and a reproduction section separately attachable to the camera sectionFebruary, 1997Maeda et al.
5606347Devices systems and methods for flexible format data storageFebruary, 1997Simpson
5604537Imaging apparatus having an automatic focusing meansFebruary, 1997Yamazaki et al.
5602574Matrix pen arrangement for inkjet printingFebruary, 1997Williams
5602412Imaging device which adjusts the ratio of color excitation values produced by an image pickup element in accordance with an exit pupil position and the size of an apertureFebruary, 1997Suzuki et al.
5602377Bar code dataform scanning and labeling apparatus and methodFebruary, 1997Beller et al.
5600563System for printing social expression cardsFebruary, 1997Cannon et al.
5600402Method and apparatus for producing three-dimensional graphic images using a lenticular sheetFebruary, 1997Kainen
5599231Security systems and methods for a videographics and authentication game/program fabricating deviceFebruary, 1997Hibino et al.
5598242Vibration compensation mode selection apparataus and associated visual display for a cameraJanuary, 1997Omi et al.
5598202Method and apparatus for printing a graphic on fabricJanuary, 1997Peterson
5594500Image pickup apparatusJanuary, 1997Tanaka et al.
5593236Hand-held sweep electronic printer with compensation for non-linear movementJanuary, 1997Bobry
5592597Real-time image generation system for simulating physical paint, drawing media, and feature modeling with 3-D graphicsJanuary, 1997Kiss
5592312Method for transforming color signalsJanuary, 1997Noguchi
5592237High resolution image processor with multiple bus architectureJanuary, 1997Greenway et al.
5592167Analog-digital converter using current controlled voltage referenceJanuary, 1997Caruso et al.
5591956Two dimensional data encoding structure and symbology for use with optical readersJanuary, 1997Longacre, Jr. et al.
5591192Surgical penetration instrument including an imaging elementJanuary, 1997Privitera et al.
5587740Digital photo kioskDecember, 1996Brennan
5586207Methods and assemblies for packaging opto-electronic devices and for coupling optical fibers to the packaged devicesDecember, 1996Goodwin
5586166Chip cardDecember, 1996Turban
5583971Filmless method and apparatus for producing 3-D photographsDecember, 1996Lo
5581773Massively parallel SIMD processor which selectively transfers individual contiguously disposed serial memory elementsDecember, 1996Glover
5579445Image resolution conversion method that employs statistically generated multiple morphological filtersNovember, 1996Loce et al.
5579116Video printer and printing method in use with the sameNovember, 1996Sugiyama et al.
5576783Recording and reproducing a 3-dimensional imageNovember, 1996Lee
5574485Ultrasonic liquid wiper for ink jet printhead maintenanceNovember, 1996Anderson et al.
5572635Method for changing a natural image based on a light environment in the natural imageNovember, 1996Takizawa et al.
5572632Universal frame buffer for a rendering deviceNovember, 1996Laumeyer et al.
5572596Automated, non-invasive iris recognition system and methodNovember, 1996Wildes et al.
5572310Universal media size dialNovember, 1996Hoberock et al.
5570435Segmentation of text stylesOctober, 1996Bloomberg et al.
5570130Detachable memory with starting block address selected in accordance with detected television programming standardOctober, 1996Horii et al.
5566906Decurling device for a rolled recording paperOctober, 1996Kamada et al.
5566290Multi-media deviceOctober, 1996Silverbrook
5565900Unit print head assembly for ink-jet printingOctober, 1996Cowger et al.
5563722Method and apparatus for assembling a photographic albumOctober, 1996Norris
5563643Ink jet printhead and ink supply manifold assembly having ink passageway sealed therebetweenOctober, 1996Carlotta et al.
5561604Computer controlled system for vending personalized productsOctober, 1996Buckley et al.
5559932Printer and computer system with detachable built-in printerSeptember, 1996Machida et al.
5559714Method and apparatus for display sequencing personalized social occasion productsSeptember, 1996Banks et al.
5557332Apparatus and method for reproducing a prediction-encoded video signalSeptember, 1996Koyanagi et al.
5557324Polorization viewerSeptember, 1996Wolff
5557310Ink container with ring-shaped ink absorbing memberSeptember, 1996Kurata et al.
5555496Method and apparatus for communicating with a card distribution center for management, selection, and delivery of social expression cardsSeptember, 1996Tackbary et al.
5555428Activity masking with mask context of SIMD processorsSeptember, 1996Radigan et al.
5555061Camera with improved positioning of vibration detecting sensors thereinSeptember, 1996Soshi et al.
5554432Press polymerization of lenticular imagesSeptember, 1996Sandor et al.
5553864User image integration into audiovisual presentation system and methodologySeptember, 1996Sitrick
5553220Managing audio data using a graphics display controllerSeptember, 1996Keene
5553172Electronic image pickup apparatus having movable focus screen and movable mirror and which is capable of miniaturizationSeptember, 1996Kimura et al.
5552837Remote controller for scanning data and controlling a video systemSeptember, 1996Mankovitz
5550938Cordless image scannerAugust, 1996Hayakawa et al.
5550935Method for multiframe Wiener restoration of noisy and blurred image sequencesAugust, 1996Erdem et al.
5549740Liquid composition, ink set and image forming method and apparatus using the composition and ink setAugust, 1996Takahashi et al.
5547501Method for formation of invisible marking and method for reading of invisible markingAugust, 1996Maruyama et al.
5543941Method and apparatus for halftone rendering of a gray image using a blue noise maskAugust, 1996Parker et al.
5542487Portable compact multi-function printer with cartridge paper supplyAugust, 1996Schultz et al.
5541654Focal plane array imaging device with random access architectureJuly, 1996Roberts
5541653Method and appartus for increasing resolution of digital color images using correlated decodingJuly, 1996Peters et al.
5539456Video camera and camera system with white balance controlJuly, 1996Ishii
5539194Modular hand-held data entry systemJuly, 1996Miller et al.
5537294Printed circuit card having a contact clip for grounding a printed circuit board found thereinJuly, 1996Siwinski
5537144Electro-optical display system for visually displaying polarized spatially multiplexed images of 3-D objects for use in stereoscopically viewing the same with high image quality and resolutionJuly, 1996Faris
5537075Semiconductor integrated circuit having isolated supply paths for circuit blocksJuly, 1996Miyazaki
5535371Portable computer with automatic adaption to different device types on a standard portJuly, 1996Stewart et al.
5534962Method and apparatus for preventing unauthorized recycling of single-use camera and permitting authorized reuse of the cameraJuly, 1996Zander
5534923Video camera apparatusJuly, 1996Suda
5534900Ink-jet recording apparatusJuly, 1996Ohno et al.
5534864Pipelined analog-to-digital converterJuly, 1996Ono et al.
5533172Method of printing a print job with a print fileJuly, 1996Hurtz et al.
5533170Rasterizer for a pattern generation apparatusJuly, 1996Teitzel et al.
5531431Paper feeder for portable printerJuly, 1996Saito et al.
5529279Thermal isolation structures for microactuatorsJune, 1996Beatty et al.
5528339Color image reproduction of scenes with color enhancement and preferential tone mappingJune, 1996Buhr et al.
5524194Data communication apparatusJune, 1996Chida et al.
5523780Ink jet recording apparatus and ink cartridge mountable on said apparatusJune, 1996Hirosawa et al.
5521710Method of applying electronically stored labels from a source job to a destination job in a printing systemMay, 1996Strossman
5521663Sound system for still film photographyMay, 1996Norris, III
5521372Framing codes for robust synchronization and addressing of self-clocking glyph codesMay, 1996Hecht et al.
5520470Portable printer for handheld computerMay, 1996Willett
5517265Method and apparatus for preventing unauthorized recycling of single-use camera and permitting authorized reuse of the cameraMay, 1996Zander et al.
5517241EEPROM memory card for an electronic still cameraMay, 1996Adachi et al.
5517222Ink jet recording apparatus having rotary drum with ink receptorMay, 1996Sugiyama et al.
5515104Camera having color correction coefficients set in accordance with a combination of photographic parametersMay, 1996Okada
5515101Title generator for a video cameraMay, 1996Yoshida
5514860Document authentication system utilizing a transparent labelMay, 1996Berson
5513922Printer having a removable control panelMay, 1996Umbach
5513117Apparatus and method for electronically dispensing personalized greeting cards and giftsApril, 1996Small et al.
5512962Motion vector detecting apparatus for moving pictureApril, 1996Homma
5512951Auto-focusing apparatusApril, 1996Torii
5512924Jet apparatus having an ink jet head and temperature controller for that headApril, 1996Takada et al.
5510857Motion estimation coprocessorApril, 1996Kopet et al.
5510820Device for ink refill of a reservoir in a print cartridgeApril, 1996Aulick et al.
5506620Recording/reproducing apparatus for providing indications of abnormal statesApril, 1996Ozawa
5506603Method and device for airbrushingApril, 1996Kawano et al.
5504821Color converting apparatus for performing a three-dimensional color conversion of a colored picture in a color space with a small capacity of memoryApril, 1996Kanamori et al.
5502577Paper user interface for image manipulations such as cut and pasteMarch, 1996Mackinlay et al.
5502529Method of recycling single-use cameraMarch, 1996Zander
5502485Camera which compresses digital image data in correspondence with the focus control or the stop value of the cameraMarch, 1996Suzuki
5499108Document-driven scanning input device communicating with a computerMarch, 1996Cotte et al.
5497498Video processing module using a second programmable logic device which reconfigures a first programmable logic device for data transformationMarch, 1996Taylor
5495568Computerized clothing designerFebruary, 1996Beavin
5495097Plurality of scan units with scan stitchingFebruary, 1996Katz et al.
5493684Power management architecture including a power management messaging bus for conveying an encoded activity signal for optimal flexibilityFebruary, 1996Gephardt et al.
5493409Still video camera having a printer capable of printing a photographed image in a plurality of printing modesFebruary, 1996Maeda et al.358/296
5493335Single sensor color camera with user selectable image record sizeFebruary, 1996Parulski et al.
5493332Modular electronic imaging system which accepts replacement solid state imagesFebruary, 1996Dalton et al.
5489995Contact type image sensor, producing method of the same, and information processing apparatusFebruary, 1996Iso et al.
5489945Timing logic system and method for selectably controlling a high resolution charge coupled device image sensor of the type having two line pixel registers to provide a high resolution mode and alternatively a television resolution mode of picture imagingFebruary, 1996Kannegundla et al.
5489935Laser printer power saverFebruary, 1996Dornier
5488223System and method for automatic selection of printer control parametersJanuary, 1996Austin et al.
5485504Hand-held radiotelephone with video transmission and displayJanuary, 1996Ohnsorge
5483379Image registering in color at low light intensityJanuary, 1996Svanberg et al.
5483335Multiplex spectroscopyJanuary, 1996Tobias
5482389Paper feed driven cutter mechanism of an electronic printerJanuary, 1996Bickoff et al.
5482375Tubular plastic end stops bonded to plastic zipperJanuary, 1996Richardson et al.
5479515One-dimensional bar code symbology and method of using sameDecember, 1995Longacre
5479015Multi-image detector assemblyDecember, 1995Rudman et al.
5477546Teleconference terminal equipment and teleconference moduleDecember, 1995Shibata et al.
5477264Electronic imaging system using a removable software-enhanced storage deviceDecember, 1995Sarbadhikari et al.
54770422-D bar code scanner/decoder having a redundancy cancellerDecember, 1995Wang
5477012Optical position determinationDecember, 1995Sekendur
5475318MicroprobeDecember, 1995Marcus et al.
5475279Piezoelectric/electrostrictive actuator having integral ceramic base member and film-type piezoelectric/electrostrictive element (S)December, 1995Takeuchi et al.
5473352Image forming device having sheet conveyance deviceDecember, 1995Ishida
5472143Atomising nozzle and filter and spray generation deviceDecember, 1995Bartels et al.
5471592Multi-processor with crossbar link of processors and memories and method of operationNovember, 1995Gove et al.
5471324Color printer calibration with improved color mapping linearityNovember, 1995Rolleston
5469211Video cameraNovember, 1995Maruichi et al.
5467118Ink cartridge for a hard copy printing or plotting apparatusNovember, 1995Gragg et al.
5466918Method and apparatus for image compression, storage, and retrieval on magnetic transaction cardsNovember, 1995Ray et al.
5465213System and method of manufacturing a single book copyNovember, 1995Ross
5465163Image processing method and apparatus for processing oversized original images and for synthesizing multiple imagesNovember, 1995Yoshihara et al.
5463470Methods of collecting photometric image data and determining light exposure by extracting feature image data from an original imageOctober, 1995Terashita et al.
5462375Printer and data processing apparatus having printing unitOctober, 1995Isobe et al.
5461440Photographing image correction systemOctober, 1995Toyoda et al.
5459819System for custom imprinting a variety of articles with images obtained from a variety of different sourcesOctober, 1995Watkins et al.
54575543-D printing technology based on selective reflecting polarizing mediaOctober, 1995Faris
5457515Method for forming a graphic image webOctober, 1995Quadracci et al.
5456539Printer with dual opposing printheadsOctober, 1995Wright et al.
5452033Single use photographic film package and cameraSeptember, 1995Balling et al.
5450365Memory card control deviceSeptember, 1995Adachi et al.
5448280Rewriteable card, printing apparatus for printing the card and a method of judging the life of the sameSeptember, 1995Matsuda et al.
5444543Method and apparatus for detecting a closed-loop area of an imageAugust, 1995Sakano
5444468Image forming apparatus with means for correcting image density unevennessAugust, 1995Fukushima et al.
5444230Solid state optical reader with bi-directional protocolAugust, 1995Baldwin et al.
5443320Information processing system with printing functionAugust, 1995Agata et al.
5442567Apparatus and method for electronically dispensing personalized greeting cards and giftsAugust, 1995Small
5442387Apparatus for supplying phase change ink to an ink jet printerAugust, 1995Loofbourow et al.
5442188Strip chart recorder paper attribute detector and monitorAugust, 1995Brimbal et al.
5441251Sheet article containing cassette and systemAugust, 1995Ohta
5438431Method and apparatus for generating digital halftone images using a rotated dispersed dither matrixAugust, 1995Ostromoukhov
5438430Paper user interface for image manipulations such as cut and pasteAugust, 1995Mackinlay et al.
5438359Electronic camera system using IC memory cardAugust, 1995Aoki et al.
5436657Electronic still camera for recording and regenerating image data and sound dataJuly, 1995Fukuoka
5434621Object tracking method for automatic zooming and the apparatus thereforJuly, 1995Yu et al.
5434618Electronic still camera operable with a removably mounted storage mediumJuly, 1995Hayashi et al.
5432914Scanner interface system for transferring data to main and secondary processing unitsJuly, 1995Cho
5432896Watercolor simulation in computer graphicsJuly, 1995Hwong et al.
5432577Electronically controlled camera with interval time settingJuly, 1995Kobayshi et al.
5430861Computer using optically encoded virtual memoryJuly, 1995Finn
5430525Image processing apparatusJuly, 1995Ohta et al.
5430518Remote control cameraJuly, 1995Tabata et al.
5428423Photographic printed cards and apparatus and method of making sameJune, 1995Clark
5426762System for determining a truth of software in an information processing apparatusJune, 1995Nakagawa
5420940CGSI pipeline performance improvementMay, 1995Sedlar et al.
5420697Portable facsimile/thermal printer utilizing a multi-purpose single rollerMay, 1995Tuli
5420635Video camera, imaging method using video camera, method of operating video camera, image processing apparatus and method, and solid-state electronic imaging deviceMay, 1995Konishi et al.
5420607Electronic paintbrush and color paletteMay, 1995Miller et al.
5420409Bar code scanner providing aural feedbackMay, 1995Longacre, Jr. et al.
5419543Paper feeding apparatus for printerMay, 1995Nakamura et al.
5418585Method and apparatus for preventing unauthorized recycling of single-use camera and permitting authorized reuse of the cameraMay, 1995Petruchik et al.
5418565CFA compatible resolution reduction in a single sensor electronic cameraMay, 1995Smith
5414529Image combining in image processing apparatusMay, 1995Terada et al.
5412410Ink jet printhead for continuous tone and text printingMay, 1995Rezanka
5412402Electronic graphic systemsMay, 1995Searby et al.
5412197Method and apparatus for decoding bar code symbols using gradient signalsMay, 1995Smith
5410649Imaging computer system and networkApril, 1995Gove
5410620Digital data reader of digital data recording sheetApril, 1995Yoshida
5408746Datum formation for improved alignment of multiple nozzle members in a printerApril, 1995Thoman et al.
5408669Computer system for sensing a cable-connected peripheral and for supplying power theretoApril, 1995Stewart et al.
5404460Method for configuring multiple identical serial I/O devices to unique addresses through a serial busApril, 1995Thomsen et al.
5402527Apparatus and method for determining the page description language in which a print job is writtenMarch, 1995Bigby et al.
5399850Document reading apparatus, having a body unit for holding apparatus componentsMarch, 1995Nagatani et al.
5398315Multi-processor video display apparatusMarch, 1995Johnson et al.
5398131Stereoscopic hardcopy methodsMarch, 1995Hall et al.
5398063Focusing position detecting device incorporated in a microscopeMarch, 1995Yamana
5396286Video signal processing apparatusMarch, 1995Ishizuka
5393152Printing device having opening and shutting mechanismFebruary, 1995Hattori et al.
5392365Apparatus for detecting text edges in digital image processingFebruary, 1995Steinkirchner
5384899Apparatus and method for emulating a substrateJanuary, 1995Amit
5384609Integrated camera-tripod systemJanuary, 1995Ogawa et al.
5381172Ink jet head cartridge, ink tank cartridge using degradeable plastic as part of construction or package thereof and ink jet apparatus having fitting part for the cartridgesJanuary, 1995Ujita et al.
5376561High density electronic circuit modulesDecember, 1994Vu et al.
5374995Method and apparatus for enhancing sharpness of a sequence of images subject to continuous zoomDecember, 1994Loveridge et al.
5373322Apparatus and method for adaptively interpolating a full color image utilizing chrominance gradientsDecember, 1994Laroche et al.
5369261Multi-color information encoding systemNovember, 1994Shamir
5369258Postage applying kioskNovember, 1994Sansone et al.235/381
5365312Arrangement for printer equipment for monitoring reservoirs that contain printing mediumNovember, 1994Hillmann et al.
5363212Marker dot detecting device for color image recording apparatusNovember, 1994Taniuchi et al.
5363209Image-dependent sharpness enhancementNovember, 1994Eschbach et al.
5363134Integrated circuit printhead for an ink jet printer including an integrated identification circuitNovember, 1994Barbehenn et al.
5361366Computer equipped with serial bus-connected plural processor units providing internal communicationsNovember, 1994Kawano et al.
5359387Photographic process utilizing combined print and order formOctober, 1994Hicks
5356971Thermosetting powder coating materialOctober, 1994Sagawa et al.
D351144Handheld finger print scanner for imaging and capturing a photographic imageOctober, 1994Fishbine et al.
5351095Method and device for estimating and hierarchically coding the motion of sequences of imagesSeptember, 1994Kerdranvat
5351071Thermal printerSeptember, 1994Matsuda et al.
5347403Apparatus and method for recording and reading informationSeptember, 1994Uekusa
5345505Coding system for a data signalSeptember, 1994Pires
5345288Electronically controlled camera with automatic release mode and interval time settingSeptember, 1994Kobayashi et al.
5344248Framework for portable printersSeptember, 1994Schoon et al.
5343386Apparatus for making electronically-produced postcards and method of operating sameAugust, 1994Barber
5343309Image processing system and method employing adaptive filtering to provide improved reconstruction of continuous tone images from halftone images including those without a screen structureAugust, 1994Roetling
5343031Method of decoding a two-dimensional code symbol markAugust, 1994Yoshida
5339396Interconnection network and crossbar switch for the sameAugust, 1994Muramatsu
5339170Image processing system and method employing hybrid filtering to provide improved reconstruction of continuous tone images from halftone screen-structured imagesAugust, 1994Fan
5339102Capping carriage for ink jet printer maintenance stationAugust, 1994Carlotta
5337361Record with encoded dataAugust, 1994Wang et al.
5336874Bar code reader with error detection and decode controlAugust, 1994Hasegawa
5336004Dot printerAugust, 1994Harada et al.
5335170Modular system for inventory controlAugust, 1994Petteruti et al.
5334920Recording apparatusAugust, 1994Ito et al.
5328281Recording medium feed mechanism for a printer and method of medium feed controlJuly, 1994Narita et al.
5327260Image processing apparatus for smoothing edges of imageJuly, 1994Shimomae
5325493System for distributing command/data packets tagged by their unit identifier for parallel processing by a ready processing unit and recombinationJune, 1994Herrell et al.
5323203Wireless remote control apparatus for cameraJune, 1994Maruyama et al.
5322594Manufacture of a one piece full width ink jet printing barJune, 1994Bol
5319462Automatic focusing apparatus for automatically adjusting focus in response to video signal by fuzzy inferenceJune, 1994Haruki et al.
5318370Cartridge with data memory system and method regarding sameJune, 1994Nehowig
5317146Read head incorporating an image pick-up functionMay, 1994Isobe
5315316Method and apparatus for summing temperature changes to detect ink flowMay, 1994Khormaee
5301043Image reading apparatus in which an original image is automatically fed to a turntableApril, 1994Ichikawa
5300976Movie camera system having view finding and projecting operationsApril, 1994Lim et al.
5300958Method and apparatus for automatically cleaning the printhead of a thermal inkjet cartridgeApril, 1994Burke et al.
5297289System which cooperatively uses a systolic array processor and auxiliary processor for pixel signal enhancementMarch, 1994Mintzer
5297217Tile-oriented technique for collectively performing image rotation scaling and digital halftone screeningMarch, 1994Hamilton, Jr. et al.
5294782Integrated portable device for point of sale transactionsMarch, 1994Kumar
5291243System for electronically printing plural-color tamper-resistant documentsMarch, 1994Heckman et al.
5291227Ink jet printer having improved paper transport mechanismMarch, 1994Suzuki
5288986Binary code matrix having data and parity bitsFebruary, 1994Pine et al.
5288980Library check out/check in systemFebruary, 1994Patel et al.
5282051Apparatus and method for performing resolution conversion on image data with auto correlationJanuary, 1994Walker
5282044Camera shake correction systemJanuary, 1994Misawa et al.
5280620Coupling network for a data processor, including a series connection of a cross-bar switch and an array of silosJanuary, 1994Sluijter et al.
5280160Recording and reproducing method and apparatus compensating for predicted deviation based on detected relative skewing of recording mediumJanuary, 1994Yamamoto et al.
5278608Electronically printed depth photography system with improved viewing rangeJanuary, 1994Taylor et al.
5276521Solid state imaging device having a constant pixel integrating period and blooming resistanceJanuary, 1994Mori
5276472Photographic film still camera system with audio recordingJanuary, 1994Bell et al.
5275877Self reinforced thermoplastic composite laminateJanuary, 1994Isayev
5270808Color image processing with adjustment of computed recording color to match original colorDecember, 1993Tanioka
5267334Encoding/decoding moving images with forward and backward keyframes for forward and reverse displayNovember, 1993Normille et al.
5267021Multiresolution digital television broadcast systemNovember, 1993Ramchandran et al.
5266781Modular card processing systemNovember, 1993Warwick et al.
5265033ATM/POS based electronic mail systemNovember, 1993Vajk et al.
5260735Camera systemNovember, 1993Ishikawa et al.
5247611Spreadsheet cell having multiple data fieldsSeptember, 1993Norden/Paul et al.
5245365Ink-jet printer with user replaceable printing system cartridgeSeptember, 1993Woodard et al.
5243381Method for compiling multiple jobs with job reference sheetsSeptember, 1993Hube
5243370Camera stabilizerSeptember, 1993Slater
5243174Method and apparatus for generating gift certificatesSeptember, 1993Veeneman et al.
5241372Video image processing apparatus including convolution filter means to process pixels of a video image by a set of parameter coefficientsAugust, 1993Ohba
5241165Erasable optical wallet-size data cardAugust, 1993Drexler
5240238Cassette used for electrophotographic process engineAugust, 1993Lee
5239292Computer graphics system electronically simulating painting on canvasAugust, 1993Willan
5237686Multiprocessor type time varying image encoding system and image processor with memory bus control table for arbitration priorityAugust, 1993Asano et al.
5237402Digital image processing circuitryAugust, 1993Deshon et al.
5235686Computer system having mixed macrocode and microcodeAugust, 1993Bosshart
5235428Auto-focus system for video cameraAugust, 1993Hirota et al.
5231455Air jet cleaner for one pump color imagerJuly, 1993Day
5230027Image processor and automated optical inspection system using the sameJuly, 1993Kikuchi
5226125Switch matrix having integrated crosspoint logic and method of operationJuly, 1993Balmer et al.
5225294Non-rechargeable battery packJuly, 1993Schifrin
5224179Image skeletonization methodJune, 1993Denker et al.
5222229Multiprocessor system having synchronization control mechanismJune, 1993Fukuda et al.
5221833Methods and means for reducing bit error rates in reading self-clocking glyph codesJune, 1993Hecht
5220400Container inspection systemJune, 1993Anderson et al.
5220352Thermal transfer recording deviceJune, 1993Yamamoto et al.
5216490Bridge electrodes for microelectromechanical devicesJune, 1993Greiff et al.
5212021Energy pack and individual battery cell cartridgeMay, 1993Smith et al.
5208610Pen carriage for an ink-jet printerMay, 1993Su et al.
5206919Image signal processing with digital filtering to minimize aliasing caused by image manipulationApril, 1993Keating
5204944Separable image warping methods and systems using spatial lookup tablesApril, 1993Wolberg et al.
5200598Optical readerApril, 1993Rencontre
5191640Method for optimal discrete rendering of imagesMarch, 1993Plass
5189529Reduction/enlargement processing system for an image processing apparatusFebruary, 1993Ishiwata et al.
5189520Video camera modular accessory apparatusFebruary, 1993Okayasu et al.
5184907Portable printer for printing on a flat sheetFebruary, 1993Hamada et al.
5184169Photography mode input systemsFebruary, 1993Nishitani
5182548Method and apparatus for painting on a computerJanuary, 1993Haeberli
5181254Method for automatically identifying targets in sonar imagesJanuary, 1993Schweizer et al.
5179936Disposable speculum with membrane bonding ringJanuary, 1993O'Hara et al.
5179389Ink jet recording with head driving condition regulationJanuary, 1993Arai et al.
5175808Method and apparatus for non-affine image warpingDecember, 1992Sayre
5172423Methods and apparatus for defining contours in colored imagesDecember, 1992France
5164831Electronic still camera providing multi-format storage of full and reduced resolution imagesNovember, 1992Kuchta et al.
5164827Surveillance system with master camera control of slave camerasNovember, 1992Paff
5163762Driving circuit for solenoid head of a printerNovember, 1992Murakami
5161037Image processing system and method for processing documents in accordance with a job control sheetNovember, 1992Saito
5160945Pagewidth thermal ink jet printheadNovember, 1992Drake
5160943Printing systemsNovember, 1992Pettigrew et al.
5160577Method of fabricating an aperture plate for a roof-shooter type printheadNovember, 1992Deshpande
5155502Ink-jet cartridgeOctober, 1992Kimura et al.
5154956Non-curling pressure-sensitive adhesive labels with release linersOctober, 1992Fradrich
5153738Scanner with single source mechanical powerOctober, 1992Stemmle
5153532Noise generator using combined outputs of two pseudo-random sequence generatorsOctober, 1992Albers et al.
5151726Camera or printer capable of automatically changing print sizeSeptember, 1992Iwashita et al.
5148534Hardware cartridge representing verifiable, use-once authorizationSeptember, 1992Comerford
5148288Standardized color calibration of electronic imagerySeptember, 1992Hannah
5146592High speed image processing computer with overlapping windows-divSeptember, 1992Pfeiffer et al.715/807
5146328Color signal network systemSeptember, 1992Yamasaki et al.
5144423HDTV encoder with forward estimation and constant rate motion vectorsSeptember, 1992Knauer et al.
5144340Inkjet printer with an electric curtain forceSeptember, 1992Hotomi et al.
D329862Combined instant camera and printerSeptember, 1992Watanabe et al.
5138459Electronic still video camera with direct personal computer (PC) compatible digital format outputAugust, 1992Roberts et al.
5135095Portable hand device for machine processing of data carried on a data carrierAugust, 1992Kocznar et al.
5134495Resolution transforming raster-based imaging systemJuly, 1992Frazier et al.
5132798Special effect apparatus with power controlJuly, 1992Yoshimura et al.
5124692Method and apparatus for providing rotation of digital image dataJune, 1992Sasson
5121349Digital noise generatorJune, 1992Naito
5121209Sharpness control for a television imageJune, 1992Smith et al.
5121139Compact ink jet printer having a drum drive mechanismJune, 1992Burke
5119179Video signal processing circuit for extracting a chroma signal from a luminous signalJune, 1992Hagino
5119115Thermal ink jet print head with removable ink cartridgeJune, 1992Buat et al.
5115888Self-serve checkout systemMay, 1992Schneider
5111419Electronic filters, signal conversion apparatus, hearing aids and methodsMay, 1992Morley
5111288Surveillance camera systemMay, 1992Blackshear
5107290CameraApril, 1992Ohsawa
5107276Thermal ink jet printhead with constant operating temperatureApril, 1992Kneezel et al.
5107100Portable scanner with on-board keyboard, display, transceiver and printerApril, 1992Shepard et al.
5103311Data processing module and video processing system incorporating sameApril, 1992Sluijter et al.
5101096Optical recording sheet and method and apparatus for reproducing the sameMarch, 1992Ohyama et al.
5097285Camera with self-timerMarch, 1992Wakabayashi et al.
5097282Automatic focusing apparatusMarch, 1992Itoh et al.
5091966Adaptive scaling for decoding spatially periodic self-clocking glyph shape codesFebruary, 1992Bloomberg et al.
5081575Highly parallel computer architecture employing crossbar switch with selectable pipeline delayJanuary, 1992Hiller et al.
5067713Coded playing cards and apparatus for dealing a set of cardsNovember, 1991Soules et al.
5065170Ink jet printer having a staggered array printheadNovember, 1991Rezanka et al.
5058856Thermally-actuated microminiature valveOctober, 1991Gordon et al.
5055997System with plurality of processing elememts each generates respective instruction based upon portions of individual word received from a crossbar switchOctober, 1991Sluijter et al.
5053814Image forming apparatusOctober, 1991Takano et al.
5051838Portable electronic copying machineSeptember, 1991Cho et al.
5049898Printhead having memory elementSeptember, 1991Arthur et al.
5043748Recording apparatusAugust, 1991Katayama et al.
5043561Fare collection system using a boarding ticket and additional money cardAugust, 1991Kimata
5040006CameraAugust, 1991Matsumura et al.
5036472Computer controlled machine for vending personalized products or the likeJuly, 1991Buckley et al.
5035929Three dimensional pictureJuly, 1991Myers
5035325Cassette for thermal transfer printing filmJuly, 1991Kitsuki
5032922Platen accessory for portable copierJuly, 1991Stemmle
5031049Automatic object image follow-up deviceJuly, 1991Toyama et al.
5028997Television camera apparatusJuly, 1991Elberbaum
5028409Method and apparatus for recovering sulfur from gases containing hydrogen sulfideJuly, 1991Gitman
5026042Sheet feeder for copiers and printersJune, 1991Miller
5021892Image processing device of multifunctional typeJune, 1991Kita et al.
5020926Printer mounting arrangementJune, 1991Wilhelm
5018072Optically readable mail system with general and receiver specific informationMay, 1991Ibamoto et al.
5016112Combined video recorder and camera with superimposition of video and dataMay, 1991Nakajima et al.
5016037Flash photographing systemMay, 1991Taniguchi et al.
5012349Method and portable device for detection, storage and for eventual processing and reproduction of graphic symbols appearing on any type of carrierApril, 1991de Fay
5009626Human lifelike dolls, mannequins and humanoids and pet animal dolls and methods of individualizing and personalizing sameApril, 1991Katz
5006929Method for encoding and transmitting video signals as overall motion vectors and local motion vectorsApril, 1991Barbero et al.
5005998Cartridge for a printer systemApril, 1991Takanashi et al.
4999647Synchronous stimulation for long array continuous ink jet printerMarch, 1991Wood et al.
4993405Imaging apparatusFebruary, 1991Takamura et al.
4991205Personal identification system and methodFebruary, 1991Lemelson
4990005Printer that prints a table of information about printing effects using the selected printing effectsFebruary, 1991Karakawa
4987030High-tenacity conjugated fiber and process for preparation thereofJanuary, 1991Saito et al.
4985848High speed image processing system using separate data processor and address generatorJanuary, 1991Pfeiffer et al.
4983996Data recording apparatus for still cameraJanuary, 1991Kinoshita
4980856IC memory cartridge and a method for providing external IC memory cartridges to an electronic device extending end-to-endDecember, 1990Ueno
4979838Receipt cutting mechanism for dot matrix printerDecember, 1990Yokota et al.
4977459Ink-jet recording apparatus with mechanism for automatically regulating a recording headDecember, 1990Ebinuma et al.
4975969Method and apparatus for uniquely identifying individuals by particular physical characteristics and security system utilizing the sameDecember, 1990Tal
RE33425Handy reader/printer apparatusNovember, 1990Nihei
4965596Ink jet recording apparatus with waste ink distribution paths to plural cartridgesOctober, 1990Nagoshi et al.
4964066Device for editing and displaying data recorded on specialized sheets or recordsOctober, 1990Yamane et al.
4961088Monitor/warranty system for electrostatographic reproducing machines using replaceable cartridgesOctober, 1990Gilliland et al.
4956656Control device for use in a camera having a consecutive picture taking mode and a single picture taking modeSeptember, 1990Yamamoto et al.
4954910Recorder displaying recording sheet quantity available on remaining web sheet supplySeptember, 1990Ueno
4952967Timer-assisted photographing mode control device for cameraAugust, 1990Kazumi et al.
4949391Adaptive image acquisition systemAugust, 1990Faulkerson et al.
4949189Two-sided document scanning apparatusAugust, 1990Ohmori
4947262Hand-held manually sweeping printing apparatusAugust, 1990Yajima et al.
4943820Portable camera supportJuly, 1990Larock
4942470Real time processor for video signalsJuly, 1990Nishitani et al.
4937676Electronic camera system with detachable printerJune, 1990Finelli et al.
4914452Ink sheet/recording paper cassetteApril, 1990Fukawa
4905029Audio still camera systemFebruary, 1990Kelley
4904100Cartridge and printer system for using roll print mediaFebruary, 1990Enix
4903132Electronic still camera with slow-in, fast out memory addressingFebruary, 1990Yamawaki
4902880Card reader system and method with printing and verification capabilityFebruary, 1990Garczynski et al.
4897724Apparatus and method for reproducing digitized video pictures, with inclined plane error restorationJanuary, 1990Veldhuis
4897719Image pre-processing sub-systemJanuary, 1990Girffin
4896029Polygonal information encoding article, process and systemJanuary, 1990Chandler et al.
4890832Compact electronic apparatus with removable processing unitsJanuary, 1990Komaki
4887161Memory cartridge and digital electronic still video camera in which said memory cartridge is freely loadable/unloadableDecember, 1989Watanabe et al.
4882702Programmable controller with I/O expansion module located in one of I/O module positions for communication with outside I/O modulesNovember, 1989Struger et al.
4875173Image enlarging method and deviceOctober, 1989Nakajima
4875074Image recording apparatusOctober, 1989Sangyoji et al.
4875048Two-step parallel analog to digital converterOctober, 1989Shimizu et al.
4868676Manual copying apparatusSeptember, 1989Matsuura et al.
4864494Software usage authorization system with key for decrypting/re-encrypting/re-transmitting moving target security codes from protected softwareSeptember, 1989Kobus, Jr.
4862208Information transmitting device for cameraAugust, 1989Yamada et al.
4861031Card wrestling gameAugust, 1989Simms
4860375High speed cellular processing systemAugust, 1989McCubbrey et al.
4853967Method for automatic optical inspection analysis of integrated circuitsAugust, 1989Mandeville
4845770Method and apparatus for processing embossed cardJuly, 1989Koshida
4845767Image signal processorJuly, 1989Mori et al.
4841375Image-resolution conversion apparatus for converting a pixel-density of image dataJune, 1989Nakajima et al.
4837628Electronic still camera for recording still picture on memory card with mode selecting shutter releaseJune, 1989Sasaki
4835388Thermoluminescence dosimetry card reader heating assemblyMay, 1989Bruml et al.
4833599Hierarchical priority branch handling for parallel execution in a parallel processorMay, 1989Colwell et al.
4829324Large array thermal ink jet printheadMay, 1989Drake et al.
4821208Display processors accommodating the description of color pixels in variable-length codesApril, 1989Ryan et al.
4819395Textile reinforced structural componentsApril, 1989Sugita et al.
4809345Method of and apparatus for enlarging/reducing two-dimensional imagesFebruary, 1989Tabata et al.
4804831Focus detecting apparatus independent of object image contrastFebruary, 1989Baba et al.
4796087Process for coding by transformation for the transmission of picture signalsJanuary, 1989Guichard et al.
4796038Laser pattern generation apparatusJanuary, 1989Allen et al.
4791443Photographic processor with auxiliary power supplyDecember, 1988Foley et al.
4788563Recording apparatusNovember, 1988Omo et al.
4786820Apparatus for parallel-processing image dataNovember, 1988Ogino et al.
4783823Card identifying method and apparatusNovember, 1988Tasaki et al.
4783700Image sensor unit and image reading apparatus having the unitNovember, 1988Nagane
4771342Method and apparatus for enhancing video-recorded images to film grade qualitySeptember, 1988Beesley
4771295Thermal ink jet pen body construction having improved ink storage and feed capabilitySeptember, 1988Baker et al.
4769764Modular computer system with portable travel unitSeptember, 1988Levanon
4763153Control device for use in a camera systemAugust, 1988Ishimura et al.
4762986Automatic focussing system including in-focus position prediction meansAugust, 1988Suda et al.
4754487Picture storage and retrieval system for various limited storage mediumsJune, 1988Newmuis
4746920Method and apparatus for clock managementMay, 1988Nellen et al.
4745544Master/slave sequencing processor with forced I/OMay, 1988Renner et al.
4741327Endoscope having bent circuit boardMay, 1988Yabe
4740269Process and apparatus for applying authenticating coding to value-carrying paperApril, 1988Berger et al.
4734713Thermal printerMarch, 1988Sato et al.
4734565Read-only optical card and systemMarch, 1988Pierce et al.
4728978Photographic cameraMarch, 1988Inoue et al.
4727245Portable data scanner with removable modular printerFebruary, 1988Dobbins et al.
4724395Median filter for reconstructing missing color samplesFebruary, 1988Freeman
4724307Marked card readerFebruary, 1988Dutton et al.
4710873Video game incorporating digitized images of being into game graphicsDecember, 1987Breslow et al.
4707713Image recording apparatusNovember, 1987Ayata et al.
4706130Image recording apparatus utilizing light emitting diodes with pixel shape correctionNovember, 1987Yamakawa
4703332Ink jet print head and printerOctober, 1987Crotti et al.
4692394Method of forming a personal information cardSeptember, 1987Drexler
4689683Computerized studio for motion picture film and television productionAugust, 1987Efron
4689642Ink-jet recording head with an elastic ink tank in a sealed casing held at a partial vacuum and having a breakable sealAugust, 1987Sugitani
4688105Video recording systemAugust, 1987Bloch et al.
4683477Ink jet print headJuly, 1987Braun et al.
4681430Method for focusing projection printerJuly, 1987Goel et al.
4672453Contact type image sensor and driving method thereforJune, 1987Sakamoto
4667208Control system for a color printerMay, 1987Shiraki et al.
4665556Image signal processorMay, 1987Fukushima et al.
4652935Graded facsimile image signal coding systemMarch, 1987Endoh et al.
4641980Printer with pivotable print head attached to medium carrier moveable through a casing openingFebruary, 1987Matsumoto
4640529Flexible non-distortable handcraft sheet material and method of applying printed designs theretoFebruary, 1987Katz
4639769Modifying color digital imagesJanuary, 1987Fleisher et al.
4639738Ink level detection system for ink jet printing apparatusJanuary, 1987Young et al.
4632585Image forming apparatusDecember, 1986Oyamatsu et al.
4596039Method for converting an image from a run end or run length representation to a bit mapJune, 1986Mitchell et al.
4592938Method of producing an internally reinforced thermoplastic film and film and articles produced therefromJune, 1986Benoit
4591900Encoding pattern for single chip CCD camera processing schemeMay, 1986Heeb et al.
4581710Method of editing dot pattern data for character and/or image representationsApril, 1986Hasslemeier
4580721Fluid containerApril, 1986Coffee et al.
4567529Image sensorJanuary, 1986Yamaguchi et al.358/482
4558326Purging system for ink jet recording apparatusDecember, 1985Kimura et al.
4550967Electrical connector memberNovember, 1985Riches et al.
4546434Method for designing apparelOctober, 1985Gioello
4544184Tamper-proof identification card and identification systemOctober, 1985Freund et al.
4534142Roof coveringAugust, 1985Drefahl
4531740Remote control system for a video computer gameJuly, 1985Green et al.
4528575Ink jet printing headJuly, 1985Matsuda et al.
4523235Electronic microcopier apparatusJune, 1985Rajchman
4521014Video game including user visual imageJune, 1985Sitrick
4518235Collapsible disposable cameraMay, 1985Reed et al.
4511907Color ink-jet printerApril, 1985Fukuchi
4500919Color reproduction systemFebruary, 1985Schreiber
4500183Film cassette and a photographing device using the sameFebruary, 1985Tanikawa
4494864Apparatus for stereoscopic photographyJanuary, 1985Smith et al.
4494862Computerized information processing system equipped with copying apparatusJanuary, 1985Tanaka
4488563Filter plugDecember, 1984Morifuji et al.
4472038Photographic cameraSeptember, 1984Muramatsu et al.
4463362Ink control baffle plates for ink jet printerJuly, 1984Thomas
4463359Droplet generating method and apparatus thereofJuly, 1984Ayata et al.
4455609Apparatus for realtime fast reconstruction and display of dose distributionJune, 1984Inamura et al.
4454517Printing apparatus with coacting printer head movement and paper advancementJune, 1984Kagaya
4436439Small printerMarch, 1984Koto
4434503Image information output apparatusFebruary, 1984Tanaka et al.
4429938Locking device for interfitting membersFebruary, 1984Flor
4429320Ink jet recording apparatusJanuary, 1984Hattori et al.
4414316Composite lenticular screen sheetNovember, 1983Conley
4402150Verification deviceSeptember, 1983Sullivan
4394730Multi-processor system employing job-swapping between different priority processorsJuly, 1983Suzuki et al.
4384272Image reading apparatusMay, 1983Tanaka et al.
4383458Film cutterMay, 1983Kitai et al.
4372694Electronic pocket calculatorFebruary, 1983Bovio et al.
4342051Method of and system for reproducing or transmitting half-tone imagesJuly, 1982Suzuki et al.
4317138Method and apparatus for facsimile sheet handlingFebruary, 1982Bryan et al.
4282535Circuit arrangement for the operation of recording nozzles in ink mosaic recording devicesAugust, 1981Kern et al.
4275413Linear interpolator for color correctionJune, 1981Sakamoto et al.
4270853Sound-recording instant-printing film and camera thereforJune, 1981Hatada et al.
4262301Electronic imaging cameraApril, 1981Erlichman
4262284Self-monitoring sealApril, 1981Stieff et al.
4258387Video telephoneMarch, 1981Lemelson et al.
4253476Tobacco filter and method of removing impurities from tobacco smokeMarch, 1981Sato
4244006Control device for television cameraJanuary, 1981Kitahara et al.
4234214Document carrying a legible code, and method and apparatus for producing sameNovember, 1980Lee
4224628General purpose combined alphanumeric/graphics printerSeptember, 1980Murray
4213694Copy production machinesJuly, 1980Kuseski
4200867System and method for painting images by synthetic color signal generation and controlApril, 1980Hill
4181940Multiprocessor for providing fault isolation test upon itselfJanuary, 1980Underwood et al.
4177514Graph architecture information processing systemDecember, 1979Rupp
4173401Apparatus for displaying alphanumeric information coded on a film cartridgeNovember, 1979Harvey
4172641PhototypesetterOctober, 1979Zoike et al.
4161749Printer for producing print of an electronically recorded imageJuly, 1979Erlichman
4092654Encoding systemMay, 1978Alasia
4088981Automated data entry and display systemMay, 1978Gott
4074324Instant electronic cameraFebruary, 1978Barrett
4048617Retrace data eliminationSeptember, 1977Neff
4045802Ink ejection printing apparatus comprising automatically actuated ejection orifice capAugust, 1977Fukazawa et al.
4034845Apparatus for stacking printed products continuously arriving from conveyor means, especially products arriving in an imbricated formationJuly, 1977Honegger
4000239Process for spinning naphthalate polyester fibersDecember, 1976Hamana et al.
3971065Color imaging arrayJuly, 1976Bayer
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United States Patent and Trademark Office, Office Action Issued in U.S. Appl. No. 13/621,046 Mailed Feb. 18, 2015.
Primary Examiner:
Menberu, Beniyam
Attorney, Agent or Firm:
Leydig, Voit & Mayer, Ltd.
Parent Case Data:

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. application Ser. No. 13/101,131 filed May 4, 2011, now U.S. Pat. No. 8,274,665 which is a continuation of U.S. application Ser. No. 10/656,791 filed Sep. 8, 2003, now issued U.S. Pat. No. 7,957,009, which is a continuation application of U.S. application Ser. No. 09/922,274 filed Aug. 6, 2001, now granted U.S. Pat. No. 6,618,117, which is a continuation-in-part application of U.S. application Ser. No. 09/113,053, filed Jul. 10, 1998, now granted U.S. Pat. No. 6,362,868. With respect to the present application, any disclaimer of claim scope made in the parent application or any predecessor or related application is hereby rescinded. Further, any disclaimer of claim scope that may occur in the present application should not be read back into any predecessor or related application.

U.S. application Ser. No. 09/113,053 and U.S. Pat. No. 6,238,044 are hereby incorporated by reference.

Claims:
We claim:

1. An image sensing and processing device comprising: an image sensor for sensing an image and configured to generate signals carrying pixel data representing the image; a selectable image processing algorithm identified by a human readable representation of an effect resulting from the image processing algorithm, selection of the image processing algorithm generating a data signal indicative of the image processing algorithm; and a system on a chip processor comprising: a plurality of parallel processing units; and an image sensor interface configured to facilitate communication between the image sensor and the system on a chip processor, wherein: the system on a chip processor is configured to receive the data signal indicative of the image processing algorithm and to utilize the data signal in providing a programming script to control the plurality of parallel processing units to perform the image processing algorithm on the pixel data.

2. The device according to claim 1, wherein the system on a chip processor further comprises an input buffer connected to the image sensor interface and the plurality of parallel processing units, wherein the input buffer facilitates receipt of the pixel data from the image sensor interface and further facilitates communication of the pixel data to the plurality of parallel processing units.

3. The device according to claim 1, wherein the image sensor is one of a charge coupled device and an active pixel sensor.

4. The device according to claim 1, wherein the programming script instructs the plurality of parallel processing units to perform at least one of an image warping effect, a convolution, a posterizing effect, a noise addition effect, an image enhancement filter, a painting algorithm, a brush jittering and manipulation edge detection filter, a tiling effect, an illumination via light sources effect, a bump map, a text, face and object detection attribute, adding a font to the image, adding a three dimensional font to the image, and adding a pre-rendered icon to the image.

5. The device according to claim 1, wherein the system on a chip processor includes a program memory, and the system on a chip processor is operable to write the programming script to the program memory and further operable to run the programming script from the program memory to the selected image processing algorithm to the pixel data.

6. The device according to claim 1, wherein the system on a chip processor further comprises a memory interface configured to facilitate communication between an external memory and the system on a chip processor.

7. The device according to claim 6, wherein the system on a chip processor is configured to convert the pixel data to image data, and write the image data to the external memory.

8. The device according to claim 7, wherein the system on a chip processor includes a display interface including a digital to analog converter, the display interface receives the image data from the memory and the digital to analog converter converts the image data to an image to be displayed on the display.

9. The device according to claim 1, wherein the image sensor interface is a state machine configured to send control information to the image sensor, the control information includes a frame sync pulse and a pixel clock pulse.

Description:

FIELD OF THE INVENTION

The present invention relates to an image sensing and printing device.

BACKGROUND OF THE INVENTION

Recently, digital printing technology has been proposed as a suitable replacement for traditional camera and photographic film techniques. The traditional film and photographic techniques rely upon a film roll having a number of pre-formatted negatives which are drawn past a lensing system and onto which is imaged a negative of a image taken by the lensing system. Upon the completion of a film roll, the film is rewound into its container and forwarded to a processing shop for processing and development of the negatives so as to produce a corresponding positive set of photos.

Unfortunately, such a system has a number of significant drawbacks. Firstly, the chemicals utilized are obviously very sensitive to light and any light impinging upon the film roll will lead to exposure of the film. They are therefore required to operate in a light sensitive environment where the light imaging is totally controlled. This results in onerous engineering requirements leading to increased expense. Further, film processing techniques require the utilizing of a “negative” and its subsequent processing onto a “positive” film paper through the utilization of processing chemicals and complex silver halide processing etc. This is generally unduly cumbersome, complex and expensive. Further, such a system through its popularity has lead to the standardization on certain size film formats and generally minimal flexibility is possible with the aforementioned techniques.

Recently, all digital cameras have been introduced. These camera devices normally utilize a charge coupled device (CCD) or other form of photosensor connected to a processing chip which in turn is connected to and controls a media storage device which can take the form of a detachable magnetic card. In this type of device, the image is captured by the CCD and stored on the magnetic storage device. At some later time, the image or images that have been captured are down loaded to a computer device and printed out for viewing. The digital camera has the disadvantage that access to images is non-immediate and the further post processing step of loading onto a computer system is required, the further post processing often being a hindrance to ready and expedient use.

At present, hardware for image processing demands processors that are capable of multi-media and high resolution processing. In this field, VLIW microprocessor chips have found favor rather than the Reduced Instruction Set Computer (RISC) chip or the Complex Instruction Set Computer (CISC) chip.

By way of background, a CISC processor chip can have an instruction set of well over 80 instructions, many of them very powerful and very specialized for specific control tasks. It is common for the instructions to all behave differently. For example, some might only operate on certain address spaces or registers, and others might only recognize certain addressing modes. This does result in a chip that is relatively slow, but that has powerful instructions. The advantages of the CISC architecture are that many of the instructions are macro-like, allowing the programmer to use one instruction in place of many simpler instructions. The problem of the slow speed has rendered these chips undesirable for image processing. Further, because of the macro-like instructions, it often occurs that the processor is not used to its full capacity.

The industry trend for general-purpose microprocessor design is for RISC designs. By implementing fewer instructions, the chip designed is able to dedicate some of the precious silicon real-estate for performance enhancing features. The benefits of RISC design simplicity are a smaller chip, smaller pin count, and relatively low power consumption.

Modern microprocessors are complex chip structures that utilize task scheduling and other devices to achieve rapid processing of complex instructions. For example, microprocessors for pre-Pentium type computers use RISC microprocessors together with pipelined superscalar architecture. On the other hand, microprocessors for Pentium and newer computers use CISC microprocessors together with pipelined superscalar architecture. These are expensive and complicated chips as a result of the many different tasks they are called upon to perform.

In application-specific electronic devices such as cameras, it is simply unnecessary and costly to incorporate such chips into these devices. However, image manipulation demands substantial processor performance. For this reason, Very Long Instruction Word processors have been found to be most suitable for the task. One of the reasons for this is that they can be tuned to suit image processing functions. This can result in an operational speed that is substantially higher than that of a desktop computer.

As is known, RISC architecture takes advantage of temporal parallelism by using pipelining and is limited to this approach. VLIW architectures can take advantage of spatial parallelism as well as temporal parallelism by using multiple functional units to execute several operations concurrently.

VLIW processors have multiple functional units connected through a globally shared register file. A central controller is provided that issues a long instruction word every cycle. Each instruction consists of multiple independent parallel operations. Further, each operation requires a statically known number of cycles to complete.

Instructions in VLIW architecture are very long and may contain hundreds of bits. Each instruction contains a number of operations that are executed in parallel. A compiler schedules operations in VLIW instructions. VLIW processes rely on advanced compilation techniques such as percolation scheduling that expose instruction level parallelism beyond the limits of basic blocks. In other words, the compiler breaks code defining the instructions into fragments and does complex scheduling. The architecture of the VLIW processor is completely exposed to the compiler so that the compiler has full knowledge of operation latencies and resource constraints of the processor implementation.

The advantages of the VLIW processor have led it to become a popular choice for image processing devices.

In FIG. 1A of the drawings, there is shown a prior art image processing device 1a that incorporates a VLIW microprocessor 2a. The microprocessor 1a includes a bus interface 3a.

The device 1a includes a CCD (charge coupled device) image sensor 4a. The device 1a includes a CCD interface 5a so that the CCD can be connected to the bus interface 2a, via a bus 6a. As is known, such CCD's are analog devices. It follows that the CCD interface 5a includes an analog/digital converter (ADC) 7a. A suitable memory 35a and other devices 36a are also connected to the bus 2a in a conventional fashion.

In FIG. 1B of the drawings, there is shown another example of a prior art image processing device. With reference to FIG. 1A, like reference numerals refer to like parts, unless otherwise specified.

In this example, the image sensor is in the form of a CMOS image sensor 8a. Typically, the CMOS image sensor 8a is in the form of an active pixel sensor. This form of sensor has become popular lately, since it is a digital device and can be manufactured using standard integrated circuit fabrication techniques.

The CMOS image sensor 8a includes a bus interface 9a that permits the image sensor 8a to be connected to the bus interface 2a via the bus 6a.

VLIW processors are generally, however, not yet the standard for digital video cameras. A schematic diagram indicating the main components of a digital video camera 10a is shown in FIG. 1C.

The camera 10a includes an MPEG encoder 11a that is connected to a microcontroller 12a. The MPEG encoder 11a and the microcontroller 12a both communicate with an ASIC (application specific integrated circuit) 13a that, in turn, controls a digital tape drive 14a. A CCD 15a is connected to the MPEG encoder 11a, via an ADC 16a and an image processor 17a. A suitable memory 18a is connected to the MPEG encoder 11a.

In order for an image sensor device, be it a CCD or a CMOS Active Pixel Sensor (APS), to communicate with a VLIW processor, it is necessary for signals generated by an image sensor to be converted into a form which is readable by the VLIW processor. Further, control signals generated by the VLIW processor must be converted into a form that is suitable for reading by the image sensor.

In the case of a CCD device, this is done with a bus interface in combination with a CCD interface that includes an ADC. In the case of an APS, this is done with a bus interface that also receives signals from other devices controlled by the VLIW processor.

At present, an image sensing interface does not form part of a VLIW processor. This results in the necessity for an interface to be provided with the image sensor device or as an intermediate component. As a result, a bus interface of the VLIW processor is required to receive signals from this suitable interface and from other components such as memory devices. Image processing operations result in the transfer of large amounts of data. Furthermore, it is necessary to carry out a substantial amount of data processing as a result of the size of the instruction words used by the VLIW processor. This can result in an excessive demand being made of the bus interface. Further, as can be seen in the description of the prior art, it is necessary to provide at least two interfaces between the image sensor and the VLIW processor.

Applicant has filed a large number of patent applications in the field of integrated circuits and integrated circuit manufacture. As a result, the Applicant has spent much time investigating commercially viable integrated circuit devices that would be suitable for mass manufacture. As a result of the time and effort spent by the Applicant in developing this technology the Applicant has investigated the possibility of using microcontrollers to achieve low cost, yet complex image processing devices.

A microcontroller is an integrated chip that includes, on one chip, all or most of the components needed for a controller. A microcontroller is what is known as a “system on a chip.” A microcontroller can typically include the following components:

CPU (central processing unit);

RAM (Random Access Memory);

EPROM/PROM/ROM (Erasable Programmable Read Only Memory);

bus interface/s;

timers; and an

interrupt controller.

An advantage of microcontrollers is that by only including the features specific to the task (control), cost is relatively low. A typical microcontroller has bit manipulation instructions, easy and direct access to I/O (input/output) data, and quick and efficient interrupt processing. Microcontrollers are a “one-chip solution” which reduces parts count and design costs. The fact that a microcontroller is in the form of a single chip allows the manufacture of controlling devices to take place in a single integrated circuit fabrication process.

In this invention, the Applicant has conceived a microcontroller that includes a VLIW processor. In particular, the Applicant believes that a microcontroller can be provided that is specifically suited for image processing. It is submitted that this approach is generally counter-intuitive, since VLIW processors are generally used in the format shown in the drawings indicating the prior art. The reason for this is that the fabrication techniques are extremely complex. However, Applicant believes that, in the event that a sufficiently large number of microcontrollers are manufactured, the cost per unit will drop exponentially. Applicant intends utilizing the microcontroller of the present invention in a device that it is envisaged will have a high turnover. At present, it has been simply more convenient for manufacturers of image processing devices to obtain a standard VLIW processor and to program it to suit the particular application.

SUMMARY OF THE INVENTION

According to an aspect of the present disclosure, an image sensing and printing digital camera device comprises a housing defining a slot for receiving a printed instruction card having printed thereon an array of dots representing a programming script, the housing further storing therein a roll of print media; an area image sensor for sensing an image and generating pixel data representing the image; a linear image sensor for scanning the array of dots on the card and converting the array of dots into a data signal; a microcontroller provided in the housing, the microcontroller for decoding the data signal into the programming script and applying the programming script on the pixel data; a printing mechanism for printing on the pixel data, having applied thereto the programming script, on the roll of print media; a guillotine for cutting the roll of print media; and a print manager for activating the guillotine upon receipt of a signal indicate of a manual attempt to pull the print media from the housing.

BRIEF DESCRIPTION OF THE DRAWINGS

Notwithstanding any other forms that may fall within the scope of the present invention, preferred forms of the invention will now be described, by way of example only, with reference to the accompanying drawings in which:

FIG. 1 illustrates an Artcam device constructed in accordance with the preferred embodiment;

FIG. 1A illustrates a prior art image processing device that includes a CCD image sensor;

FIG. 1B illustrates a prior art image processing device that includes an APS (active pixel sensor);

FIG. 1C illustrates a prior art image processing device that includes an MPEG decoder;

FIG. 1D illustrates a schematic block diagram of an image processing device of the invention, including a CCD image sensor;

FIG. 1E illustrates a schematic block diagram of an image processing device of the invention, including an APS;

FIG. 1F includes a schematic block diagram of a digital video camera of the invention;

FIG. 2 is a schematic block diagram of the main Artcam electronic components;

FIG. 3 is a schematic block diagram of the Artcam Central Processor;

FIG. 3(a) illustrates the VLIW Vector Processor in more detail;

FIG. 4 illustrates the Processing Unit in more detail;

FIG. 5 illustrates the ALU 188 in more detail;

FIG. 6 illustrates the In block in more detail;

FIG. 7 illustrates the Out block in more detail;

FIG. 8 illustrates the Registers block in more detail;

FIG. 9 illustrates the Crossbar1 in more detail;

FIG. 10 illustrates the Crossbar2 in more detail;

FIG. 11 illustrates the read process block in more detail;

FIG. 12 illustrates the read process block in more detail;

FIG. 13 illustrates the barrel shifter block in more detail;

FIG. 14 illustrates the adder/logic block in more detail;

FIG. 15 illustrates the multiply block in more detail;

FIG. 16 illustrates the I/O address generator block in more detail;

FIG. 17 illustrates a pixel storage format;

FIG. 18 illustrates a sequential read iterator process;

FIG. 19 illustrates a box read iterator process;

FIG. 20 illustrates a box write iterator process;

FIG. 21 illustrates the vertical strip read/write iterator process;

FIG. 22 illustrates the vertical strip read/write iterator process;

FIG. 23 illustrates the generate sequential process;

FIG. 24 illustrates the generate sequential process;

FIG. 25 illustrates the generate vertical strip process;

FIG. 26 illustrates the generate vertical strip process;

FIG. 27 illustrates a pixel data configuration;

FIG. 28 illustrates a pixel processing process;

FIG. 29 illustrates a schematic block diagram of the display controller;

FIG. 30 illustrates the CCD image organization;

FIG. 31 illustrates the storage format for a logical image;

FIG. 32 illustrates the internal image memory storage format;

FIG. 33 illustrates the image pyramid storage format;

FIG. 34 illustrates a time line of the process of sampling an Artcard;

FIG. 35 illustrates the super sampling process;

FIG. 36 illustrates the process of reading a rotated Artcard;

FIG. 37 illustrates a flow chart of the steps necessary to decode an Artcard;

FIG. 38 illustrates an enlargement of the left hand corner of a single Artcard;

FIG. 39 illustrates a single target for detection;

FIG. 40 illustrates the method utilised to detect targets;

FIG. 41 illustrates the method of calculating the distance between two targets;

FIG. 42 illustrates the process of centroid drift;

FIG. 43 shows one form of centroid lookup table;

FIG. 44 illustrates the centroid updating process;

FIG. 45 illustrates a delta processing lookup table utilised in the preferred embodiment;

FIG. 46 illustrates the process of unscrambling Artcard data;

FIG. 47 illustrates a magnified view of a series of dots;

FIG. 48 illustrates the data surface of a dot card;

FIG. 49 illustrates schematically the layout of a single datablock;

FIG. 50 illustrates a single datablock;

FIG. 51 and FIG. 52 illustrate magnified views of portions of the datablock of FIG. 50;

FIG. 53 illustrates a single target structure;

FIG. 54 illustrates the target structure of a datablock;

FIG. 55 illustrates the positional relationship of targets relative to border clocking regions of a data region;

FIG. 56 illustrates the orientation columns of a datablock;

FIG. 57 illustrates the array of dots of a datablock;

FIG. 58 illustrates schematically the structure of data for Reed-Solomon encoding;

FIG. 59 illustrates an example Reed-Solomon encoding;

FIG. 60 illustrates the Reed-Solomon encoding process;

FIG. 61 illustrates the layout of encoded data within a datablock;

FIG. 62 illustrates the sampling process in sampling an alternative Artcard;

FIG. 63 illustrates, in exaggerated form, an example of sampling a rotated alternative Artcard;

FIG. 64 illustrates the scanning process;

FIG. 65 illustrates the likely scanning distribution of the scanning process;

FIG. 66 illustrates the relationship between probability of symbol errors and Reed-Solomon block errors;

FIG. 67 illustrates a flow chart of the decoding process;

FIG. 68 illustrates a process utilization diagram of the decoding process;

FIG. 69 illustrates the dataflow steps in decoding;

FIG. 70 illustrates the reading process in more detail;

FIG. 71 illustrates the process of detection of the start of an alternative Artcard in more detail;

FIG. 72 illustrates the extraction of bit data process in more detail;

FIG. 73 illustrates the segmentation process utilized in the decoding process;

FIG. 74 illustrates the decoding process of finding targets in more detail;

FIG. 75 illustrates the data structures utilized in locating targets;

FIG. 76 illustrates the Lancos 3 function structure;

FIG. 77 illustrates an enlarged portion of a datablock illustrating the clockmark and border region;

FIG. 78 illustrates the processing steps in decoding a bit image;

FIG. 79 illustrates the dataflow steps in decoding a bit image;

FIG. 80 illustrates the descrambling process of the preferred embodiment;

FIG. 81 illustrates one form of implementation of the convolver;

FIG. 82 illustrates a convolution process;

FIG. 83 illustrates the compositing process;

FIG. 84 illustrates the regular compositing process in more detail;

FIG. 85 illustrates the process of warping using a warp map;

FIG. 86 illustrates the warping bi-linear interpolation process;

FIG. 87 illustrates the process of span calculation;

FIG. 88 illustrates the basic span calculation process;

FIG. 89 illustrates one form of detail implementation of the span calculation process;

FIG. 90 illustrates the process of reading image pyramid levels;

FIG. 91 illustrates using the pyramid table for bilinear interpolation;

FIG. 92 illustrates the histogram collection process;

FIG. 93 illustrates the color transform process;

FIG. 94 illustrates the color conversion process;

FIG. 95 illustrates the color space conversion process in more detail;

FIG. 96 illustrates the process of calculating an input coordinate;

FIG. 97 illustrates the process of compositing with feedback;

FIG. 98 illustrates the generalized scaling process;

FIG. 99 illustrates the scale in X scaling process;

FIG. 100 illustrates the scale in Y scaling process;

FIG. 101 illustrates the tessellation process;

FIG. 102 illustrates the sub-pixel translation process;

FIG. 103 illustrates the compositing process;

FIG. 104 illustrates the process of compositing with feedback;

FIG. 105 illustrates the process of tiling with color from the input image;

FIG. 106 illustrates the process of tiling with feedback;

FIG. 107 illustrates the process of tiling with texture replacement;

FIG. 108 illustrates the process of tiling with color from the input image;

FIG. 108 illustrates the process of tiling with color from the input image;

FIG. 109 illustrates the process of applying a texture without feedback;

FIG. 110 illustrates the process of applying a texture with feedback;

FIG. 111 illustrates the process of rotation of CCD pixels;

FIG. 112 illustrates the process of interpolation of Green subpixels;

FIG. 113 illustrates the process of interpolation of Blue subpixels;

FIG. 114 illustrates the process of interpolation of Red subpixels;

FIG. 115 illustrates the process of CCD pixel interpolation with 0 degree rotation for odd pixel lines;

FIG. 116 illustrates the process of CCD pixel interpolation with 0 degree rotation for even pixel lines;

FIG. 117 illustrates the process of color conversion to Lab color space;

FIG. 118 illustrates the process of calculation of 1/√X;

FIG. 119 illustrates the implementation of the calculation of 1/√X in more detail;

FIG. 120 illustrates the process of Normal calculation with a bump map;

FIG. 121 illustrates the process of illumination calculation with a bump map;

FIG. 122 illustrates the process of illumination calculation with a bump map in more detail;

FIG. 123 illustrates the process of calculation of L using a directional light;

FIG. 124 illustrates the process of calculation of L using a Omni lights and spotlights;

FIG. 125 illustrates one form of implementation of calculation of L using a Omni lights and spotlights;

FIG. 126 illustrates the process of calculating the N.L dot product;

FIG. 127 illustrates the process of calculating the N.L dot product in more detail;

FIG. 128 illustrates the process of calculating the R.V dot product;

FIG. 129 illustrates the process of calculating the R.V dot product in more detail;

FIG. 130 illustrates the attenuation calculation inputs and outputs;

FIG. 131 illustrates an actual implementation of attenuation calculation;

FIG. 132 illustrates an graph of the cone factor;

FIG. 133 illustrates the process of penumbra calculation;

FIG. 134 illustrates the angles utilised in penumbra calculation;

FIG. 135 illustrates the inputs and outputs to penumbra calculation;

FIG. 136 illustrates an actual implementation of penumbra calculation;

FIG. 137 illustrates the inputs and outputs to ambient calculation;

FIG. 138 illustrates an actual implementation of ambient calculation;

FIG. 139 illustrates an actual implementation of diffuse calculation;

FIG. 140 illustrates the inputs and outputs to a diffuse calculation;

FIG. 141 illustrates an actual implementation of a diffuse calculation;

FIG. 142 illustrates the inputs and outputs to a specular calculation;

FIG. 143 illustrates an actual implementation of a specular calculation;

FIG. 144 illustrates the inputs and outputs to a specular calculation;

FIG. 145 illustrates an actual implementation of a specular calculation;

FIG. 146 illustrates an actual implementation of an ambient only calculation;

FIG. 147 illustrates the process overview of light calculation;

FIG. 148 illustrates an example illumination calculation for a single infinite light source;

FIG. 149 illustrates an example illumination calculation for an Omni light source without a bump map;

FIG. 150 illustrates an example illumination calculation for an Omni light source with a bump map;

FIG. 151 illustrates an example illumination calculation for a Spotlight light source without a bump map;

FIG. 152 illustrates the process of applying a single Spotlight onto an image with an associated bump-map;

FIG. 153 illustrates the logical layout of a single printhead;

FIG. 154 illustrates the structure of the printhead interface;

FIG. 155 illustrates the process of rotation of a Lab image;

FIG. 156 illustrates the format of a pixel of the printed image;

FIG. 157 illustrates the dithering process;

FIG. 158 illustrates the process of generating an 8 bit dot output;

FIG. 159 illustrates a perspective view of the card reader;

FIG. 160 illustrates an exploded perspective of a card reader;

FIG. 161 illustrates a close up view of the Artcard reader;

FIG. 162 illustrates a perspective view of the print roll and print head;

FIG. 163 illustrates a first exploded perspective view of the print roll;

FIG. 164 illustrates a second exploded perspective view of the print roll;

FIG. 164A illustrates a three dimensional view of another embodiment of the print roll and print head in the form of a printing cartridge also in accordance with the invention;

FIG. 164B illustrates a three dimensional, sectional view of the print cartridge of FIG. 164A;

FIG. 164C shows a three dimensional, exploded view of the print cartridge of FIG. 164A;

FIG. 164D shows a three dimensional, exploded view of an ink cartridge forming part of the print cartridge of FIG. 164A;

FIG. 164E shows a three dimensional view of an air filter of the print cartridge of FIG. 164A;

FIG. 165 illustrates the print roll authentication chip;

FIG. 166 illustrates an enlarged view of the print roll authentication chip;

FIG. 167 illustrates a single authentication chip data protocol;

FIG. 168 illustrates a dual authentication chip data protocol;

FIG. 169 illustrates a first presence only protocol;

FIG. 170 illustrates a second presence only protocol;

FIG. 171 illustrates a third data protocol;

FIG. 172 illustrates a fourth data protocol;

FIG. 173 is a schematic block diagram of a maximal period LFSR;

FIG. 174 is a schematic block diagram of a clock limiting filter;

FIG. 175 is a schematic block diagram of the tamper detection lines;

FIG. 176 illustrates an oversized nMOS transistor;

FIG. 177 illustrates the taking of multiple XORs from the Tamper Detect Line

FIG. 178 illustrates how the Tamper Lines cover the noise generator circuitry;

FIG. 179 illustrates the normal form of FET implementation;

FIG. 180 illustrates the modified form of FET implementation of the preferred embodiment;

FIG. 181 illustrates a schematic block diagram of the authentication chip;

FIG. 182 illustrates an example memory map;

FIG. 183 illustrates an example of the constants memory map;

FIG. 184 illustrates an example of the RAM memory map;

FIG. 185 illustrates an example of the Flash memory variables memory map;

FIG. 186 illustrates an example of the Flash memory program memory map;

FIG. 187 shows the data flow and relationship between components of the State Machine;

FIG. 188 shows the data flow and relationship between components of the I/O Unit.

FIG. 189 illustrates a schematic block diagram of the Arithmetic Logic Unit;

FIG. 190 illustrates a schematic block diagram of the RPL unit;

FIG. 191 illustrates a schematic block diagram of the ROR block of the ALU;

FIG. 192 is a block diagram of the Program Counter Unit;

FIG. 193 is a block diagram of the Memory Unit;

FIG. 194 shows a schematic block diagram for the Address Generator Unit;

FIG. 195 shows a schematic block diagram for the JSIGEN Unit;

FIG. 196 shows a schematic block diagram for the JSRGEN Unit.

FIG. 197 shows a schematic block diagram for the DBRGEN Unit;

FIG. 198 shows a schematic block diagram for the LDKGEN Unit;

FIG. 199 shows a schematic block diagram for the RPLGEN Unit;

FIG. 200 shows a schematic block diagram for the VARGEN Unit.

FIG. 201 shows a schematic block diagram for the CLRGEN Unit.

FIG. 202 shows a schematic block diagram for the BITGEN Unit.

FIG. 203 sets out the information stored on the print roll authentication chip;

FIG. 204 illustrates the data stored within the Artcam authorization chip;

FIG. 205 illustrates the process of print head pulse characterization;

FIG. 206 is an exploded perspective, in section, of the print head ink supply mechanism;

FIG. 207 is a bottom perspective of the ink head supply unit;

FIG. 208 is a bottom side sectional view of the ink head supply unit;

FIG. 209 is a top perspective of the ink head supply unit;

FIG. 210 is a top side sectional view of the ink head supply unit;

FIG. 211 illustrates a perspective view of a small portion of the print head;

FIG. 212 illustrates is an exploded perspective of the print head unit;

FIG. 213 illustrates a top side perspective view of the internal portions of an Artcam camera, showing the parts flattened out;

FIG. 214 illustrates a bottom side perspective view of the internal portions of an Artcam camera, showing the parts flattened out;

FIG. 215 illustrates a first top side perspective view of the internal portions of an Artcam camera, showing the parts as encased in an Artcam;

FIG. 216 illustrates a second top side perspective view of the internal portions of an Artcam camera, showing the parts as encased in an Artcam;

FIG. 217 illustrates a second top side perspective view of the internal portions of an Artcam camera, showing the parts as encased in an Artcam;

FIG. 218 illustrates the backing portion of a postcard print roll;

FIG. 219 illustrates the corresponding front image on the postcard print roll after printing out images;

FIG. 220 illustrates a form of print roll ready for purchase by a consumer;

FIG. 221 illustrates a layout of the software/hardware modules of the overall Artcam application;

FIG. 222 illustrates a layout of the software/hardware modules of the Camera Manager;

FIG. 223 illustrates a layout of the software/hardware modules of the Image Processing Manager;

FIG. 224 illustrates a layout of the software/hardware modules of the Printer Manager;

FIG. 225 illustrates a layout of the software/hardware modules of the Image Processing Manager;

FIG. 226 illustrates a layout of the software/hardware modules of the File Manager;

FIG. 227 illustrates a perspective view, partly in section, of an alternative form of printroll;

FIG. 228 is a left side exploded perspective view of the print roll of FIG. 227;

FIG. 229 is a right side exploded perspective view of a single printroll;

FIG. 230 is an exploded perspective view, partly in section, of the core portion of the printroll; and

FIG. 231 is a second exploded perspective view of the core portion of the printroll.

DESCRIPTION OF PREFERRED AND OTHER EMBODIMENTS

The digital image processing camera system constructed in accordance with the preferred embodiment is as illustrated in FIG. 1. The camera unit 1 includes means for the insertion of an integral print roll (not shown). The camera unit 1 can include an area image sensor 2 which sensors an image 3 for captured by the camera. Optionally, the second area image sensor can be provided to also image the scene 3 and to optionally provide for the production of stereographic output effects.

The camera 1 can include an optional color display 5 for the display of the image being sensed by the sensor 2. When a simple image is being displayed on the display 5, the button 6 can be depressed resulting in the printed image 8 being output by the camera unit 1. A series of cards, herein after known as “Artcards” 9 contain, on one surface encoded information and on the other surface, contain an image distorted by the particular effect produced by the Artcard 9. The Artcard 9 is inserted in an Artcard reader 10 in the side of camera 1 and, upon insertion, results in output image 8 being distorted in the same manner as the distortion appearing on the surface of Artcard 9. Hence, by means of this simple user interface a user wishing to produce a particular effect can insert one of many Artcards 9 into the Artcard reader 10 and utilize button 19 to take a picture of the image 3 resulting in a corresponding distorted output image 8.

The camera unit 1 can also include a number of other control button 13, 14 in addition to a simple LCD output display 15 for the display of informative information including the number of printouts left on the internal print roll on the camera unit. Additionally, different output formats can be controlled by CHP switch 17.

Image Processing Apparatus 20a

In FIG. 1D, reference numeral 20a generally indicates an image processing apparatus in accordance with the invention.

The image processing apparatus 20a includes a microcontroller 22a. The microcontroller 22a includes circuitry that defines a VLIW processor that is indicated generally at 21a. The operational details and structure of the VLIW processor is described in further detail later on in the specification.

The microcontroller also includes circuitry that defines a bus interface 23a. The bus interface permits the VLIW processor 21a to communicate with other devices indicated at 24a and with a memory, such as DRAM or EEPROM, indicated at 25a.

The apparatus 20a includes an image sensor in the form of a CCD (charge-coupled device) sensor 26a. These sensors are widely used for image sensing. As is known, such sensors produce an analog signal upon sensing an image. It follows that it is necessary that such a signal be converted into a digital signal in order that it can be processed by the VLIW processor 21a. Further, as set out in the preamble and later on in the specification, the VLIW processor 21a makes use of long instruction words in order to process data.

Thus, the microcontroller 22a includes interface circuitry 28a that defines an interface 27a that is capable of converting a signal emanating from the image sensor 26a into a signal that can be read by the VLIW processor 21a. Further, the interface circuitry 28a defines an analog/digital converter (ADC) 29a for converting signals passing between the VLIW processor 21a and the CCD sensor 26a into an appropriate analog or digital signal.

It is important to note that the interface circuitry 28a and the VLIW processor 21a share a common wafer substrate. This provides a compact and self-contained microcontroller that is specifically suited to image processing.

In FIG. 1E, reference numeral 30a generally indicates a further image processing apparatus in accordance with the invention. With reference to FIG. 1D, like reference numerals refer to like parts, unless otherwise specified.

Instead of the CCD sensor 26a, the apparatus 30a includes a CMOS type sensor in the form of an active pixel sensor (APS) 31a.

Such sensors generate a digital signal upon sensing an image. It follows that, in this case, the interface circuitry 28a does not include the ADC 29a.

In FIG. 1F, reference numeral 32a generally indicates a schematic block diagram of a digital video camera, in accordance with the invention. With reference to FIGS. 1D and 1E, like reference numerals refer to like parts, unless otherwise specified.

In this example, the bus interface 23a is connected to a memory 33a and to a digital tape drive 34a.

The camera 32a includes a CCD sensor 35a. Thus, the interface circuitry 28 includes the ADC 29a to carry out the necessary analog/digital conversion as described above. A particular advantage of the VLIW processor 21a is that it facilitates the provision of image processing, MPEG encoding, digital tape formatting and control in a single integrated circuit device that is the microcontroller 22a.

Turning now to FIG. 2, there is illustrated a schematic view of the internal hardware of the camera unit 1. The internal hardware is based around an Artcam central processor unit (ACP) 31.

Artcam Central Processor 31

The Artcam central processor 31 provides many functions that form the ‘heart’ of the system. The ACP 31 is preferably implemented as a complex, high speed, CMOS system on-a-chip. Utilising standard cell design with some full custom regions is recommended. Fabrication on a 0.25 micron CMOS process will provide the density and speed required, along with a reasonably small die area.

The functions provided by the ACP 31 include:

1. Control and digitization of the area image sensor 2. A 3D stereoscopic version of the ACP requires two area image sensor interfaces with a second optional image sensor 4 being provided for stereoscopic effects.

2. Area image sensor compensation, reformatting, and image enhancement.

3. Memory interface and management to a memory store 33.

4. Interface, control, and analog to digital conversion of an Artcard reader linear image sensor 34 which is provided for the reading of data from the Artcards 9.

5. Extraction of the raw Artcard data from the digitized and encoded Artcard image.

6. Reed-Solomon error detection and correction of the Artcard encoded data. The encoded surface of the Artcard 9 includes information on how to process an image to produce the effects displayed on the image distorted surface of the Artcard 9. This information is in the form of a script, hereinafter known as a “Vark script”. The Vark script is utilised by an interpreter running within the ACP 31 to produce the desired effect.

7. Interpretation of the Vark script on the Artcard 9.

8. Performing image processing operations as specified by the Vark script.

9. Controlling various motors for the paper transport 36, zoom lens 38, autofocus 39 and Artcard driver 37.

10. Controlling a guillotine actuator 40 for the operation of a guillotine 41 for the cutting of photographs 8 from print roll 42.

11. Half-toning of the image data for printing.

12. Providing the print data to a print-head 44 at the appropriate times.

13. Controlling the print head 44.

14. Controlling the ink pressure feed to print-head 44.

15. Controlling optional flash unit 56.

16. Reading and acting on various sensors in the camera, including camera orientation sensor 46, autofocus 47 and Artcard insertion sensor 49.

17. Reading and acting on the user interface buttons 6, 13, 14.

18. Controlling the status display 15.

19. Providing viewfinder and preview images to the color display 5.

20. Control of the system power consumption, including the ACP power consumption via power management circuit 51.

21. Providing external communications 52 to general purpose computers (using part USB).

22. Reading and storing information in a printing roll authentication chip 53.

23. Reading and storing information in a camera authentication chip 54.

24. Communicating with an optional mini-keyboard 57 for text modification.

Quartz Crystal 58

A quartz crystal 58 is used as a frequency reference for the system clock. As the system clock is very high, the ACP 31 includes a phase locked loop clock circuit to increase the frequency derived from the crystal 58.

Image Sensing

Area Image Sensor 2

The area image sensor 2 converts an image through its lens into an electrical signal. It can either be a charge coupled device (CCD) or an active pixel sensor (APS) CMOS image sector. At present, available CCD's normally have a higher image quality, however, there is currently much development occurring in CMOS imagers. CMOS imagers are eventually expected to be substantially cheaper than CCD's have smaller pixel areas, and be able to incorporate drive circuitry and signal processing. They can also be made in CMOS fabs, which are transitioning to 12″ wafers. CCD's are usually built in 6″ wafer fabs, and economics may not allow a conversion to 12″ fabs. Therefore, the difference in fabrication cost between CCD's and CMOS imagers is likely to increase, progressively favoring CMOS imagers. However, at present, a CCD is probably the best option.

The Artcam unit will produce suitable results with a 1,500×1,000 area image sensor. However, smaller sensors, such as 750×500, will be adequate for many markets. The Artcam is less sensitive to image sensor resolution than are conventional digital cameras. This is because many of the styles contained on Artcards 9 process the image in such a way as to obscure the lack of resolution. For example, if the image is distorted to simulate the effect of being converted to an impressionistic painting, low source image resolution can be used with minimal effect. Further examples for which low resolution input images will typically not be noticed include image warps which produce high distorted images, multiple miniature copies of the of the image (eg. passport photos), textural processing such as bump mapping for a base relief metal look, and photo-compositing into structured scenes.

This tolerance of low resolution image sensors may be a significant factor in reducing the manufacturing cost of an Artcam unit 1 camera. An Artcam with a low cost 750×500 image sensor will often produce superior results to a conventional digital camera with a much more expensive 1,500×1,000 image sensor.

Optional Stereoscopic 3D Image Sensor 4

The 3D versions of the Artcam unit 1 have an additional image sensor 4, for stereoscopic operation. This image sensor is identical to the main image sensor. The circuitry to drive the optional image sensor may be included as a standard part of the ACP chip 31 to reduce incremental design cost. Alternatively, a separate 3D Artcam ACP can be designed. This option will reduce the manufacturing cost of a mainstream single sensor Artcam.

Print Roll Authentication Chip 53

A small chip 53 is included in each print roll 42. This chip replaced the functions of the bar code, optical sensor and wheel, and ISO/ASA sensor on other forms of camera film units such as Advanced Photo Systems film cartridges.

The authentication chip also provides other features:

1. The storage of data rather than that which is mechanically and optically sensed from APS rolls

2. A remaining media length indication, accurate to high resolution.

3. Authentication Information to prevent inferior clone print roll copies.

The authentication chip 53 contains 1024 bits of Flash memory, of which 128 bits is an authentication key, and 512 bits is the authentication information. Also included is an encryption circuit to ensure that the authentication key cannot be accessed directly.

Print-Head 44

The Artcam unit 1 can utilize any color print technology which is small enough, low enough power, fast enough, high enough quality, and low enough cost, and is compatible with the print roll. Relevant printheads will be specifically discussed hereinafter.

The specifications of the ink jet head are:

Image typeBi-level, dithered
ColorCMY Process Color
Resolution1600 dpi
Print head length‘Page-width’ (100 mm)
Print speed2 seconds per photo

Optional Ink Pressure Controller (not Shown)

The function of the ink pressure controller depends upon the type of ink jet print head 44 incorporated in the Artcam. For some types of ink jet, the use of an ink pressure controller can be eliminated, as the ink pressure is simply atmospheric pressure. Other types of print head require a regulated positive ink pressure. In this case, the in pressure controller consists of a pump and pressure transducer.

Other print heads may require an ultrasonic transducer to cause regular oscillations in the ink pressure, typically at frequencies around 100 KHz. In the case, the ACP 31 controls the frequency phase and amplitude of these oscillations.

Paper Transport Motor 36

The paper transport motor 36 moves the paper from within the print roll 42 past the print head at a relatively constant rate. The motor 36 is a miniature motor geared down to an appropriate speed to drive rollers which move the paper. A high quality motor and mechanical gears are required to achieve high image quality, as mechanical rumble or other vibrations will affect the printed dot row spacing.

Paper Transport Motor Driver 60

The motor driver 60 is a small circuit which amplifies the digital motor control signals from the APC 31 to levels suitable for driving the motor 36.

Paper Pull Sensor

A paper pull sensor 50 detects a user's attempt to pull a photo from the camera unit during the printing process. The APC 31 reads this sensor 50, and activates the guillotine 41 if the condition occurs. The paper pull sensor 50 is incorporated to make the camera more ‘foolproof’ in operation. Were the user to pull the paper out forcefully during printing, the print mechanism 44 or print roll 42 may (in extreme cases) be damaged. Since it is acceptable to pull out the ‘pod’ from a Polaroid type camera before it is fully ejected, the public has been ‘trained’ to do this. Therefore, they are unlikely to heed printed instructions not to pull the paper.

The Artcam preferably restarts the photo print process after the guillotine 41 has cut the paper after pull sensing.

The pull sensor can be implemented as a strain gauge sensor, or as an optical sensor detecting a small plastic flag which is deflected by the torque that occurs on the paper drive rollers when the paper is pulled. The latter implementation is recommendation for low cost.

Paper Guillotine Actuator 40

The paper guillotine actuator 40 is a small actuator which causes the guillotine 41 to cut the paper either at the end of a photograph, or when the paper pull sensor 50 is activated.

The guillotine actuator 40 is a small circuit which amplifies a guillotine control signal from the APC tot the level required by the actuator 41.

Artcard 9

The Artcard 9 is a program storage medium for the Artcam unit. As noted previously, the programs are in the form of Vark scripts. Vark is a powerful image processing language especially developed for the Artcam unit. Each Artcard 9 contains one Vark script, and thereby defines one image processing style.

Preferably, the VARK language is highly image processing specific. By being highly image processing specific, the amount of storage required to store the details on the card are substantially reduced. Further, the ease with which new programs can be created, including enhanced effects, is also substantially increased. Preferably, the language includes facilities for handling many image processing functions including image warping via a warp map, convolution, color lookup tables, posterizing an image, adding noise to an image, image enhancement filters, painting algorithms, brush uttering and manipulation edge detection filters, tiling, illumination via light sources, bump maps, text, face detection and object detection attributes, fonts, including three dimensional fonts, and arbitrary complexity pre-rendered icons. Further details of the operation of the Vark language interpreter are contained hereinafter.

Hence, by utilizing the language constructs as defined by the created language, new affects on arbitrary images can be created and constructed for inexpensive storage on Artcard and subsequent distribution to camera owners. Further, on one surface of the card can be provided an example illustrating the effect that a particular VARK script, stored on the other surface of the card, will have on an arbitrary captured image.

By utilizing such a system, camera technology can be distributed without a great fear of obsolescence in that, provided a VARK interpreter is incorporated in the camera device, a device independent scenario is provided whereby the underlying technology can be completely varied over time. Further, the VARK scripts can be updated as new filters are created and distributed in an inexpensive manner, such as via simple cards for card reading.

The Artcard 9 is a piece of thin white plastic with the same format as a credit card (86 mm long by 54 mm wide). The Artcard is printed on both sides using a high resolution ink jet printer. The inkjet printer technology is assumed to be the same as that used in the Artcam, with 1600 dpi (63 dpmm) resolution. A major feature of the Artcard 9 is low manufacturing cost. Artcards can be manufactured at high speeds as a wide web of plastic film. The plastic web is coated on both sides with a hydrophilic dye fixing layer. The web is printed simultaneously on both sides using a ‘pagewidth’ color ink jet printer. The web is then cut and punched into individual cards. On one face of the card is printed a human readable representation of the effect the Artcard 9 will have on the sensed image. This can be simply a standard image which has been processed using the Vark script stored on the back face of the card.

On the back face of the card is printed an array of dots which can be decoded into the Vark script that defines the image processing sequence. The print area is 80 mm×50 mm, giving a total of 15,876,000 dots. This array of dots could represent at least 1.89 Mbytes of data. To achieve high reliability, extensive error detection and correction is incorporated in the array of dots. This allows a substantial portion of the card to be defaced, worn, creased, or dirty with no effect on data integrity. The data coding used is Reed-Solomon coding, with half of the data devoted to error correction. This allows the storage of 967 Kbytes of error corrected data on each Artcard 9.

Linear Image Sensor 34

The Artcard linear sensor 34 converts the aforementioned Artcard data image to electrical signals. As with the area image sensor 2, 4, the linear image sensor can be fabricated using either CCD or APS CMOS technology. The active length of the image sensor 34 is 50 mm, equal to the width of the data array on the Artcard 9. To satisfy Nyquist's sampling theorem, the resolution of the linear image sensor 34 must be at least twice the highest spatial frequency of the Artcard optical image reaching the image sensor. In practice, data detection is easier if the image sensor resolution is substantially above this. A resolution of 4800 dpi (189 dpmm) is chosen, giving a total of 9,450 pixels. This resolution requires a pixel sensor pitch of 5.3 μm. This can readily be achieved by using four staggered rows of 20 μm pixel sensors.

The linear image sensor is mounted in a special package which includes a LED 65 to illuminate the Artcard 9 via a light-pipe (not shown).

The Artcard reader light-pipe can be a molded light-pipe which has several function:

1. It diffuses the light from the LED over the width of the card using total internal reflection facets.

2. It focuses the light onto a 16 μm wide strip of the Artcard 9 using an integrated cylindrical lens.

3. It focuses light reflected from the Artcard onto the linear image sensor pixels using a molded array of microlenses.

The operation of the Artcard reader is explained further hereinafter.

Artcard Reader Motor 37

The Artcard reader motor propels the Artcard past the linear image sensor 34 at a relatively constant rate. As it may not be cost effective to include extreme precision mechanical components in the Artcard reader, the motor 37 is a standard miniature motor geared down to an appropriate speed to drive a pair of rollers which move the Artcard 9. The speed variations, rumble, and other vibrations will affect the raw image data as circuitry within the APC 31 includes extensive compensation for these effects to reliably read the Artcard data.

The motor 37 is driven in reverse when the Artcard is to be ejected.

Artcard Motor Driver 61

The Artcard motor driver 61 is a small circuit which amplifies the digital motor control signals from the APC 31 to levels suitable for driving the motor 37.

Card Insertion Sensor 49

The card insertion sensor 49 is an optical sensor which detects the presence of a card as it is being inserted in the card reader 34. Upon a signal from this sensor 49, the APC 31 initiates the card reading process, including the activation of the Artcard reader motor 37.

Card Eject Button 16

A card eject button 16 (FIG. 1) is used by the user to eject the current Artcard, so that another Artcard can be inserted. The APC 31 detects the pressing of the button, and reverses the Artcard reader motor 37 to eject the card.

Card Status Indicator 66

A card status indicator 66 is provided to signal the user as to the status of the Artcard reading process. This can be a standard bi-color (red/green) LED. When the card is successfully read, and data integrity has been verified, the LED lights up green continually. If the card is faulty, then the LED lights up red.

If the camera is powered from a 1.5 V instead of 3V battery, then the power supply voltage is less than the forward voltage drop of the greed LED, and the LED will not light. In this case, red LEDs can be used, or the LED can be powered from a voltage pump which also powers other circuits in the Artcam which require higher voltage.

64 Mbit DRAM 33

To perform the wide variety of image processing effects, the camera utilizes 8 Mbytes of memory 33. This can be provided by a single 64 Mbit memory chip. Of course, with changing memory technology increased Dram storage sizes may be substituted.

High speed access to the memory chip is required. This can be achieved by using a Rambus DRAM (burst access rate of 500 Mbytes per second) or chips using the new open standards such as double data rate (DDR) SDRAM or Synclink DRAM.

Camera Authentication Chip

The camera authentication chip 54 is identical to the print roll authentication chip 53, except that it has different information stored in it. The camera authentication chip 54 has three main purposes:

1. To provide a secure means of comparing authentication codes with the print roll authentication chip;

2. To provide storage for manufacturing information, such as the serial number of the camera;

3. To provide a small amount of non-volatile memory for storage of user information.

Displays

The Artcam includes an optional color display 5 and small status display 15. Lowest cost consumer cameras may include a color image display, such as a small TFT LCD 5 similar to those found on some digital cameras and camcorders. The color display 5 is a major cost element of these versions of Artcam, and the display 5 plus back light are a major power consumption drain.

Status Display 15

The status display 15 is a small passive segment based LCD, similar to those currently provided on silver halide and digital cameras. Its main function is to show the number of prints remaining in the print roll 42 and icons for various standard camera features, such as flash and battery status.

Color Display 5

The color display 5 is a full motion image display which operates as a viewfinder, as a verification of the image to be printed, and as a user interface display. The cost of the display 5 is approximately proportional to its area, so large displays (say 4″ diagonal) unit will be restricted to expensive versions of the Artcam unit. Smaller displays, such as color camcorder viewfinder TFT's at around 1″, may be effective for mid-range Artcams.

Zoom Lens (not Shown)

The Artcam can include a zoom lens. This can be a standard electronically controlled zoom lens, identical to one which would be used on a standard electronic camera, and similar to pocket camera zoom lenses. A referred version of the Artcam unit may include standard interchangeable 35 mm SLR lenses.

Autofocus Motor 39

The autofocus motor 39 changes the focus of the zoom lens. The motor is a miniature motor geared down to an appropriate speed to drive the autofocus mechanism.

Autofocus Motor Driver 63

The autofocus motor driver 63 is a small circuit which amplifies the digital motor control signals from the APC 31 to levels suitable for driving the motor 39.

Zoom Motor 38

The zoom motor 38 moves the zoom front lenses in and out. The motor is a miniature motor geared down to an appropriate speed to drive the zoom mechanism.

Zoom Motor Driver 62

The zoom motor driver 62 is a small circuit which amplifies the digital motor control signals from the APC 31 to levels suitable for driving the motor.

Communications

The ACP 31 contains a universal serial bus (USB) interface 52 for communication with personal computers. Not all Artcam models are intended to include the USB connector. However, the silicon area required for a USB circuit 52 is small, so the interface can be included in the standard ACP.

Optional Keyboard 57

The Artcam unit may include an optional miniature keyboard 57 for customizing text specified by the Artcard. Any text appearing in an Artcard image may be editable, even if it is in a complex metallic 3D font. The miniature keyboard includes a single line alphanumeric LCD to display the original text and edited text. The keyboard may be a standard accessory.

The ACP 31 contains a serial communications circuit for transferring data to and from the miniature keyboard.

Power Supply

The Artcam unit uses a battery 48. Depending upon the Artcam options, this is either a 3V Lithium cell, 1.5 V AA alkaline cells, or other battery arrangement.

Power Management Unit 51

Power consumption is an important design constraint in the Artcam. It is desirable that either standard camera batteries (such as 3V lithium batters) or standard AA or AAA alkaline cells can be used. While the electronic complexity of the Artcam unit is dramatically higher than 35 mm photographic cameras, the power consumption need not be commensurately higher. Power in the Artcam can be carefully managed with all units being turned off when not in use.

The most significant current drains are the ACP 31, the area image sensors 2,4, the printer 44 various motors, the flash unit 56, and the optional color display 5 dealing with each part separately:

1. ACP: If fabricated using 0.25 μm CMOS, and running on 1.5V, the ACP power consumption can be quite low. Clocks to various parts of the ACP chip can be quite low. Clocks to various parts of the ACP chip can be turned off when not in use, virtually eliminating standby current consumption. The ACP will only fully used for approximately 4 seconds for each photograph printed.

2. Area image sensor: power is only supplied to the area image sensor when the user has their finger on the button.

3. The printer power is only supplied to the printer when actually printing. This is for around 2 seconds for each photograph. Even so, suitably lower power consumption printing should be used.

4. The motors required in the Artcam are all low power miniature motors, and are typically only activated for a few seconds per photo.

5. The flash unit 45 is only used for some photographs. Its power consumption can readily be provided by a 3V lithium battery for a reasonably battery life.

6. The optional color display 5 is a major current drain for two reasons: it must be on for the whole time that the camera is in use, and a backlight will be required if a liquid crystal display is used. Cameras that incorporate a color display will require a larger battery to achieve acceptable batter life.

Flash Unit 56

The flash unit 56 can be a standard miniature electronic flash for consumer cameras.

Overview of the ACP 31

FIG. 3 illustrates the Artcam Central Processor (ACP) 31 in more detail. The Artcam Central Processor provides all of the processing power for Artcam. It is designed for a 0.25 micron CMOS process, with approximately 1.5 million transistors and an area of around 50 mm2. The ACP 31 is a complex design, but design effort can be reduced by the use of datapath compilation techniques, macrocells, and IP cores. The ACP 31 contains:

    • A RISC CPU core 72
    • A 4 way parallel VLIW Vector Processor 74
    • A Direct RAMbus interface 81
    • A CMOS image sensor interface 83
    • A CMOS linear image sensor interface 88
    • A USB serial interface 52
    • An infrared keyboard interface 55
    • A numeric LCD interface 84, and
    • A color TFT LCD interface 88
    • A 4 Mbyte Flash memory 70 for program storage 70

The RISC CPU, Direct RAMbus interface 81, CMOS sensor interface 83 and USB serial interface 52 can be vendor supplied cores. The ACP 31 is intended to run at a clock speed of 200 MHz on 3V externally and 1.5V internally to minimize power consumption. The CPU core needs only to run at 100 MHz. The following two block diagrams give two views of the ACP 31:

A view of the ACP 31 in isolation

An example Artcam showing a high-level view of the ACP 31 connected to the rest of the Artcam hardware.

Image Access

As stated previously, the DRAM Interface 81 is responsible for interfacing between other client portions of the ACP chip and the RAMBUS DRAM. In effect, each module within the DRAM Interface is an address generator.

There are three logical types of images manipulated by the ACP. They are:

    • CCD Image, which is the Input Image captured from the CCD.
    • Internal Image format—the Image format utilised internally by the Artcam device.

Print Image—the Output Image format printed by the Artcam

These images are typically different in color space, resolution, and the output & input color spaces which can vary from camera to camera. For example, a CCD image on a low-end camera may be a different resolution, or have different color characteristics from that used in a high-end camera. However all internal image formats are the same format in terms of color space across all cameras.

In addition, the three image types can vary with respect to which direction is ‘up’. The physical orientation of the camera causes the notion of a portrait or landscape image, and this must be maintained throughout processing. For this reason, the internal image is always oriented correctly, and rotation is performed on images obtained from the CCD and during the print operation.

CPU Core (CPU) 72

The ACP 31 incorporates a 32 bit RISC CPU 72 to run the Vark image processing language interpreter and to perform Artcam's general operating system duties. A wide variety of CPU cores are suitable: it can be any processor core with sufficient processing power to perform the required core calculations and control functions fast enough to met consumer expectations. Examples of suitable cores are: MIPS R4000 core from LSI Logic, StrongARM core. There is no need to maintain instruction set continuity between different Artcam models. Artcard compatibility is maintained irrespective of future processor advances and changes, because the Vark interpreter is simply re-compiled for each new instruction set. The ACP 31 architecture is therefore also free to evolve. Different ACP 31 chip designs may be fabricated by different manufacturers, without requiring to license or port the CPU core. This device independence avoids the chip vendor lock-in such as has occurred in the PC market with Intel. The CPU operates at 100 MHz, with a single cycle time of 10 ns. It must be fast enough to run the Vark interpreter, although the VLIW Vector Processor 74 is responsible for most of the time-critical operations.
Program Cache 72

Although the program code is stored in on-chip Flash memory 70, it is unlikely that well packed Flash memory 70 will be able to operate at the 10 ns cycle time required by the CPU. Consequently a small cache is required for good performance. 16 cache lines of 32 bytes each are sufficient, for a total of 512 bytes. The program cache 72 is defined in the chapter entitled Program cache 72.

Data Cache 76

A small data cache 76 is required for good performance. This requirement is mostly due to the use of a RAMbus DRAM, which can provide high-speed data in bursts, but is inefficient for single byte accesses. The CPU has access to a memory caching system that allows flexible manipulation of CPU data cache 76 sizes. A minimum of 16 cache lines (512 bytes) is recommended for good performance

CPU Memory Model

An Artcam's CPU memory model consists of a 32 MB area. It consists of 8 MB of physical RDRAM off-chip in the base model of Artcam, with provision for up to 16 MB of off-chip memory. There is a 4 MB Flash memory 70 on the ACP 31 for program storage, and finally a 4 MB address space mapped to the various registers and controls of the ACP 31. The memory map then, for an Artcam is as follows:

ContentsSize
Base Artcam DRAM8 MB
Extended DRAM8 MB
Program memory (on ACP 31 in Flash memory 70)4 MB
Reserved for extension of program memory4 MB
ACP 31 registers and memory-mapped I/O4 MB
Reserved4 MB
TOTAL32 MB 

A straightforward way of decoding addresses is to use address bits 23-24:

    • If bit 24 is clear, the address is in the lower 16-MB range, and hence can be satisfied from DRAM and the Data cache 76. In most cases the DRAM will only be 8 MB, but 16 MB is allocated to cater for a higher memory model Artcams.
    • If bit 24 is set, and bit 23 is clear, then the address represents the Flash memory 70 4 Mbyte range and is satisfied by the Program cache 72.
    • If bit 24=1 and bit 23=1, the address is translated into an access over the low speed bus to the requested component in the AC by the CPU Memory Decoder 68.
      Flash Memory 70

The ACP 31 contains a 4 Mbyte Flash memory 70 for storing the Artcam program. It is envisaged that Flash memory 70 will have denser packing coefficients than masked ROM, and allows for greater flexibility for testing camera program code. The downside of the Flash memory 70 is the access time, which is unlikely to be fast enough for the 100 MHz operating speed (10 ns cycle time) of the CPU. A fast Program Instruction cache 77 therefore acts as the interface between the CPU and the slower Flash memory 70.

Program Cache 72

A small cache is required for good CPU performance. This requirement is due to the slow speed Flash memory 70 which stores the Program code. 16 cache lines of 32 bytes each are sufficient, for a total of 512 bytes. The Program cache 72 is a read only cache. The data used by CPU programs comes through the CPU Memory Decoder 68 and if the address is in DRAM, through the general Data cache 76. The separation allows the CPU to operate independently of the VLIW Vector Processor 74. If the data requirements are low for a given process, it can consequently operate completely out of cache.

Finally, the Program cache 72 can be read as data by the CPU rather than purely as program instructions. This allows tables, microcode for the VLIW etc to be loaded from the Flash memory 70. Addresses with bit 24 set and bit 23 clear are satisfied from the Program cache 72.

CPU Memory Decoder 68

The CPU Memory Decoder 68 is a simple decoder for satisfying CPU data accesses. The Decoder translates data addresses into internal ACP register accesses over the internal low speed bus, and therefore allows for memory mapped I/O of ACP registers. The CPU Memory Decoder 68 only interprets addresses that have bit 24 set and bit 23 clear. There is no caching in the CPU Memory Decoder 68.

DRAM Interface 81

The DRAM used by the Artcam is a single channel 64 Mbit (8 MB) RAMbus RDRAM operating at 1.6 GB/sec. RDRAM accesses are by a single channel (16-bit data path) controller. The RDRAM also has several useful operating modes for low power operation. Although the Rambus specification describes a system with random 32 byte transfers as capable of achieving a greater than 95% efficiency, this is not true if only part of the 32 bytes are used. Two reads followed by two writes to the same device yields over 86% efficiency. The primary latency is required for bus turn-around going from a Write to a Read, and since there is a Delayed Write mechanism, efficiency can be further improved. With regards to writes, Write Masks allow specific subsets of bytes to be written to. These write masks would be set via internal cache “dirty bits”. The upshot of the Rambus Direct RDRAM is a throughput of >1 GB/sec is easily achievable, and with multiple reads for every write (most processes) combined with intelligent algorithms making good use of 32 byte transfer knowledge, transfer rates of >1.3 GB/sec are expected. Every 10 ns, 16 bytes can be transferred to or from the core.

DRAM Organization

The DRAM organization for a base model (8 MB RDRAM) Artcam is as follows:

ContentsSize
Program scratch RAM0.50 MB
Artcard data1.00 MB
Photo Image, captured from CMOS Sensor0.50 MB
Print Image (compressed)2.25 MB
1 Channel of expanded Photo Image1.50 MB
1 Image Pyramid of single channel1.00 MB
Intermediate Image Processing1.25 MB
TOTAL  8 MB

Notes:
  • Uncompressed, the Print Image requires 4.5 MB (1.5 MB per channel). To accommodate other objects in the 8 MB model, the Print Image needs to be compressed. If the chrominance channels are compressed by 4:1 they require only 0.375 MB each).
  • The memory model described here assumes a single 8 MB RDRAM. Other models of the Artcam may have more memory, and thus not require compression of the Print Image. In addition, with more memory a larger part of the final image can be worked on at once, potentially giving a speed improvement.
  • Note that ejecting or inserting an Artcard invalidates the 5.5 MB area holding the Print Image, 1 channel of expanded photo image, and the image pyramid. This space may be safely used by the Artcard Interface for decoding the Artcard data.
    Data Cache 76

The ACP 31 contains a dedicated CPU instruction cache 77 and a general data cache 76. The Data cache 76 handles all DRAM requests (reads and writes of data) from the CPU, the VLIW Vector Processor 74, and the Display Controller 88. These requests may have very different profiles in terms of memory usage and algorithmic timing requirements. For example, a VLIW process may be processing an image in linear memory, and lookup a value in a table for each value in the image. There is little need to cache much of the image, but it may be desirable to cache the entire lookup table so that no real memory access is required. Because of these differing requirements, the Data cache 76 allows for an intelligent definition of caching.

Although the Rambus DRAM interface 81 is capable of very high-speed memory access (an average throughput of 32 bytes in 25 ns), it is not efficient dealing with single byte requests. In order to reduce effective memory latency, the ACP 31 contains 128 cache lines. Each cache line is 32 bytes wide. Thus the total amount of data cache 76 is 4096 bytes (4 KB). The 128 cache lines are configured into 16 programmable-sized groups. Each of the 16 groups must be a contiguous set of cache lines. The CPU is responsible for determining how many cache lines to allocate to each group. Within each group cache lines are filled according to a simple Least Recently Used algorithm. In terms of CPU data requests, the Data cache 76 handles memory access requests that have address bit 24 clear. If bit 24 is clear, the address is in the lower 16 MB range, and hence can be satisfied from DRAM and the Data cache 76. In most cases the DRAM will only be 8 MB, but 16 MB is allocated to cater for a higher memory model Artcam. If bit 24 is set, the address is ignored by the Data cache 76.

All CPU data requests are satisfied from Cache Group 0. A minimum of 16 cache lines is recommended for good CPU performance, although the CPU can assign any number of cache lines (except none) to Cache Group 0. The remaining Cache Groups (1 to 15) are allocated according to the current requirements. This could mean allocation to a VLIW Vector Processor 74 program or the Display Controller 88. For example, a 256 byte lookup table required to be permanently available would require 8 cache lines. Writing out a sequential image would only require 2-4 cache lines (depending on the size of record being generated and whether write requests are being Write Delayed for a significant number of cycles). Associated with each cache line byte is a dirty bit, used for creating a Write Mask when writing memory to DRAM. Associated with each cache line is another dirty bit, which indicates whether any of the cache line bytes has been written to (and therefore the cache line must be written back to DRAM before it can be reused). Note that it is possible for two different Cache Groups to be accessing the same address in memory and to get out of sync. The VLIW program writer is responsible to ensure that this is not an issue. It could be perfectly reasonable, for example, to have a Cache Group responsible for reading an image, and another Cache Group responsible for writing the changed image back to memory again. If the images are read or written sequentially there may be advantages in allocating cache lines in this manner. A total of 8 buses 182 connect the VLIW Vector Processor 74 to the Data cache 76. Each bus is connected to an I/O Address Generator. (There are 2 I/O Address Generators 189, 190 per Processing Unit 178, and there are 4 Processing Units in the VLIW Vector Processor 74. The total number of buses is therefore 8.)

In any given cycle, in addition to a single 32 bit (4 byte) access to the CPU's cache group (Group 0), 4 simultaneous accesses of 16 bits (2 bytes) to remaining cache groups are permitted on the 8 VLIW Vector Processor 74 buses. The Data cache 76 is responsible for fairly processing the requests. On a given cycle, no more than 1 request to a specific Cache Group will be processed. Given that there are 8 Address Generators 189, 190 in the VLIW Vector Processor 74, each one of these has the potential to refer to an individual Cache Group. However it is possible and occasionally reasonable for 2 or more Address Generators 189, 190 to access the same Cache Group. The CPU is responsible for ensuring that the Cache Groups have been allocated the correct number of cache lines, and that the various Address Generators 189, 190 in the VLIW Vector Processor 74 reference the specific Cache Groups correctly.

The Data cache 76 as described allows for the Display Controller 88 and VLIW Vector Processor 74 to be active simultaneously. If the operation of these two components were deemed to never occur simultaneously, a total 9 Cache Groups would suffice. The CPU would use Cache Group 0, and the VLIW Vector Processor 74 and the Display Controller 88 would share the remaining 8 Cache Groups, requiring only 3 bits (rather than 4) to define which Cache Group would satisfy a particular request.

JTAG Interface 85

A standard JTAG (Joint Test Action Group) Interface is included in the ACP 31 for testing purposes. Due to the complexity of the chip, a variety of testing techniques are required, including BIST (Built In Self Test) and functional block isolation. An overhead of 10% in chip area is assumed for overall chip testing circuitry. The test circuitry is beyond the scope of this document.

Serial Interfaces

USB Serial Port Interface 52

This is a standard USB serial port, which is connected to the internal chip low speed bus, thereby allowing the CPU to control it.

Keyboard Interface 65

This is a standard low-speed serial port, which is connected to the internal chip low speed bus, thereby allowing the CPU to control it. It is designed to be optionally connected to a keyboard to allow simple data input to customize prints.

Authentication Chip Serial Interfaces 64

These are 2 standard low-speed serial ports, which are connected to the internal chip low speed bus, thereby allowing the CPU to control them. The reason for having 2 ports is to connect to both the on-camera Authentication chip, and to the print-roll Authentication chip using separate lines. Only using 1 line may make it possible for a clone print-roll manufacturer to design a chip which, instead of generating an authentication code, tricks the camera into using the code generated by the authentication chip in the camera.

Parallel Interface 67

The parallel interface connects the ACP 31 to individual static electrical signals. The CPU is able to control each of these connections as memory-mapped I/O via the low speed bus The following table is a list of connections to the parallel interface:

ConnectionDirectionPins
Paper transport stepper motorOut4
Artcard stepper motorOut4
Zoom stepper motorOut4
Guillotine motorOut1
Flash triggerOut1
Status LCD segment driversOut7
Status LCD common driversOut4
Artcard illumination LEDOut1
Artcard status LED (red/green)In2
Artcard sensorIn1
Paper pull sensorIn1
Orientation sensorIn2
ButtonsIn4
TOTAL36

VLIW Input and Output FIFOs 78, 79

The VLIW Input and Output FIFOs are 8 bit wide FIFOs used for communicating between processes and the VLIW Vector Processor 74. Both FIFOs are under the control of the VLIW Vector Processor 74, but can be cleared and queried (e.g. for status) etc by the CPU.

VLIW Input FIFO 78

A client writes 8-bit data to the VLIW Input FIFO 78 in order to have the data processed by the VLIW Vector Processor 74. Clients include the Image Sensor Interface, Artcard Interface, and CPU. Each of these processes is able to offload processing by simply writing the data to the FIFO, and letting the VLIW Vector Processor 74 do all the hard work. An example of the use of a client's use of the VLIW Input FIFO 78 is the Image Sensor Interface (ISI 83). The ISI 83 takes data from the Image Sensor and writes it to the FIFO. A VLIW process takes it from the FIFO, transforming it into the correct image data format, and writing it out to DRAM. The ISI 83 becomes much simpler as a result.

VLIW Output FIFO 79

The VLIW Vector Processor 74 writes 8-bit data to the VLIW Output FIFO 79 where clients can read it. Clients include the Print Head Interface and the CPU. Both of these clients is able to offload processing by simply reading the already processed data from the FIFO, and letting the VLIW Vector Processor 74 do all the hard work. The CPU can also be interrupted whenever data is placed into the VLIW Output FIFO 79, allowing it to only process the data as it becomes available rather than polling the FIFO continuously. An example of the use of a client's use of the VLIW Output FIFO 79 is the Print Head Interface (PHI 62). A VLIW process takes an image, rotates it to the correct orientation, color converts it, and dithers the resulting image according to the print head requirements. The PHI 62 reads the dithered formatted 8-bit data from the VLIW Output FIFO 79 and simply passes it on to the Print Head external to the ACP 31. The PHI 62 becomes much simpler as a result.

VLIW Vector Processor 74

To achieve the high processing requirements of Artcam, the ACP 31 contains a VLIW (Very Long Instruction Word) Vector Processor. The VLIW processor is a set of 4 identical Processing Units (PU e.g 178) working in parallel, connected by a crossbar switch 183. Each PU e.g 178 can perform four 8-bit multiplications, eight 8-bit additions, three 32-bit additions, I/O processing, and various logical operations in each cycle. The PUs e.g 178 are microcoded, and each has two Address Generators 189, 190 to allow full use of available cycles for data processing. The four PUs e.g 178 are normally synchronized to provide a tightly interacting VLIW processor. Clocking at 200 MHz, the VLIW Vector Processor 74 runs at 12 Gops (12 billion operations per second). Instructions are tuned for image processing functions such as warping, artistic brushing, complex synthetic illumination, color transforms, image filtering, and compositing. These are accelerated by two orders of magnitude over desktop computers.

As shown in more detail in FIG. 3(a), the VLIW Vector Processor 74 is 4 PUs e.g 178 connected by a crossbar switch 183 such that each PU e.g 178 provides two inputs to, and takes two outputs from, the crossbar switch 183. Two common registers form a control and synchronization mechanism for the PUs e.g 178. 8 Cache buses 182 allow connectivity to DRAM via the Data cache 76, with 2 buses going to each PU e.g 178 (1 bus per I/O Address Generator). Each PU e.g 178 consists of an ALU 188 (containing a number of registers & some arithmetic logic for processing data), some microcode RAM 196, and connections to the outside world (including other ALUs). A local PU state machine runs in microcode and is the means by which the PU e.g 178 is controlled. Each PU e.g 178 contains two I/O Address Generators 189, 190 controlling data flow between DRAM (via the Data cache 76) and the ALU 188 (via Input FIFO and Output FIFO). The address generator is able to read and write data (specifically images in a variety of formats) as well as tables and simulated FIFOs in DRAM. The formats are customizable under software control, but are not microcoded. Data taken from the Data cache 76 is transferred to the ALU 188 via the 16-bit wide Input FIFO. Output data is written to the 16-bit wide Output FIFO and from there to the Data cache 76. Finally, all PUs e.g 178 share a single 8-bit wide VLIW Input FIFO 78 and a single 8-bit wide VLIW Output FIFO 79. The low speed data bus connection allows the CPU to read and write registers in the PU e.g 178, update microcode, as well as the common registers shared by all PUs e.g 178 in the VLIW Vector Processor 74. Turning now to FIG. 4, a closer detail of the internals of a single PU e.g 178 can be seen, with components and control signals detailed in subsequent hereinafter:

Microcode

Each PU e.g 178 contains a microcode RAM 196 to hold the program for that particular PU e.g 178. Rather than have the microcode in ROM, the microcode is in RAM, with the CPU responsible for loading it up. For the same space on chip, this tradeoff reduces the maximum size of any one function to the size of the RAM, but allows an unlimited number of functions to be written in microcode. Functions implemented using microcode include Vark acceleration, Artcard reading, and Printing. The VLIW Vector Processor 74 scheme has several advantages for the case of the ACP 31:

    • Hardware design complexity is reduced
    • Hardware risk is reduced due to reduction in complexity
    • Hardware design time does not depend on all Vark functionality being implemented in dedicated silicon
    • Space on chip is reduced overall (due to large number of processes able to be implemented as microcode)
    • Functionality can be added to Vark (via microcode) with no impact on hardware design time

Size and Content

The CPU loaded microcode RAM 196 for controlling each PU e.g 178 is 128 words, with each word being 96 bits wide. A summary of the microcode size for control of various units of the PU e.g 178 is listed in the following table:

Process BlockSize (bits)
Status Output3
Branching (microcode control)11
In8
Out6
Registers7
Read10
Write6
Barrel Shifter12
Adder/Logical14
Multiply/Interpolate19
TOTAL96

With 128 instruction words, the total microcode RAM 196 per PU e.g 178 is 12,288 bits, or 1.5 KB exactly. Since the VLIW Vector Processor 74 consists of 4 identical PUs e.g 178 this equates to 6,144 bytes, exactly 6 KB. Some of the bits in a microcode word are directly used as control bits, while others are decoded. See the various unit descriptions that detail the interpretation of each of the bits of the microcode word.

Synchronization Between PUs e.g 178

Each PU e.g 178 contains a 4 bit Synchronization Register 197. It is a mask used to determine which PUs e.g 178 work together, and has one bit set for each of the corresponding PUs e.g 178 that are functioning as a single process. For example, if all of the PUs e.g 178 were functioning as a single process, each of the 4 Synchronization Register 197s would have all 4 bits set. If there were two asynchronous processes of 2 PUs e.g 178 each, two of the PUs e.g 178 would have 2 bits set in their Synchronization Register 197s (corresponding to themselves), and the other two would have the other 2 bits set in their Synchronization Register 197s (corresponding to themselves).

The Synchronization Register 197 is used in two basic ways:

    • Stopping and starting a given process in synchrony
    • Suspending execution within a process
      Stopping and Starting Processes

The CPU is responsible for loading the microcode RAM 196 and loading the execution address for the first instruction (usually 0). When the CPU starts executing microcode, it begins at the specified address.

Execution of microcode only occurs when all the bits of the Synchronization Register 197 are also set in the Common Synchronization Register 197. The CPU therefore sets up all the PUs e.g 178 and then starts or stops processes with a single write to the Common Synchronization Register 197.

This synchronization scheme allows multiple processes to be running asynchronously on the PUs e.g 178, being stopped and started as processes rather than one PU e.g 178 at a time.

Suspending Execution within a Process

In a given cycle, a PU e.g 178 may need to read from or write to a FIFO (based on the opcode of the current microcode instruction). If the FIFO is empty on a read request, or full on a write request, the FIFO request cannot be completed. The PU e.g 178 will therefore assert its SuspendProcess control signal 198. The SuspendProcess signals from all PUs e.g 178 are fed back to all the PUs e.g 178. The Synchronization Register 197 is ANDed with the 4 SuspendProcess bits, and if the result is non-zero, none of the PU e.g 178's register WriteEnables or FIFO strobes will be set. Consequently none of the PUs e.g 178 that form the same process group as the PU e.g 178 that was unable to complete its task will have their registers or FIFOs updated during that cycle. This simple technique keeps a given process group in synchronization. Each subsequent cycle the PU e.g 178's state machine will attempt to re-execute the microcode instruction at the same address, and will continue to do so until successful. Of course the Common Synchronization Register 197 can be written to by the CPU to stop the entire process if necessary. This synchronization scheme allows any combinations of PUs e.g 178 to work together, each group only affecting its co-workers with regards to suspension due to data not being ready for reading or writing.

Control and Branching

During each cycle, each of the four basic input and calculation units within a PU e.g 178's ALU 188 (Read, Adder/Logic, Multiply/Interpolate, and Barrel Shifter) produces two status bits: a Zero flag and a Negative flag indicating whether the result of the operation during that cycle was 0 or negative. Each cycle one of those 4 status bits is chosen by microcode instructions to be output from the PU e.g 178. The 4 status bits (1 per PU e.g 178's ALU 188) are combined into a 4 bit Common Status Register 200. During the next cycle, each PU e.g 178's microcode program can select one of the bits from the Common Status Register 200, and branch to another microcode address dependant on the value of the status bit.

Status Bit

Each PU e.g 178's ALU 188 contains a number of input and calculation units. Each unit produces 2 status bits—a negative flag and a zero flag. One of these status bits is output from the PU e.g 178 when a particular unit asserts the value on the 1-bit tri-state status bit bus. The single status bit is output from the PU e.g 178, and then combined with the other PU e.g 178 status bits to update the Common Status Register 200. The microcode for determining the output status bit takes the following form:

# BitsDescription
2Select unit whose status bit is to be output
00 = Adder unit
01 = Multiply/Logic unit
10 = Barrel Shift unit
11 = Reader unit
10 = Zero flag
1 = Negative flag
3TOTAL

Within the ALU 188, the 2-bit Select Processor Block value is decoded into four 1-bit enable bits, with a different enable bit sent to each processor unit block. The status select bit (choosing Zero or Negative) is passed into all units to determine which bit is to be output onto the status bit bus.

Branching Within Microcode

Each PU e.g 178 contains a 7 bit Program Counter (PC) that holds the current microcode address being executed. Normal program execution is linear, moving from address N in one cycle to address N+1 in the next cycle. Every cycle however, a microcode program has the ability to branch to a different location, or to test a status bit from the Common Status Register 200 and branch. The microcode for determining the next execution address takes the following form:

# BitsDescription
200 = NOP (PC = PC + 1)
01 = Branch always
10 = Branch if status bit clear
11 = Branch if status bit set
2Select status bit from status word
7Address to branch to (absolute address, 00-7F)
11TOTAL

ALU 188

FIG. 5 illustrates the ALU 188 in more detail. Inside the ALU 188 are a number of specialized processing blocks, controlled by a microcode program. The specialized processing blocks include:

    • Read Block 202, for accepting data from the input FIFOs
    • Write Block 203, for sending data out via the output FIFOs
    • Adder/Logical block 204, for addition & subtraction, comparisons and logical operations
    • Multiply/Interpolate block 205, for multiple types of interpolations and multiply/accumulates
    • Barrel Shift block 206, for shifting data as required
    • In block 207, for accepting data from the external crossbar switch 183
    • Out block 208, for sending data to the external crossbar switch 183
    • Registers block 215, for holding data in temporary storage

Four specialized 32 bit registers hold the results of the 4 main processing blocks:

    • M register 209 holds the result of the Multiply/Interpolate block
    • L register 209 holds the result of the Adder/Logic block
    • S register 209 holds the result of the Barrel Shifter block
    • R register 209 holds the result of the Read Block 202

In addition there are two internal crossbar switches 213 and 214 for data transport. The various process blocks are further expanded in the following sections, together with the microcode definitions that pertain to each block. Note that the microcode is decoded within a block to provide the control signals to the various units within.

Data Transfers Between PUs e.g 178

Each PU e.g 178 is able to exchange data via the external crossbar. A PU e.g 178 takes two inputs and outputs two values to the external crossbar. In this way two operands for processing can be obtained in a single cycle, but cannot be actually used in an operation until the following cycle.

In 207

This block is illustrated in FIG. 6 and contains two registers, In1 and In2 that accept data from the external crossbar. The registers can be loaded each cycle, or can remain unchanged. The selection bits for choosing from among the 8 inputs are output to the external crossbar switch 183. The microcode takes the following form:

# BitsDescription
10 = NOP
1 = Load In1 from crossbar
3Select Input 1 from external crossbar
10 = NOP
1 = Load In2 from crossbar
3Select Input 2 from external crossbar
8TOTAL

Out 208

Complementing In is Out 208. The Out block is illustrated in more detail in FIG. 7. Out contains two registers, Out1 and Out2, both of which are output to the external crossbar each cycle for use by other PUs e.g 178. The Write unit is also able to write one of Out1 or Out2 to one of the output FIFOs attached to the ALU 188. Finally, both registers are available as inputs to Crossbar1 213, which therefore makes the register values available as inputs to other units within the ALU 188. Each cycle either of the two registers can be updated according to microcode selection. The data loaded into the specified register can be one of D0-D3 (selected from Crossbar1 213) one of M, L, S, and R (selected from Crossbar2 214), one of 2 programmable constants, or the fixed values 0 or 1. The microcode for Out takes the following form:

# BitsDescription
10 = NOP
1 = Load Register
1Select Register to load [Out1 or Out2]
4Select input
[In1, In2, Out1, Out2, D0, D1, D2, D3, M, L, S, R, K1, K2, 0, 1]
6TOTAL

Local Registers and Data Transfers within ALU 188

As noted previously, the ALU 188 contains four specialized 32-bit registers to hold the results of the 4 main processing blocks:

    • M register 209 holds the result of the Multiply/Interpolate block
    • L register 209 holds the result of the Adder/Logic block
    • S register 209 holds the result of the Barrel Shifter block
    • R register 209 holds the result of the Read Block 202
      The CPU has direct access to these registers, and other units can select them as inputs via Crossbar2 214. Sometimes it is necessary to delay an operation for one or more cycles. The Registers block contains four 32-bit registers D0-D3 to hold temporary variables during processing. Each cycle one of the registers can be updated, while all the registers are output for other units to use via Crossbar1 213 (which also includes In1, In2, Out1 and Out2). The CPU has direct access to these registers. The data loaded into the specified register can be one of D0-D3 (selected from Crossbar1 213) one of M, L, S, and R (selected from Crossbar2 214), one of 2 programmable constants, or the fixed values 0 or 1. The Registers block 215 is illustrated in more detail in FIG. 8. The microcode for Registers takes the following form:

# BitsDescription
10 = NOP
1 = Load Register
2Select Register to load [D0-D3]
4Select input
[In1, In2, Out1, Out2, D0, D1, D2, D3, M, L, S, R, K1, K2, 0, 1]
7TOTAL

Crossbar1 213

Crossbar1 213 is illustrated in more detail in FIG. 9. Crossbar1 213 is used to select from inputs In1, In2, Out1, Out2, D0-D3. 7 outputs are generated from Crossbar1 213: 3 to the Multiply/Interpolate Unit, 2 to the Adder Unit, 1 to the Registers unit and 1 to the Out unit. The control signals for Crossbar1 213 come from the various units that use the Crossbar inputs. There is no specific microcode that is separate for Crossbar1 213.

Crossbar2 214

Crossbar2 214 is illustrated in more detail in FIG. 10. Crossbar2 214 is used to select from the general ALU 188 registers M, L, S and R. 6 outputs are generated from Crossbar1 213: 2 to the Multiply/Interpolate Unit, 2 to the Adder Unit, 1 to the Registers unit and 1 to the Out unit. The control signals for Crossbar2 214 come from the various units that use the Crossbar inputs. There is no specific microcode that is separate for Crossbar2 214.

Data Transfers Between PUs e.g 178 and DRAM or External Processes

Returning to FIG. 4, PUs e.g 178 share data with each other directly via the external crossbar. They also transfer data to and from external processes as well as DRAM. Each PU e.g 178 has 2 I/O Address Generators 189, 190 for transferring data to and from DRAM. A PU e.g 178 can send data to DRAM via an I/O Address Generator's Output FIFO e.g. 186, or accept data from DRAM via an I/O Address Generator's Input FIFO 187. These FIFOs are local to the PU e.g 178. There is also a mechanism for transferring data to and from external processes in the form of a common VLIW Input FIFO 78 and a common VLIW Output FIFO 79, shared between all ALUs. The VLIW Input and Output FIFOs are only 8 bits wide, and are used for printing, Artcard reading, transferring data to the CPU etc. The local Input and Output FIFOs are 16 bits wide.

Read

The Read process block 202 of FIG. 5 is responsible for updating the ALU 188's R register 209, which represents the external input data to a VLIW microcoded process. Each cycle the Read Unit is able to read from either the common VLIW Input FIFO 78 (8 bits) or one of two local Input FIFOs (16 bits). A 32-bit value is generated, and then all or part of that data is transferred to the R register 209. The process can be seen in FIG. 11. The microcode for Read is described in the following table. Note that the interpretations of some bit patterns are deliberately chosen to aid decoding.

# BitsDescription
200 = NOP
01 = Read from VLIW Input FIFO 78
10 = Read from Local FIFO 1
11 = Read from Local FIFO 2
1How many significant bits
0 = 8 bits (pad with 0 or sign extend)
1 = 16 bits (only valid for Local FIFO reads)
10 = Treat data as unsigned (pad with 0)
1 = Treat data as signed
(sign extend when reading from FIFO)r
2How much to shift data left by:
00 = 0 bits (no change)
01 = 8 bits
10 = 16 bits
11 = 24 bits
4Which bytes of R to update (hi to lo order byte)
Each of the 4 bits represents 1 byte WriteEnable on R
10TOTAL

Write

The Write process block is able to write to either the common VLIW Output FIFO 79 or one of the two local Output FIFOs each cycle. Note that since only 1 FIFO is written to in a given cycle, only one 16-bit value is output to all FIFOs, with the low 8 bits going to the VLIW Output FIFO 79. The microcode controls which of the FIFOs gates in the value. The process of data selection can be seen in more detail in FIG. 12. The source values Out1 and Out2 come from the Out block. They are simply two registers. The microcode for Write takes the following form:

# BitsDescription
200 = NOP
01 = Write VLIW Output FIFO 79
10 = Write local Output FIFO 1
11 = Write local Output FIFO 2
1Select Output Value [Out1 or Out2]
3Select part of Output Value to write
(32 bits = 4 bytes ABCD)
000 = 0D
001 = 0D
010 = 0B
011 = 0A
100 = CD
101 = BC
110 = AB
111 = 0
6TOTAL

Computational Blocks

Each ALU 188 has two computational process blocks, namely an Adder/Logic process block 204, and a Multiply/Interpolate process block 205. In addition there is a Barrel Shifter block to provide help to these computational blocks. Registers from the Registers block 215 can be used for temporary storage during pipelined operations.

Barrel Shifter

The Barrel Shifter process block 206 is shown in more detail in FIG. 13 and takes its input from the output of Adder/Logic or Multiply/Interpolate process blocks or the previous cycle's results from those blocks (ALU registers L and M). The 32 bits selected are barrel shifted an arbitrary number of bits in either direction (with sign extension as necessary), and output to the ALU 188's S register 209. The microcode for the Barrel Shift process block is described in the following table. Note that the interpretations of some bit patterns are deliberately chosen to aid decoding.

# BitsDescription
3000 = NOP
001 = Shift Left (unsigned)
010 = Reserved
011 = Shift Left (signed)
100 = Shift right (unsigned, no rounding)
101 = Shift right (unsigned, with rounding)
110 = Shift right (signed, no rounding)
111 = Shift right (signed, with rounding)
2Select Input to barrel shift:
00 = Multiply/Interpolate result
01 = M
10 = Adder/Logic result
11 = L
5# bits to shift
1Ceiling of 255
1Floor of 0 (signed data)
12TOTAL

Adder/Logic 204

The Adder/Logic process block is shown in more detail in FIG. 14 and is designed for simple 32-bit addition/subtraction, comparisons, and logical operations. In a single cycle a single addition, comparison, or logical operation can be performed, with the result stored in the ALU 188's L register 209. There are two primary operands, A and B, which are selected from either of the two crossbars or from the 4 constant registers. One crossbar selection allows the results of the previous cycle's arithmetic operation to be used while the second provides access to operands previously calculated by this or another ALU 188. The CPU is the only unit that has write access to the four constants (K1-K4). In cases where an operation such as (A+B)×4 is desired, the direct output from the adder can be used as input to the Barrel Shifter, and can thus be shifted left 2 places without needing to be latched into the L register 209 first. The output from the adder can also be made available to the multiply unit for a multiply-accumulate operation. The microcode for the Adder/Logic process block is described in the following table. The interpretations of some bit patterns are deliberately chosen to aid decoding. Microcode bit interpretation for Adder/Logic unit

# BitsDescription
40000 = A + B (carry in = 0)
0001 = A + B (carry in = carry out of previous operation)
0010 = A + B + 1 (carry in = 1)
0011 = A + 1 (increments A)
0100 = A − B − 1 (carry in = 0)
0101 = A − B (carry in = carry out of previous operation)
0110 = A − B (carry in = 1)
0111 = A − 1 (decrements A)
1000 = NOP
1001 = ABS(A − B)
1010 = MIN(A, B)
1011 = MAX(A, B)
1100 = A AND B (both A & B can be inverted, see below)
1101 = A OR B (both A & B can be inverted, see below)
1110 = A XOR B (both A & B can be inverted, see below)
1111 = A (A can be inverted, see below)
1If logical operation:
0 = A = A
1 = A = NOT(A)
If Adder operation:
0 = A is unsigned
1 = A is signed
1If logical operation:
0 = B = B
1 = B = NOT(B)
If Adder operation
0 = B is unsigned
1 = B is signed
4Select A
[In1, In2, Out1, Out2, D0, D1, D2, D3, M, L, S, R, K1, K2, K3,
K4]
4Select B
[In1, In2, Out1, Out2, D0, D1, D2, D3, M, L, S, R, K1, K2, K3,
K4]
14TOTAL

Multiply/Interpolate 205

The Multiply/Interpolate process block is shown in more detail in FIG. 15 and is a set of four 8×8 interpolator units that are capable of performing four individual 8×8 interpolates per cycle, or can be combined to perform a single 16×16 multiply. This gives the possibility to perform up to 4 linear interpolations, a single bi-linear interpolation, or half of a tri-linear interpolation in a single cycle. The result of the interpolations or multiplication is stored in the ALU 188's M register 209. There are two primary operands, A and B, which are selected from any of the general registers in the ALU 188 or from four programmable constants internal to the Multiply/Interpolate process block. Each interpolator block functions as a simple 8 bit interpolator [result=A+(B−A)f] or as a simple 8×8 multiply [result=A*B]. When the operation is interpolation, A and B are treated as four 8 bit numbers A0 thru A3 (A0 is the low order byte), and B0 thru B3. Agen, Bgen, and Fgen are responsible for ordering the inputs to the Interpolate units so that they match the operation being performed. For example, to perform bilinear interpolation, each of the 4 values must be multiplied by a different factor & the result summed, while a 16×16 bit multiplication requires the factors to be 0. The microcode for the Adder/Logic process block is described in the following table. Note that the interpretations of some bit patterns are deliberately chosen to aid decoding.

# BitsDescription
40000 = (A10 * B10) + V
0001 = (A0 * B0) + (A1 * B1) + V
0010 = (A10 * B10) − V
0011 = V − (A10 * B10)
0100 = Interpolate A0, B0 by f0
0101 = Interpolate A0, B0 by f0, A1, B1 by f1
0110 = Interpolate A0, B0 by f0, A1, B1 by f1, A2, B2 by f2
0111 = Interpolate A0, B0 by f0, A1, B1 by f1, A2, B2 by f2, A3, B3 by f3
1000 = Interpolate 16 bits stage 1 [M = A10 * f10]
1001 = Interpolate 16 bits stage 2 [M = M + (A10 * f10)]
1010 = Tri-linear interpolate A by f stage 1
[M = A0f0 + A1f1 + A2f2 + A3f3]
1011 = Tri-linear interpolate A by f stage 2
[M = M + A0f0 + A1f1 + A2f2 + A3f3]
1100 = Bi-linear interpolate A by f stage 1 [M = A0f0 + A1f1]
1101 = Bi-linear interpolate A by f stage 2 [M = M + A0f0 + A1f1]
1110 = Bi-linear interpolate A by f complete
[M = A0f0 + A1f1 + A2f2 + A3f3]
1111 = NOP
4Select A [In1, In2, Out1, Out2, D0, D1, D2, D3, M, L, S, R, K1, K2, K3, K4]
4Select B [In1, In2, Out1, Out2, D0, D1, D2, D3, M, L, S, R, K1, K2, K3, K4]
If Mult:
4Select V [In1, In2, Out1, Out2, D0, D1, D2, D3, K1, K2, K3, K4, Adder
result, M, 0, 1]
1Treat A as signed
1Treat B as signed
1Treat V as signed
If Interp:
4Select basis for f
[In1, In2, Out1, Out2, D0, D1, D2, D3, K1, K2, K3, K4, X, X, X, X]
1Select interpolation f generation from P1 or P2
Pn is interpreted as # fractional bits in f
If Pn = 0, f is range 0 . . . 255 representing 0 . . . 1
2Reserved
19 TOTAL

The same 4 bits are used for the selection of V and f, although the last 4 options for V don't generally make sense as f values. Interpolating with a factor of 1 or 0 is pointless, and the previous multiplication or current result is unlikely to be a meaningful value for f.

I/O Address Generators 189, 190

The I/O Address Generators are shown in more detail in FIG. 16. A VLIW process does not access DRAM directly. Access is via 2 I/O Address Generators 189, 190, each with its own Input and Output FIFO. A PU e.g 178 reads data from one of two local Input FIFOs, and writes data to one of two local Output FIFOs. Each I/O Address Generator is responsible for reading data from DRAM and placing it into its Input FIFO, where it can be read by the PU e.g 178, and is responsible for taking the data from its Output FIFO (placed there by the PU e.g 178) and writing it to DRAM. The I/O Address Generator is a state machine responsible for generating addresses and control for data retrieval and storage in DRAM via the Data cache 76. It is customizable under CPU software control, but cannot be microcoded. The address generator produces addresses in two broad categories:

    • Image Iterators, used to iterate (reading, writing or both) through pixels of an image in a variety of ways
    • Table I/O, used to randomly access pixels in images, data in tables, and to simulate FIFOs in DRAM

Each of the I/O Address Generators 189, 190 has its own bus connection to the Data cache 76, making 2 bus connections per PU e.g 178, and a total of 8 buses over the entire VLIW Vector Processor 74. The Data cache 76 is able to service 4 of the maximum 8 requests from the 4 PUs e.g 178 each cycle. The Input and Output FIFOs are 8 entry deep 16-bit wide FIFOs. The various types of address generation (Image Iterators and Table I/O) are described in the subsequent sections.

Registers

The I/O Address Generator has a set of registers for that are used to control address generation. The addressing mode also determines how the data is formatted and sent into the local Input FIFO, and how data is interpreted from the local Output FIFO. The CPU is able to access the registers of the I/O Address Generator via the low speed bus. The first set of registers define the housekeeping parameters for the I/O Generator:

Register Name# bitsDescription
Reset0A write to this register halts any operations, and writes 0s to
all the data registers of the I/O Generator. The input and
output FIFOs are not cleared.
Go0A write to this register restarts the counters according to the
current setup. For example, if the I/O Generator is a Read
Iterator, and the Iterator is currently halfway through the
image, a write to Go will cause the reading to begin at the
start of the image again. While the I/O Generator is
performing, the Active bit of the Status register will be set.
Halt0A write to this register stops any current activity and clears
the Active bit of the Status register. If the Active bit is
already cleared, writing to this register has no effect.
Continue0A write to this register continues the I/O Generator from the
current setup. Counters are not reset, and FIFOs are not
cleared. A write to this register while the I/O Generator is
active has no effect.
ClearFIFOsOnGo10 = Don't clear FIFOs on a write to the Go bit.
1 = Do clear FIFOs on a write to the Go bit.
Status8Status flags

The Status Register has the Following Values

Register Name# bitsDescription
Active10 = Currently inactive
1 = Currently active
Reserved7

Caching

Several registers are used to control the caching mechanism, specifying which cache group to use for inputs, outputs etc. See the section on the Data cache 76 for more information about cache groups.

Register Name# bitsDescription
CacheGroup14Defines cache group to read data from
CacheGroup24Defines which cache group to write data to,
and in the case of the ImagePyramidLookup
I/O mode, defines the cache to use for
reading the Level Information Table.

Image Iterators=Sequential Automatic Access to Pixels

The primary image pixel access method for software and hardware algorithms is via Image Iterators. Image iterators perform all of the addressing and access to the caches of the pixels within an image channel and read, write or read & write pixels for their client. Read Iterators read pixels in a specific order for their clients, and Write Iterators write pixels in a specific order for their clients. Clients of Iterators read pixels from the local Input FIFO or write pixels via the local Output FIFO.

Read Image Iterators read through an image in a specific order, placing the pixel data into the local Input FIFO. Every time a client reads a pixel from the Input FIFO, the Read Iterator places the next pixel from the image (via the Data cache 76) into the FIFO.

Write Image Iterators write pixels in a specific order to write out the entire image. Clients write pixels to the Output FIFO that is in turn read by the Write Image Iterator and written to DRAM via the Data cache 76.

Typically a VLIW process will have its input tied to a Read Iterator, and output tied to a corresponding Write Iterator. From the PU e.g 178 microcode program's perspective, the FIFO is the effective interface to DRAM. The actual method of carrying out the storage (apart from the logical ordering of the data) is not of concern. Although the FIFO is perceived to be effectively unlimited in length, in practice the FIFO is of limited length, and there can be delays storing and retrieving data, especially if several memory accesses are competing. A variety of Image Iterators exist to cope with the most common addressing requirements of image processing algorithms. In most cases there is a corresponding Write Iterator for each Read Iterator. The different Iterators are listed in the following table:

Read IteratorsWrite Iterators
Sequential ReadSequential Write
Box Read
Vertical Strip ReadVertical Strip Write

The 4 Bit Address Mode Register is Used to Determine the Iterator Type:

Bit #Address Mode
30 = This addressing mode is an Iterator
2 to 0Iterator Mode
001 = Sequential Iterator
010 = Box [read only]
100 = Vertical Strip
remaining bit patterns are reserved

The Access Specific Registers are Used as Follows:

Register NameLocalNameDescription
AccessSpecific1FlagsFlags used for reading and writing
AccessSpecific2XBoxSizeDetermines the size in X of Box Read.
Valid values are 3, 5, and 7.
AccessSpecific3YBoxSizeDetermines the size in Y of Box Read.
Valid values are 3, 5, and 7.
AccessSpecific4BoxOffsetOffset between one pixel center and
the next during a Box Read only.
Usual value is 1, but other useful
values include 2, 4, 8 . . . See
Box Read for more details.

The Flags register (AccessSpecific1) contains a number of flags used to determine factors affecting the reading and writing of data. The Flags register has the following composition:

Label#bitsDescription
ReadEnable1Read data from DRAM
WriteEnable1Write data to DRAM [not valid for Box mode]
PassX1Pass X (pixel) ordinate back to Input FIFO
PassY1Pass Y (row) ordinate back to Input FIFO
Loop10 = Do not loop through data
1 = Loop through data
Reserved11Must be 0

Notes on ReadEnable and WriteEnable:
    • When ReadEnable is set, the I/O Address Generator acts as a Read Iterator, and therefore reads the image in a particular order, placing the pixels into the Input FIFO.
    • When WriteEnable is set, the I/O Address Generator acts as a Write Iterator, and therefore writes the image in a particular order, taking the pixels from the Output FIFO.
    • When both ReadEnable and WriteEnable are set, the I/O Address Generator acts as a Read Iterator and as a Write Iterator, reading pixels into the Input FIFO, and writing pixels from the Output FIFO. Pixels are only written after they have been read—i.e. the Write Iterator will never go faster than the Read Iterator. Whenever this mode is used, care should be taken to ensure balance between in and out processing by the VLIW microcode. Note that separate cache groups can be specified on reads and writes by loading different values in CacheGroup1 and CacheGroup2.
      Notes on PassX and PassY:
    • If PassX and PassY are both set, the Y ordinate is placed into the Input FIFO before the X ordinate.
    • PassX and PassY are only intended to be set when the ReadEnable bit is clear. Instead of passing the ordinates to the address generator, the ordinates are placed directly into the Input FIFO. The ordinates advance as they are removed from the FIFO.
    • If WriteEnable bit is set, the VLIW program must ensure that it balances reads of ordinates from the Input FIFO with writes to the Output FIFO, as writes will only occur up to the ordinates (see note on ReadEnable and WriteEnable above).
      Notes on Loop:
    • If the Loop bit is set, reads will recommence at [StartPixel, StartRow] once it has reached [EndPixel, EndRow]. This is ideal for processing a structure such a convolution kernel or a dither cell matrix, where the data must be read repeatedly.
    • Looping with ReadEnable and WriteEnable set can be useful in an environment keeping a single line history, but only where it is useful to have reading occur before writing. For a FIFO effect (where writing occurs before reading in a length constrained fashion), use an appropriate Table I/O addressing mode instead of an Image Iterator.
    • Looping with only WriteEnable set creates a written window of the last N pixels. This can be used with an asynchronous process that reads the data from the window. The Artcard Reading algorithm makes use of this mode.
      Sequential Read and Write Iterators

FIG. 17 illustrates the pixel data format. The simplest Image Iterators are the Sequential Read Iterator and corresponding Sequential Write Iterator. The Sequential Read Iterator presents the pixels from a channel one line at a time from top to bottom, and within a line, pixels are presented left to right. The padding bytes are not presented to the client. It is most useful for algorithms that must perform some process on each pixel from an image but don't care about the order of the pixels being processed, or want the data specifically in this order. Complementing the Sequential Read Iterator is the Sequential Write Iterator. Clients write pixels to the Output FIFO. A Sequential Write Iterator subsequently writes out a valid image using appropriate caching and appropriate padding bytes. Each Sequential Iterator requires access to 2 cache lines. When reading, while 32 pixels are presented from one cache line, the other cache line can be loaded from memory. When writing, while 32 pixels are being filled up in one cache line, the other can be being written to memory. A process that performs an operation on each pixel of an image independently would typically use a Sequential Read Iterator to obtain pixels, and a Sequential Write Iterator to write the new pixel values to their corresponding locations within the destination image. Such a process is shown in FIG. 18.

In most cases, the source and destination images are different, and are represented by 2 I/O Address Generators 189, 190. However it can be valid to have the source image and destination image to be the same, since a given input pixel is not read more than once. In that case, then the same Iterator can be used for both input and output, with both the ReadEnable and WriteEnable registers set appropriately. For maximum efficiency, 2 different cache groups should be used—one for reading and the other for writing. If data is being created by a VLIW process to be written via a Sequential Write Iterator, the PassX and PassY flags can be used to generate coordinates that are then passed down the Input FIFO. The VLIW process can use these coordinates and create the output data appropriately.

Box Read Iterator

The Box Read Iterator is used to present pixels in an order most useful for performing operations such as general-purpose filters and convolve. The Iterator presents pixel values in a square box around the sequentially read pixels. The box is limited to being 1, 3, 5, or 7 pixels wide in X and Y (set XBoxSize and YBoxSize—they must be the same value or 1 in one dimension and 3, 5, or 7 in the other). The process is shown in FIG. 19:

BoxOffset: This special purpose register is used to determine a sub-sampling in terms of which input pixels will be used as the center of the box. The usual value is 1, which means that each pixel is used as the center of the box. The value “2” would be useful in scaling an image down by 4:1 as in the case of building an image pyramid. Using pixel addresses from the previous diagram, the box would be centered on pixel 0, then 2, 8, and 10. The Box Read Iterator requires access to a maximum of 14 (2×7) cache lines. While pixels are presented from one set of 7 lines, the other cache lines can be loaded from memory.

Box Write Iterator

There is no corresponding Box Write Iterator, since the duplication of pixels is only required on input. A process that uses the Box Read Iterator for input would most likely use the Sequential Write Iterator for output since they are in sync. A good example is the convolver, where N input pixels are read to calculate 1 output pixel. The process flow is as illustrated in FIG. 20. The source and destination images should not occupy the same memory when using a Box Read Iterator, as subsequent lines of an image require the original (not newly calculated) values.

Vertical-Strip Read and Write Iterators

In some instances it is necessary to write an image in output pixel order, but there is no knowledge about the direction of coherence in input pixels in relation to output pixels. An example of this is rotation. If an image is rotated 90 degrees, and we process the output pixels horizontally, there is a complete loss of cache coherence. On the other hand, if we process the output image one cache line's width of pixels at a time and then advance to the next line (rather than advance to the next cache-line's worth of pixels on the same line), we will gain cache coherence for our input image pixels. It can also be the case that there is known ‘block’ coherence in the input pixels (such as color coherence), in which case the read governs the processing order, and the write, to be synchronized, must follow the same pixel order.

The order of pixels presented as input (Vertical-Strip Read), or expected for output (Vertical-Strip Write) is the same. The order is pixels 0 to 31 from line 0, then pixels 0 to 31 of line 1 etc for all lines of the image, then pixels 32 to 63 of line 0, pixels 32 to 63 of line 1 etc. In the final vertical strip there may not be exactly 32 pixels wide. In this case only the actual pixels in the image are presented or expected as input. This process is illustrated in FIG. 21.

process that requires only a Vertical-Strip Write Iterator will typically have a way of mapping input pixel coordinates given an output pixel coordinate. It would access the input image pixels according to this mapping, and coherence is determined by having sufficient cache lines on the ‘random-access’ reader for the input image. The coordinates will typically be generated by setting the PassX and PassY flags on the VerticalStripWrite Iterator, as shown in the process overview illustrated in FIG. 22.

It is not meaningful to pair a Write Iterator with a Sequential Read Iterator or a Box read Iterator, but a Vertical-Strip Write Iterator does give significant improvements in performance when there is a non trivial mapping between input and output coordinates.

It can be meaningful to pair a Vertical Strip Read Iterator and Vertical Strip Write Iterator. In this case it is possible to assign both to a single ALU 188 if input and output images are the same. If coordinates are required, a further Iterator must be used with PassX and PassY flags set. The Vertical Strip Read/Write Iterator presents pixels to the Input FIFO, and accepts output pixels from the Output FIFO. Appropriate padding bytes will be inserted on the write. Input and output require a minimum of 2 cache lines each for good performance.

Table I/O Addressing Modes

It is often necessary to lookup values in a table (such as an image). Table I/O addressing modes provide this functionality, requiring the client to place the index/es into the Output FIFO. The I/O Address Generator then processes the index/es, looks up the data appropriately, and returns the looked-up values in the Input FIFO for subsequent processing by the VLIW client.

1D, 2D and 3D tables are supported, with particular modes targeted at interpolation. To reduce complexity on the VLIW client side, the index values are treated as fixed-point numbers, with AccessSpecific registers defining the fixed point and therefore which bits should be treated as the integer portion of the index. Data formats are restricted forms of the general Image Characteristics in that the PixelOffset register is ignored, the data is assumed to be contiguous within a row, and can only be 8 or 16 bits (1 or 2 bytes) per data element. The 4 bit Address Mode Register is used to determine the I/O type:

Bit #Address Mode
31 = This addressing mode is Table I/O
2 to 0000 = 1D Direct Lookup
001 = 1D Interpolate (linear)
010 = DRAM FIFO
011 = Reserved
100 = 2D Interpolate (bi-linear)
101 = Reserved
110 = 3D Interpolate (tri-linear)
111 = Image Pyramid Lookup

The access specific registers are:

Register NameLocalName#bitsDescription
AccessSpecific1Flags8General flags for reading and
writing. See below for more
information.
AccessSpecific2FractX8Number of fractional bits in X
index
AccessSpecific3FractY8Number of fractional bits in Y
index
AccessSpecific4FractZ8Number of fractional bits in Z
(low 8 bits/nextindex
12 or 24 bits))ZOffset12 orSee below
24

FractX, FractY, and FractZ are used to generate addresses based on indexes, and interpret the format of the index in terms of significant bits and integer/fractional components. The various parameters are only defined as required by the number of dimensions in the table being indexed. A 1D table only needs FractX, a 2D table requires FractX and FractY. Each Fract_value consists of the number of fractional bits in the corresponding index. For example, an X index may be in the format 5:3. This would indicate 5 bits of integer, and 3 bits of fraction. FractX would therefore be set to 3. A simple 1D lookup could have the format 8:0, i.e. no fractional component at all. FractX would therefore be 0. ZOffset is only required for 3D lookup and takes on two different interpretations. It is described more fully in the 3D-table lookup section. The Flags register (AccessSpecific1) contains a number of flags used to determine factors affecting the reading (and in one case, writing) of data. The Flags register has the following composition:

Label#bitsDescription
ReadEnable1Read data from DRAM
WriteEnable1Write data to DRAM [only valid for 1D direct
lookup]
DataSize10 = 8 bit data
1 = 16 bit data
Reserved5Must be 0

With the exception of the 1D Direct Lookup and DRAM FIFO, all Table I/O modes only support reading, and not writing. Therefore the ReadEnable bit will be set and the WriteEnable bit will be clear for all I/O modes other than these two modes. The 1D Direct Lookup supports 3 modes:

    • Read only, where the ReadEnable bit is set and the WriteEnable bit is clear
    • Write only, where the ReadEnable bit is clear and the WriteEnable bit is clear
    • Read-Modify-Write, where both ReadEnable and the WriteEnable bits are set
      The different modes are described in the 1D Direct Lookup section below. The DRAM FIFO mode supports only 1 mode:
    • Write-Read mode, where both ReadEnable and the WriteEnable bits are set

This mode is described in the DRAM FIFO section below. The DataSize flag determines whether the size of each data elements of the table is 8 or 16 bits. Only the two data sizes are supported. 32 bit elements can be created in either of 2 ways depending on the requirements of the process:

    • Reading from 2 16-bit tables simultaneously and combining the result. This is convenient if timing is an issue, but has the disadvantage of consuming 2 I/O Address Generators 189, 190, and each 32-bit element is not readable by the CPU as a 32-bit entity.
    • Reading from a 16-bit table twice and combining the result. This is convenient since only 1 lookup is used, although different indexes must be generated and passed into the lookup.
      1 Dimensional Structures
      Direct Lookup

A direct lookup is a simple indexing into a 1 dimensional lookup table. Clients can choose between 3 access modes by setting appropriate bits in the Flags register:

    • Read only
    • Write only
    • Read-Modify-Write
      Read Only

A client passes the fixed-point index X into the Output FIFO, and the 8 or 16-bit value at Table[Int(X)] is returned in the Input FIFO. The fractional component of the index is completely ignored. If the index is out of bounds, the DuplicateEdge flag determines whether the edge pixel or ConstantPixel is returned. The address generation is straightforward:

    • If DataSize indicates 8 bits, X is barrel-shifted right FractX bits, and the result is added to the table's base address ImageStart.
    • If DataSize indicates 16 bits, X is barrel-shifted right FractX bits, and the result shifted left 1 bit (bit0 becomes 0) is added to the table's base address ImageStart.

The 8 or 16-bit data value at the resultant address is placed into the Input FIFO. Address generation takes 1 cycle, and transferring the requested data from the cache to the Output FIFO also takes 1 cycle (assuming a cache hit). For example, assume we are looking up values in a 256-entry table, where each entry is 16 bits, and the index is a 12 bit fixed-point format of 8:4. FractX should be 4, and DataSize 1. When an index is passed to the lookup, we shift right 4 bits, then add the result shifted left 1 bit to ImageStart.

Write Only

A client passes the fixed-point index X into the Output FIFO followed by the 8 or 16-bit value that is to be written to the specified location in the table. A complete transfer takes a minimum of 2 cycles. 1 cycle for address generation, and 1 cycle to transfer the data from the FIFO to DRAM. There can be an arbitrary number of cycles between a VLIW process placing the index into the FIFO and placing the value to be written into the FIFO. Address generation occurs in the same way as Read Only mode, but instead of the data being read from the address, the data from the Output FIFO is written to the address. If the address is outside the table range, the data is removed from the FIFO but not written to DRAM.

Read-Modify-Write

A client passes the fixed-point index X into the Output FIFO, and the 8 or 16-bit value at Table[Int(X)] is returned in the Input FIFO. The next value placed into the Output FIFO is then written to Table[Int(X)], replacing the value that had been returned earlier. The general processing loop then, is that a process reads from a location, modifies the value, and writes it back. The overall time is 4 cycles:

    • Generate address from index
    • Return value from table
    • Modify value in some way
    • Write it back to the table

There is no specific read/write mode where a client passes in a flag saying “read from X” or “write to X”. Clients can simulate a “read from X” by writing the original value, and a “write to X” by simply ignoring the returned value. However such use of the mode is not encouraged since each action consumes a minimum of 3 cycles (the modify is not required) and 2 data accesses instead of 1 access as provided by the specific Read and Write modes.

Interpolate Table

This is the same as a Direct Lookup in Read mode except that two values are returned for a given fixed-point index X instead of one. The values returned are Table[Int(X)], and Table[Int(X)+1]. If either index is out of bounds the DuplicateEdge flag determines whether the edge pixel or ConstantPixel is returned. Address generation is the same as Direct Lookup, with the exception that the second address is simply Address1+1 or 2 depending on 8 or 16 bit data. Transferring the requested data to the Output FIFO takes 2 cycles (assuming a cache hit), although two 8-bit values may actually be returned from the cache to the Address Generator in a single 16-bit fetch.

DRAM FIFO

A special case of a read/write 1D table is a DRAM FIFO. It is often necessary to have a simulated FIFO of a given length using DRAM and associated caches. With a DRAM FIFO, clients do not index explicitly into the table, but write to the Output FIFO as if it was one end of a FIFO and read from the Input FIFO as if it was the other end of the same logical FIFO. 2 counters keep track of input and output positions in the simulated FIFO, and cache to DRAM as needed. Clients need to set both ReadEnable and WriteEnable bits in the Flags register.

An example use of a DRAM FIFO is keeping a single line history of some value. The initial history is written before processing begins. As the general process goes through a line, the previous line's value is retrieved from the FIFO, and this line's value is placed into the FIFO (this line will be the previous line when we process the next line). So long as input and outputs match each other on average, the Output FIFO should always be full. Consequently there is effectively no access delay for this kind of FIFO (unless the total FIFO length is very small—say 3 or 4 bytes, but that would defeat the purpose of the FIFO).

2 Dimensional Tables

Direct Lookup

A 2 dimensional direct lookup is not supported. Since all cases of 2D lookups are expected to be accessed for bi-linear interpolation, a special bi-linear lookup has been implemented.

Bi-Linear Lookup

This kind of lookup is necessary for bi-linear interpolation of data from a 2D table. Given fixed-point X and Y coordinates (placed into the Output FIFO in the order Y, X), 4 values are returned after lookup. The values (in order) are:

    • Table[Int(X), Int(Y)]
    • Table[Int(X)+1, Int(Y)]
    • Table[Int(X), Int(Y)+1]
    • Table[Int(X)+1, Int(Y)+1]

The order of values returned gives the best cache coherence. If the data is 8-bit, 2 values are returned each cycle over 2 cycles with the low order byte being the first data element. If the data is 16-bit, the 4 values are returned in 4 cycles, 1 entry per cycle. Address generation takes 2 cycles. The first cycle has the index (Y) barrel-shifted right FractY bits being multiplied by RowOffset, with the result added to ImageStart. The second cycle shifts the X index right by FractX bits, and then either the result (in the case of 8 bit data) or the result shifted left 1 bit (in the case of 16 bit data) is added to the result from the first cycle. This gives us address Adr=address of Table[Int(X), Int(Y)]:
Adr=ImageStart+ShiftRight(Y,FractY)*RowOffset)+ShiftRight(X,FractX)

We keep a copy of Adr in AdrOld for use fetching subsequent entries.

    • If the data is 8 bits, the timing is 2 cycles of address generation, followed by 2 cycles of data being returned (2 table entries per cycle).
    • If the data is 16 bits, the timing is 2 cycles of address generation, followed by 4 cycles of data being returned (1 entry per cycle)

The following 2 tables show the method of address calculation for 8 and 16 bit data sizes:

CycleCalculation while fetching 2 × 8-bit data entries from Adr
1Adr = Adr + RowOffset
2<preparing next lookup>

CycleCalculation while fetching 1 × 16-bit data entry from Adr
1Adr = Adr + 2
2Adr = AdrOld + RowOffset
3Adr = Adr + 2
4<preparing next lookup>

In both cases, the first cycle of address generation can overlap the insertion of the X index into the FIFO, so the effective timing can be as low as 1 cycle for address generation, and 4 cycles of return data. If the generation of indexes is 2 steps ahead of the results, then there is no effective address generation time, and the data is simply produced at the appropriate rate (2 or 4 cycles per set).

3 Dimensional Lookup

Direct Lookup

Since all cases of 2D lookups are expected to be accessed for tri-linear interpolation, two special tri-linear lookups have been implemented. The first is a straightforward lookup table, while the second is for tri-linear interpolation from an Image Pyramid.

Tri-Linear Lookup

This type of lookup is useful for 3D tables of data, such as color conversion tables. The standard image parameters define a single XY plane of the data—i.e. each plane consists of ImageHeight rows, each row containing RowOffset bytes. In most circumstances, assuming contiguous planes, one XY plane will be ImageHeight×RowOffset bytes after another. Rather than assume or calculate this offset, the software via the CPU must provide it in the form of a 12-bit ZOffset register. In this form of lookup, given 3 fixed-point indexes in the order Z, Y, X, 8 values are returned in order from the lookup table:

    • Table[Int(X), Int(Y), Int(Z)]
    • Table[Int(X)+1, Int(Y), Int(Z)]
    • Table[Int(X), Int(Y)+1, Int(Z)]
    • Table[Int(X)+1, Int(Y)+1, Int(Z)]
    • Table[Int(X), Int(Y), Int(Z)+1]
    • Table[Int(X)+1, Int(Y), Int(Z)+1]
    • Table[Int(X), Int(Y)+1, Int(Z)+1]
    • Table[Int(X)+1, Int(Y)+1, Int(Z)+1]

The order of values returned gives the best cache coherence. If the data is 8-bit, 2 values are returned each cycle over 4 cycles with the low order byte being the first data element. If the data is 16-bit, the 4 values are returned in 8 cycles, 1 entry per cycle. Address generation takes 3 cycles. The first cycle has the index (Z) barrel-shifted right FractZ bits being multiplied by the 12-bit ZOffset and added to ImageStart. The second cycle has the index (Y) barrel-shifted right FractY bits being multiplied by RowOffset, with the result added to the result of the previous cycle. The second cycle shifts the X index right by FractX bits, and then either the result (in the case of 8 bit data) or the result shifted left 1 bit (in the case of 16 bit data) is added to the result from the second cycle. This gives us address Adr=address of Table[Int(X), Int(Y), Int(Z)]:

Adr=ImageStart+(ShiftRight(Z,FractZ)*ZOffset)+(ShiftRight(Y,FractY)*RowOffset)+ShiftRight(X,FractX)

We keep a copy of Adr in AdrOld for use fetching subsequent entries.

    • If the data is 8 bits, the timing is 2 cycles of address generation, followed by 2 cycles of data being returned (2 table entries per cycle).
    • If the data is 16 bits, the timing is 2 cycles of address generation, followed by 4 cycles of data being returned (1 entry per cycle)

The following 2 tables show the method of address calculation for 8 and 16 bit data sizes:

CycleCalculation while fetching 2 × 8-bit data entries from Adr
1Adr = Adr + RowOffset
2Adr = AdrOld + ZOffset
3Adr = Adr + RowOffset
4<preparing next lookup>

CycleCalculation while fetching 1 × 16-bit data entries from Adr
1Adr = Adr + 2
2Adr = AdrOld + RowOffset
3Adr = Adr + 2
4Adr, AdrOld = AdrOld + Zoffset
5Adr = Adr + 2
6Adr = AdrOld + RowOffset
7Adr = Adr + 2
8<preparing next lookup>

In both cases, the cycles of address generation can overlap the insertion of the indexes into the FIFO, so the effective timing for a single one-off lookup can be as low as 1 cycle for address generation, and 4 cycles of return data. If the generation of indexes is 2 steps ahead of the results, then there is no effective address generation time, and the data is simply produced at the appropriate rate (4 or 8 cycles per set).

Image Pyramid Lookup

During brushing, tiling, and warping it is necessary to compute the average color of a particular area in an image. Rather than calculate the value for each area given, these functions make use of an image pyramid. The description and construction of an image pyramid is detailed in the section on Internal Image Formats in the DRAM interface 81 chapter of this document. This section is concerned with a method of addressing given pixels in the pyramid in terms of 3 fixed-point indexes ordered: level (Z), Y, and X. Note that Image Pyramid lookup assumes 8 bit data entries, so the DataSize flag is completely ignored. After specification of Z, Y, and X, the following 8 pixels are returned via the Input FIFO:

    • The pixel at [Int(X), Int(Y)], level Int(Z)
    • The pixel at [Int(X)+1, Int(Y)], level Int(Z)
    • The pixel at [Int(X), Int(Y)+1], level Int(Z)
    • The pixel at [Int(X)+1, Int(Y)+1], level Int(Z)
    • The pixel at [Int(X), Int(Y)], level Int(Z)+1
    • The pixel at [Int(X)+1, Int(Y)], level Int(Z)+1
    • The pixel at [Int(X), Int(Y)+1], level Int(Z)+1
    • The pixel at [Int(X)+1, Int(Y)+1], level Int(Z)+1

The 8 pixels are returned as 4×16 bit entries, with X and X+1 entries combined hi/lo. For example, if the scaled (X, Y) coordinate was (10.4, 12.7) the first 4 pixels returned would be: (10.4, 12), (11, 12), (10, 13) and (11, 13). When a coordinate is outside the valid range, clients have the choice of edge pixel duplication or returning of a constant color value via the DuplicateEdgePixels and ConstantPixel registers (only the low 8 bits are used). When the Image Pyramid has been constructed, there is a simple mapping from level 0 coordinates to level Z coordinates. The method is simply to shift the X or Y coordinate right by Z bits. This must be done in addition to the number of bits already shifted to retrieve the integer portion of the coordinate (i.e. shifting right FractX and FractY bits for X and Y ordinates respectively). To find the ImageStart and RowOffset value for a given level of the image pyramid, the 24-bit ZOffset register is used as a pointer to a Level Information Table. The table is an array of records, each representing a given level of the pyramid, ordered by level number. Each record consists of a 16-bit offset ZOffset from ImageStart to that level of the pyramid (64-byte aligned address as lower 6 bits of the offset are not present), and a 12 bit ZRowOffset for that level. Element 0 of the table would contain a ZOffset of 0, and a ZRowOffset equal to the general register RowOffset, as it simply points to the full sized image. The ZOffset value at element N of the table should be added to ImageStart to yield the effective ImageStart of level N of the image pyramid. The RowOffset value in element N of the table contains the RowOffset value for level N. The software running on the CPU must set up the table appropriately before using this addressing mode. The actual address generation is outlined here in a cycle by cycle description:

LoadFrom
CycleRegisterAddressOther Operations
0ZAdr = ShiftRight(Z, FractZ) +
ZOffset
ZInt = ShiftRight(Z, FractZ)
1ZOffsetZadrZAdr += 2
YInt = ShiftRight(Y, FractY)
2ZRowOffsetZAdrZAdr += 2
YInt = ShiftRight(YInt, ZInt)
Adr = ZOffset + ImageStart
3ZOffsetZAdrZAdr += 2
Adr += ZrowOffset * YInt
XInt = ShiftRight(X, FractX)
4ZAdrZAdrAdr += ShiftRight(XInt, ZInt)
ZOffset += ShiftRight(XInt, 1)
5FIFOAdrAdr += ZrowOffset
ZOffset += ImageStart
6FIFOAdrAdr = (ZAdr * ShiftRight(Yint, 1)) +
ZOffset
7FIFOAdrAdr += Zadr
8FIFOAdr< Cycle 0 for next retrieval>

The address generation as described can be achieved using a single Barrel Shifter, 2 adders, and a single 16×16 multiply/add unit yielding 24 bits. Although some cycles have 2 shifts, they are either the same shift value (i.e. the output of the Barrel Shifter is used two times) or the shift is 1 bit, and can be hard wired. The following internal registers are required: ZAdr, Adr, ZInt, YInt, XInt, ZRowOffset, and ZImageStart. The Int registers only need to be 8 bits maximum, while the others can be up to 24 bits. Since this access method only reads from, and does not write to image pyramids, the CacheGroup2 is used to lookup the Image Pyramid Address Table (via ZAdr). CacheGroup1 is used for lookups to the image pyramid itself (via Adr). The address table is around 22 entries (depending on original image size), each of 4 bytes. Therefore 3 or 4 cache lines should be allocated to CacheGroup2, while as many cache lines as possible should be allocated to CacheGroup1. The timing is 8 cycles for returning a set of data, assuming that Cycle 8 and Cycle 0 overlap in operation—i.e. the next request's Cycle 0 occurs during Cycle 8. This is acceptable since Cycle 0 has no memory access, and Cycle 8 has no specific operations.

Generation of Coordinates Using VLIW Vector Processor 74

Some functions that are linked to Write Iterators require the X and/or Y coordinates of the current pixel being processed in part of the processing pipeline. Particular processing may also need to take place at the end of each row, or column being processed. In most cases, the PassX and PassY flags should be sufficient to completely generate all coordinates. However, if there are special requirements, the following functions can be used. The calculation can be spread over a number of ALUs, for a single cycle generation, or be in a single ALU 188 for a multi-cycle generation.

Generate Sequential [X, Y]

When a process is processing pixels in sequential order according to the Sequential Read Iterator (or generating pixels and writing them out to a Sequential Write Iterator), the following process can be used to generate X, Y coordinates instead of PassX/PassY flags as shown in FIG. 23. The coordinate generator counts up to ImageWidth in the X ordinate, and once per ImageWidth pixels increments the Y ordinate. The actual process is illustrated in FIG. 24, where the following constants are set by software:

ConstantValue
K1ImageWidth
K2ImageHeight (optional)

The following registers are used to hold temporary variables:

VariableValue
Reg1X (starts at 0 each line)
Reg2Y (starts at 0)

The requirements are summarized as follows:

Requirements*++RKLUIterators
General0¾2½00
TOTAL0¾2½00

Generate Vertical Strip [X, Y]

When a process is processing pixels in order to write them to a Vertical Strip Write Iterator, and for some reason cannot use the PassX/PassY flags, the process as illustrated in FIG. 25 can be used to generate X, Y coordinates. The coordinate generator simply counts up to ImageWidth in the X ordinate, and once per ImageWidth pixels increments the Y ordinate. The actual process is illustrated in FIG. 26, where the following constants are set by software:

ConstantValue
K132
K2ImageWidth
K3ImageHeight

The following registers are used to hold temporary variables:

VariableValue
Reg1StartX (starts at 0, and is incremented by 32 once per
vertical strip)
Reg2X
Reg3EndX (starts at 32 and is incremented by 32 to a maximum of
ImageWidth) once per vertical strip)
Reg4Y

The requirements are summarized as follows:

Requirements*++RKLUIterators
General044300
TOTAL044300

The calculations that occur once per vertical strip (2 additions, one of which has an associated MIN) are not included in the general timing statistics because they are not really part of the per pixel to timing. However they do need to be taken into account for the programming of the microcode for the particular function.

Image Sensor Interface (ISI 83)

The Image Sensor Interface (ISI 83) takes data from the CMOS Image Sensor and makes it available for storage in DRAM. The image sensor has an aspect ratio of 3:2, with a typical resolution of 750×500 samples, yielding 375K (8 bits per pixel). Each 2×2 pixel block has the configuration as shown in FIG. 27. The ISI 83 is a state machine that sends control information to the Image Sensor, including frame sync pulses and pixel clock pulses in order to read the image. Pixels are read from the image sensor and placed into the VLIW Input FIFO 78. The VLIW is then able to process and/or store the pixels. This is illustrated further in FIG. 28. The ISI 83 is used in conjunction with a VLIW program that stores the sensed Photo Image in DRAM. Processing occurs in 2 steps:

    • A small VLIW program reads the pixels from the FIFO and writes them to DRAM via a Sequential Write Iterator.
    • The Photo Image in DRAM is rotated 90, 180 or 270 degrees according to the orientation of the camera when the photo was taken.

If the rotation is 0 degrees, then step 1 merely writes the Photo Image out to the final Photo Image location and step 2 is not performed. If the rotation is other than 0 degrees, the image is written out to a temporary area (for example into the Print Image memory area), and then rotated during step 2 into the final Photo Image location. Step 1 is very simple microcode, taking data from the VLIW Input FIFO 78 and writing it to a Sequential Write Iterator. Step 2's rotation is accomplished by using the accelerated Vark Affine Transform function. The processing is performed in 2 steps in order to reduce design complexity and to re-use the Vark affine transform rotate logic already required for images. This is acceptable since both steps are completed in approximately 0.03 seconds, a time imperceptible to the operator of the Artcam. Even so, the read process is sensor speed bound, taking 0.02 seconds to read the full frame, and approximately 0.01 seconds to rotate the image.

The orientation is important for converting between the sensed Photo Image and the internal format image, since the relative positioning of R, G, and B pixels changes with orientation. The processed image may also have to be rotated during the Print process in order to be in the correct orientation for printing. The 3D model of the Artcam has 2 image sensors, with their inputs multiplexed to a single ISI 83 (different microcode, but same ACP 31). Since each sensor is a frame store, both images can be taken simultaneously, and then transferred to memory one at a time.

Display Controller 88

When the “Take” button on an Artcam is half depressed, the TFT will display the current image from the image sensor (converted via a simple VLIW process). Once the Take button is fully depressed, the Taken Image is displayed. When the user presses the Print button and image processing begins, the TFT is turned off. Once the image has been printed the TFT is turned on again. The Display Controller 88 is used in those Artcam models that incorporate a flat panel display. An example display is a TFT LCD of resolution 240×160 pixels. The structure of the Display Controller 88 isl illustrated in FIG. 29. The Display Controller 88 State Machine contains registers that control the timing of the Sync Generation, where the display image is to be taken from (in DRAM via the Data cache 76 via a specific Cache Group), and whether the TFT should be active or not (via TFT Enable) at the moment. The CPU can write to these registers via the low speed bus. Displaying a 240×160 pixel image on an RGB TFT requires 3 components per pixel. The image taken from DRAM is displayed via 3 DACs, one for each of the R, G, and B output signals. At an image refresh rate of 30 frames per second (60 fields per second) the Display Controller 88 requires data transfer rates of:
240×160×3×30=3.5 MB per second
This data rate is low compared to the rest of the system. However it is high enough to cause VLIW programs to slow down during the intensive image processing. The general principles of TFT operation should reflect this.
Image Data Formats

As stated previously, the DRAM Interface 81 is responsible for interfacing between other client portions of the ACP chip and the RAMBUS DRAM. In effect, each module within the DRAM Interface is an address generator.

There are three logical types of images manipulated by the ACP. They are:

    • CCD Image, which is the Input Image captured from the CCD.
    • Internal Image format—the Image format utilised internally by the Artcam device.

Print Image—the Output Image format printed by the Artcam

These images are typically different in color space, resolution, and the output & input color spaces which can vary from camera to camera. For example, a CCD image on a low-end camera may be a different resolution, or have different color characteristics from that used in a high-end camera. However all internal image formats are the same format in terms of color space across all cameras.

In addition, the three image types can vary with respect to which direction is ‘up’. The physical orientation of the camera causes the notion of a portrait or landscape image, and this must be maintained throughout processing. For this reason, the internal image is always oriented correctly, and rotation is performed on images obtained from the CCD and during the print operation.

CCD Image Organization

Although many different CCD image sensors could be utilised, it will be assumed that the CCD itself is a 750×500 image sensor, yielding 375,000 bytes (8 bits per pixel). Each 2×2 pixel block having the configuration as depicted in FIG. 30.

A CCD Image as stored in DRAM has consecutive pixels with a given line contiguous in memory. Each line is stored one after the other. The image sensor Interface 83 is responsible for taking data from the CCD and storing it in the DRAM correctly oriented. Thus a CCD image with rotation 0 degrees has its first line G, R, G, R, G, R . . . and its second line as B, G, B, G, B, G . . . . If the CCD image should be portrait, rotated 90 degrees, the first line will be R, G, R, G, R, G and the second line G, B, G, B, G, B . . . etc.

Pixels are stored in an interleaved fashion since all color components are required in order to convert to the internal image format.

It should be noted that the ACP 31 makes no assumptions about the CCD pixel format, since the actual CCDs for imaging may vary from Artcam to Artcam, and over time. All processing that takes place via the hardware is controlled by major microcode in an attempt to extend the usefulness of the ACP 31.

Internal Image Organization

Internal images typically consist of a number of channels. Vark images can include, but are not limited to:

Lab

Labα

LabΔ

αΔ

L

L, a and b correspond to components of the Lab color space, α is a matte channel (used for compositing), and Δ is a bump-map channel (used during brushing, tiling and illuminating).

The VLIW processor 74 requires images to be organized in a planar configuration. Thus a Lab image would be stored as 3 separate blocks of memory:

one block for the L channel,

one block for the a channel, and

one block for the b channel

Within each channel block, pixels are stored contiguously for a given row (plus some optional padding bytes), and rows are stored one after the other.

Turning to FIG. 31 there is illustrated an example form of storage of a logical image 100. The logical image 100 is stored in a planar fashion having L 101, a 102 and b 103 color components stored one after another. Alternatively, the logical image 100 can be stored in a compressed format having an uncompressed L component 101 and compressed A and B components 105, 106.

Turning to FIG. 32, the pixels of for line n 110 are stored together before the pixels of for line and n+1 (111). With the image being stored in contiguous memory within a single channel.

In the 8 MB-memory model, the final Print Image after all processing is finished, needs to be compressed in the chrominance channels. Compression of chrominance channels can be 4:1, causing an overall compression of 12:6, or 2:1.

Other than the final Print Image, images in the Artcam are typically not compressed. Because of memory constraints, software may choose to compress the final Print Image in the chrominance channels by scaling each of these channels by 2:1. If this has been done, the PRINT Vark function call utilised to print an image must be told to treat the specified chrominance channels as compressed. The PRINT function is the only function that knows how to deal with compressed chrominance, and even so, it only deals with a fixed 2:1 compression ratio.

Although it is possible to compress an image and then operate on the compressed image to create the final print image, it is not recommended due to a loss in resolution. In addition, an image should only be compressed once—as the final stage before printout. While one compression is virtually undetectable, multiple compressions may cause substantial image degradation.

Clip Image Organization

Clip images stored on Artcards have no explicit support by the ACP 31. Software is responsible for taking any images from the current Artcard and organizing the data into a form known by the ACP. If images are stored compressed on an Artcard, software is responsible for decompressing them, as there is no specific hardware support for decompression of Artcard images.

Image Pyramid Organization

During brushing, tiling, and warping processes utilised to manipulate an image it is often necessary to compute the average color of a particular area in an image. Rather than calculate the value for each area given, these functions make use of an image pyramid. As illustrated in FIG. 33, an image pyramid is effectively a multi-resolutionpixel-map. The original image 115 is a 1:1 representation. Low-pass filtering and sub-sampling by 2:1 in each dimension produces an image ¼ the original size 116. This process continues until the entire image is represented by a single pixel. An image pyramid is constructed from an original internal format image, and consumes ⅓ of the size taken up by the original image (¼+ 1/16+ 1/64+ . . . ). For an original image of 1500×1000 the corresponding image pyramid is approximately ½ MB. An image pyramid is constructed by a specific Vark function, and is used as a parameter to other Vark functions.

Print Image Organization

The entire processed image is required at the same time in order to print it. However the Print Image output can comprise a CMY dithered image and is only a transient image format, used within the Print Image functionality. However, it should be noted that color conversion will need to take place from the internal color space to the print color space. In addition, color conversion can be tuned to be different for different print rolls in the camera with different ink characteristics e.g. Sepia output can be accomplished by using a specific sepia toning Artcard, or by using a sepia tone print-roll (so all Artcards will work in sepia tone).

Color Spaces

As noted previously there are 3 color spaces used in the Artcam, corresponding to the different image types.

The ACP has no direct knowledge of specific color spaces. Instead, it relies on client color space conversion tables to convert between CCD, internal, and printer color spaces:

CCD:RGB

Internal:Lab

Printer: CMY

Removing the color space conversion from the ACP 31 allows:

    • Different CCDs to be used in different cameras
    • Different inks (in different print rolls over time) to be used in the same camera
    • Separation of CCD selection from ACP design path
    • A well defined internal color space for accurate color processing
      Artcard Interface 87

The Artcard Interface (AI) takes data from the linear image Sensor while an Artcard is passing under it, and makes that data available for storage in DRAM. The image sensor produces 11,000 8-bit samples per scanline, sampling the Artcard at 4800 dpi. The AI is a state machine that sends control information to the linear sensor, including LineSync pulses and PixelClock pulses in order to read the image. Pixels are read from the linear sensor and placed into the VLIW Input FIFO 78. The VLIW is then able to process and/or store the pixels. The AI has only a few registers:

Description
Register Name
NumPixelsThe number of pixels in a sensor line (approx 11,000)
StatusThe Print Head Interface's Status Register
PixelsRemainingThe number of bytes remaining in the current line
Actions
ResetA write to this register resets the AI, stops any
scanning, and loads all registers with 0.
ScanA write to this register with a non-zero value sets
the Scanning bit of the Status register, and
causes the Artcard Interface Scan cycle to start.
A write to this register with 0 stops the scanning
process and clears the Scanning bit in the
Status register.
The Scan cycle causes the AI to transfer NumPixels
bytes from the sensor to the VLIW Input FIFO 78,
producing the PixelClock signals appropriately.
Upon completion of NumPixels bytes, a LineSync
pulse is given and the Scan cycle restarts.
The PixelsRemaining register holds the number of
pixels remaining to be read on the current scanline.

Note that the CPU should clear the VLIW Input FIFO 78 before initiating a Scan. The Status register has bit interpretations as follows:

Bit NameBitsDescription
Scanning1If set, the AI is currently scanning, with the number of
pixels remaining to be transferred from the current line
recorded in PixelsRemaining.
If clear, the AI is not currently scanning, so is not
transferring pixels to the VLIW Input FIFO 78.

Artcard Interface (AI) 87

The Artcard Interface (AI) 87 is responsible for taking an Artcard image from the Artcard Reader 34, and decoding it into the original data (usually a Vark script). Specifically, the AI 87 accepts signals from the Artcard scanner linear CCD 34, detects the bit pattern printed on the card, and converts the bit pattern into the original data, correcting read errors.

With no Artcard 9 inserted, the image printed from an Artcam is simply the sensed Photo Image cleaned up by any standard image processing routines. The Artcard 9 is the means by which users are able to modify a photo before printing it out. By the simple task of inserting a specific Artcard 9 into an Artcam, a user is able to define complex image processing to be performed on the Photo Image.

With no Artcard inserted the Photo Image is processed in a standard way to create the Print Image.

When a single Artcard 9 is inserted into the Artcam, that Artcard's effect is applied to the Photo Image to generate the Print Image.

When the Artcard 9 is removed (ejected), the printed image reverts to the Photo Image processed in a standard way. When the user presses the button to eject an Artcard, an event is placed in the event queue maintained by the operating system running on the Artcam Central Processor 31. When the event is processed (for example after the current Print has occurred), the following things occur:

If the current Artcard is valid, then the Print Image is marked as invalid and a ‘Process Standard’ event is placed in the event queue. When the event is eventually processed it will perform the standard image processing operations on the Photo Image to produce the Print Image. The motor is started to eject the Artcard and a time-specific ‘Stop-Motor’ Event is added to the event queue.

Inserting an Artcard

When a user inserts an Artcard 9, the Artcard Sensor 49 detects it notifying the ACP72. This results in the software inserting an ‘Artcard Inserted’ event into the event queue. When the event is processed several things occur:

The current Artcard is marked as invalid (as opposed to ‘none’).

The Print Image is marked as invalid.

The Artcard motor 37 is started up to load the Artcard

The Artcard Interface 87 is instructed to read the Artcard

The Artcard Interface 87 accepts signals from the Artcard scanner linear CCD 34, detects the bit pattern printed on the card, and corrects errors in the detected bit pattern, producing a valid Artcard data block in DRAM.

Reading Data from the Artcard CCD—General Considerations

As illustrated in FIG. 34, the Data Card reading process has 4 phases operated while the pixel data is read from the card. The phases are as follows:

Phase 1. Detect data area on Artcard

Phase 2. Detect bit pattern from Artcard based on CCD pixels, and write as bytes.

Phase 3. Descramble and XOR the byte-pattern

Phase 4. Decode data (Reed-Solomon decode)

As illustrated in FIG. 35, the Artcard 9 must be sampled at least at double the printed resolution to satisfy Nyquist's Theorem. In practice it is better to sample at a higher rate than this. Preferably, the pixels are sampled 230 at 3 times the resolution of a printed dot in each dimension, requiring 9 pixels to define a single dot. Thus if the resolution of the Artcard 9 is 1600 dpi, and the resolution of the sensor 34 is 4800 dpi, then using a 50 mm CCD image sensor results in 9450 pixels per column. Therefore if we require 2 MB of dot data (at 9 pixels per dot) then this requires 2 MB*8*9/9450=15,978 columns=approximately 16,000 columns. Of course if a dot is not exactly aligned with the sampling CCD the worst and most likely case is that a dot will be sensed over a 16 pixel area (4×4) 231.

An Artcard 9 may be slightly warped due to heat damage, slightly rotated (up to, say 1 degree) due to differences in insertion into an Artcard reader, and can have slight differences in true data rate due to fluctuations in the speed of the reader motor 37. These changes will cause columns of data from the card not to be read as corresponding columns of pixel data. As illustrated in FIG. 36, a 1 degree rotation in the Artcard 9 can cause the pixels from a column on the card to be read as pixels across 166 columns:

Finally, the Artcard 9 should be read in a reasonable amount of time with respect to the human operator. The data on the Artcard covers most of the Artcard surface, so timing concerns can be limited to the Artcard data itself. A reading time of 1.5 seconds is adequate for Artcard reading.

The Artcard should be loaded in 1.5 seconds. Therefore all 16,000 columns of pixel data must be read from the CCD 34 in 1.5 second, i.e. 10,667 columns per second. Therefore the time available to read one column is 1/10667 seconds, or 93,747 ns. Pixel data can be written to the DRAM one column at a time, completely independently from any processes that are reading the pixel data.

The time to write one column of data (9450/2 bytes since the reading can be 4 bits per pixel giving 2×4 bit pixels per byte) to DRAM is reduced by using 8 cache lines. If 4 lines were written out at one time, the 4 banks can be written to independently, and thus overlap latency reduced. Thus the 4725 bytes can be written in 11,840 ns (4725/128*320 ns). Thus the time taken to write a given column's data to DRAM uses just under 13% of the available bandwidth.

Decoding an Artcard

A simple look at the data sizes shows the impossibility of fitting the process into the 8 MB of memory 33 if the entire Artcard pixel data (140 MB if each bit is read as a 3×3 array) as read by the linear CCD 34 is kept. For this reason, the reading of the linear CCD, decoding of the bitmap, and the un-bitmap process should take place in real-time (while the Artcard 9 is traveling past the linear CCD 34), and these processes must effectively work without having entire data stores available.

When an Artcard 9 is inserted, the old stored Print Image and any expanded Photo Image becomes invalid. The new Artcard 9 can contain directions for creating a new image based on the currently captured Photo Image. The old Print Image is invalid, and the area holding expanded Photo Image data and image pyramid is invalid, leaving more than 5 MB that can be used as scratch memory during the read process. Strictly speaking, the 1 MB area where the Artcard raw data is to be written can also be used as scratch data during the Artcard read process as long as by the time the final Reed-Solomon decode is to occur, that 1 MB area is free again. The reading process described here does not make use of the extra 1 MB area (except as a final destination for the data).

It should also be noted that the unscrambling process requires two sets of 2 MB areas of memory since unscrambling cannot occur in place. Fortunately the 5 MB scratch area contains enough space for this process.

Turning now to FIG. 37, there is shown a flowchart 220 of the steps necessary to decode the Artcard data. These steps include reading in the Artcard 221, decoding the read data to produce corresponding encoded XORed scrambled bitmap data 223. Next a checkerboard XOR is applied to the data to produces encoded scrambled data 224. This data is then unscrambled 227 to produce data 225 before this data is subjected to Reed-Solomon decoding to produce the original raw data 226. Alternatively, unscrambling and XOR process can take place together, not requiring a separate pass of the data. Each of the above steps is discussed in further detail hereinafter. As noted previously with reference to FIG. 37, the Artcard Interface, therefore, has 4 phases, the first 2 of which are time-critical, and must take place while pixel data is being read from the CCD:

Phase 1. Detect data area on Artcard

Phase 2. Detect bit pattern from Artcard based on CCD pixels, and write as bytes.

Phase 3. Descramble and XOR the byte-pattern

Phase 4. Decode data (Reed-Solomon decode)

The four phases are described in more detail as follows:

Phase 1. As the Artcard 9 moves past the CCD 34 the AI must detect the start of the data area by robustly detecting special targets on the Artcard to the left of the data area. If these cannot be detected, the card is marked as invalid. The detection must occur in real-time, while the Artcard 9 is moving past the CCD 34.

If necessary, rotation invariance can be provided. In this case, the targets are repeated on the right side of the Artcard, but relative to the bottom right corner instead of the top corner. In this way the targets end up in the correct orientation if the card is inserted the “wrong” way. Phase 3 below can be altered to detect the orientation of the data, and account for the potential rotation.

Phase 2. Once the data area has been determined, the main read process begins, placing pixel data from the CCD into an ‘Artcard data window’, detecting bits from this window, assembling the detected bits into bytes, and constructing a byte-image in DRAM. This must all be done while the Artcard is moving past the CCD.

Phase 3. Once all the pixels have been read from the Artcard data area, the Artcard motor 37 can be stopped, and the byte image descrambled and XORed. Although not requiring real-time performance, the process should be fast enough not to annoy the human operator. The process must take 2 MB of scrambled bit-image and write the unscrambled/XORed bit-image to a separate 2 MB image.

Phase 4. The final phase in the Artcard read process is the Reed-Solomon decoding process, where the 2 MB bit-image is decoded into a 1 MB valid Artcard data area. Again, while not requiring real-time performance it is still necessary to decode quickly with regard to the human operator. If the decode process is valid, the card is marked as valid. If the decode failed, any duplicates of data in the bit-image are attempted to be decoded, a process that is repeated until success or until there are no more duplicate images of the data in the bit image.

The four phase process described requires 4.5 MB of DRAM. 2 MB is reserved for Phase 2 output, and 0.5 MB is reserved for scratch data during phases 1 and 2. The remaining 2 MB of space can hold over 440 columns at 4725 byes per column. In practice, the pixel data being read is a few columns ahead of the phase 1 algorithm, and in the worst case, about 180 columns behind phase 2, comfortably inside the 440 column limit

A description of the actual operation of each phase will now be provided in greater detail.

Phase 1—Detect Data Area on Artcard

This phase is concerned with robustly detecting the left-hand side of the data area on the Artcard 9. Accurate detection of the data area is achieved by accurate detection of special targets printed on the left side of the card. These targets are especially designed to be easy to detect even if rotated up to 1 degree.

Turning to FIG. 38, there is shown an enlargement of the left hand side of an Artcard 9. The side of the card is divided into 16 bands, 239 with a target eg. 241 located at the center of each band. The bands are logical in that there is no line drawn to separate bands. Turning to FIG. 39, there is shown a single target 241. The target 241, is a printed black square containing a single white dot. The idea is to detect firstly as many targets 241 as possible, and then to join at least 8 of the detected white-dot locations into a single logical straight line. If this can be done, the start of the data area 243 is a fixed distance from this logical line. If it cannot be done, then the card is rejected as invalid.

As shown in FIG. 38, the height of the card 9 is 3150 dots. A target (Target0) 241 is placed a fixed distance of 24 dots away from the top left corner 244 of the data area so that it falls well within the first of 16 equal sized regions 239 of 192 dots (576 pixels) with no target in the final pixel region of the card. The target 241 must be big enough to be easy to detect, yet be small enough not to go outside the height of the region if the card is rotated 1 degree. A suitable size for the target is a 31×31 dot (93×93 sensed pixels) black square 241 with the white dot 242.

At the worst rotation of 1 degree, a 1 column shift occurs every 57 pixels. Therefore in a 590 pixel sized band, we cannot place any part of our symbol in the top or bottom 12 pixels or so of the band or they could be detected in the wrong band at CCD read time if the card is worst case rotated.

Therefore, if the black part of the rectangle is 57 pixels high (19 dots) we can be sure that at least 9.5 black pixels will be read in the same column by the CCD (worst case is half the pixels are in one column and half in the next). To be sure of reading at least 10 black dots in the same column, we must have a height of 20 dots. To give room for erroneous detection on the edge of the start of the black dots, we increase the number of dots to 31, giving us 15 on either side of the white dot at the target's local coordinate (15, 15). 31 dots is 91 pixels, which at most suffers a 3 pixel shift in column, easily within the 576 pixel band.

Thus each target is a block of 31×31 dots (93×93 pixels) each with the composition:

15 columns of 31 black dots each (45 pixel width columns of 93 pixels).

1 column of 15 black dots (45 pixels) followed by 1 white dot (3 pixels) and then a further 15 black dots (45 pixels)

15 columns of 31 black dots each (45 pixel width columns of 93 pixels)

Detect Targets

Targets are detected by reading columns of pixels, one column at a time rather than by detecting dots. It is necessary to look within a given band for a number of columns consisting of large numbers of contiguous black pixels to build up the left side of a target. Next, it is expected to see a white region in the center of further black columns, and finally the black columns to the left of the target center.

Eight cache lines are required for good cache performance on the reading of the pixels. Each logical read fills 4 cache lines via 4 sub-reads while the other 4 cache-lines are being used. This effectively uses up 13% of the available DRAM bandwidth.

As illustrated in FIG. 40, the detection mechanism FIFO for detecting the targets uses a filter 245, run-length encoder 246, and a FIFO 247 that requires special wiring of the top 3 elements (S1, S2, and S3) for random access.

The columns of input pixels are processed one at a time until either all the targets are found, or until a specified number of columns have been processed. To process a column, the pixels are read from DRAM, passed through a filter 245 to detect a 0 or 1, and then run length encoded 246. The bit value and the number of contiguous bits of the same value are placed in FIFO 247. Each entry of the FIFO 249 is in 8 bits, 7 bits 250 to hold the run-length, and 1 bit 249 to hold the value of the bit detected.

The run-length encoder 246 only encodes contiguous pixels within a 576 pixel (192 dot) region.

The top 3 elements in the FIFO 247 can be accessed 252 in any random order. The run lengths (in pixels) of these entries are filtered into 3 values: short, medium, and long in accordance with the following table:

ShortUsed to detect white dot.RunLength < 16
MediumUsed to detect runs of black above or16 <= RunLength < 48
below the white dot in the center of the
target.
LongUsed to detect run lengths of black toRunLength >= 48
the left and right of the center dot in
the target.

Looking at the top three entries in the FIFO 247 there are 3 specific cases of interest:

Case 1S1 = white longWe have detected a black column of the
S2 = black longtarget to the left of or to the right of
S3 = white medium/the white center dot.
long
Case 2S1 = white longIf we've been processing a series of
S2 = black mediumcolumns of Case 1s, then we have
S3 = white shortprobably detected the white dot in this
Previous 8 columnscolumn. We know that the next entry will
were Case 1be black (or it would have been included
in the white S3 entry), but the number of
black pixels is in question. Need to verify
by checking after the next FIFO advance
(see Case 3).
Case 3Prev = Case 2We have detected part of the white dot.
S3 = black medWe expect around 3 of these, and then
some more columns of Case 1.

Preferably, the following information per region band is kept:

TargetDetected 1 bit
BlackDetectCount 4 bits
WhiteDetectCount 3 bits
PrevColumnStartPixel15 bits
TargetColumn ordinate16 bits (15:1)
TargetRow ordinate16 bits (15:1)
TOTAL7 bytes (rounded to 8 bytes for easy
addressing)

Given a total of 7 bytes. It makes address generation easier if the total is assumed to be 8 bytes. Thus 16 entries requires 16*8=128 bytes, which fits in 4 cache lines. The address range should be to inside the scratch 0.5 MB DRAM area since other phases make use of the remaining 4 MB data area.

When beginning to process a given pixel column, the register value S2StartPixel 254 is reset to 0. As entries in the FIFO advance from S2 to S1, they are also added 255 to the existing S2StartPixel value, giving the exact pixel position of the run currently defined in S2. Looking at each of the 3 cases of interest in the FIFO, S2StartPixel can be used to determine the start of the black area of a target (Cases 1 and 2), and also the start of the white dot in the center of the target (Case 3). An algorithm for processing columns can be as follows:

1TargetDetected[0-15] := 0
BlackDetectCount[0-15] := 0
WhiteDetectCount[0-15] := 0
TargetRow[0-15] := 0
TargetColumn[0-15] := 0
PrevColStartPixel[0-15] := 0
CurrentColumn := 0
2Do ProcessColumn
3CurrentColumn++
4If (CurrentColumn <= LastValidColumn)
Goto 2

The steps involved in the processing a column (Process Column) are as follows:

1S2StartPixel := 0
FIFO := 0
BlackDetectCount := 0
WhiteDetectCount := 0
ThisColumnDetected := FALSE
PrevCaseWasCase2 := FALSE
2If (! TargetDetected[Target]) & (! ColumnDetected[Target])
ProcessCases
EndIf
3PrevCaseWasCase2 := Case=2
4Advance FIFO

The processing for each of the 3 (Process Cases) cases is as follows:

Case 1:

BlackDetectCount[target] < 8Δ := ABS(S2StartPixel −
ORPrevColStartPixel[Target])
WhiteDetectCount[Target] = 0If (0<=Δ< 2)
BlackDetectCount[Target]++
(max value =8)
Else
BlackDetectCount[Target] := 1
WhiteDetectCount[Target] := 0
EndIf
PrevColStartPixel[Target] :=
S2StartPixel
ColumnDetected[Target] := TRUE
BitDetected = 1
BlackDetectCount[target] >= 8PrevColStartPixel[Target] :=
S2StartPixel
WhiteDetectCount[Target] != 0ColumnDetected[Target] := TRUE
BitDetected = 1
TargetDetected[Target] := TRUE
TargetColumn[Target] :=
CurrentColumn − 8 −
(WhiteDetectCount[Target]/2)

Case 2:

No special processing is recorded except for setting the PrevCaseWasCase2′ flag for identifying Case 3 (see Step 3 of processing a column described above) Case 3:

PrevCaseWasCase2 = TRUEIf (WhiteDetectCount[Target] < 2)
BlackDetectCount[Target] >= 8TargetRow[Target] =
WhiteDetectCount=1S2StartPixel + (S2RunLength/2)
EndIf
Δ := ABS(S2StartPixel −
PrevColStartPixel[Target])
If (0<=Δ< 2)
WhiteDetectCount[Target]++
Else
WhiteDetectCount[Target] := 1
EndIf
PrevColStartPixel[Target] :=
S2StartPixel
ThisColumnDetected := TRUE
BitDetected = 0

At the end of processing a given column, a comparison is made of the current column to the maximum number of columns for target detection. If the number of columns allowed has been exceeded, then it is necessary to check how many targets have been found. If fewer than 8 have been found, the card is considered invalid.

Process Targets

After the targets have been detected, they should be processed. All the targets may be available or merely some of them. Some targets may also have been erroneously detected.

This phase of processing is to determine a mathematical line that passes through the center of as many targets as possible. The more targets that the line passes through, the more confident the target position has been found. The limit is set to be 8 targets. If a line passes through at least 8 targets, then it is taken to be the right one.

It is all right to take a brute-force but straightforward approach since there is the time to do so (see below), and lowering complexity makes testing easier. It is necessary to determine the line between targets 0 and 1 (if both targets are considered valid) and then determine how many targets fall on this line. Then we determine the line between targets 0 and 2, and repeat the process. Eventually we do the same for the line between targets 1 and 2, 1 and 3 etc. and finally for the line between targets 14 and 15. Assuming all the targets have been found, we need to perform 15+14+13+ . . . =90 sets of calculations (with each set of calculations requiring 16 tests=1440 actual calculations), and choose the line which has the maximum number of targets found along the line. The algorithm for target location can be as follows:

TargetA := 0
MaxFound := 0
BestLine := 0
While (TargetA < 15)
If (TargetA is Valid)
TargetB:= TargetA + 1
While (TargetB<= 15)
If (TargetB is valid)
CurrentLine := line between TargetA and TargetB
TargetC := 0;
While (TargetC <= 15)
If (TargetC valid AND TargetC on line AB)
TargetsHit++
EndIf
If (TargetsHit > MaxFound)
MaxFound := TargetsHit
BestLine := CurrentLine
EndIf
TargetC++
EndWhile
EndIf
TargetB ++
EndWhile
EndIf
TargetA++
EndWhile
If (MaxFound < 8)
Card is Invalid
Else
Store expected centroids for rows based on BestLine
EndIf

As illustrated in FIG. 34, in the algorithm above, to determine a CurrentLine 260 from Target A 261 and target B, it is necessary to calculate Δrow (264) &Δcolumn (263) between targets 261, 262, and the location of Target A. It is then possible to move from Target 0 to Target 1 etc. by adding Δrow and Δcolumn. The found (if actually found) location of target N can be compared to the calculated expected position of Target N on the line, and if it falls within the tolerance, then Target N is determined to be on the line.

To calculate Δrow & Δcolumn:
Δrow=(rowTargetA−rowTargetB)/(B−A)
Δcolumn=(columnTargetA−columnTargetB)/(B−A)

Then we calculate the position of Target0
row=rowTargetA−(A*Δrow)
column=columnTargetA−(A*Δcolumn)

And compare (row, column) against the actual rowTarget0 and columnTarget0. To move from one expected target to the next (e.g. from Target0 to Target1), we simply add Δrow and Δcolumn to row and column respectively. To check if each target is on the line, we must calculate the expected position of Target0 and then perform one add and one comparison for each target ordinate.

At the end of comparing all 16 targets against a maximum of 90 lines, the result is the best line through the valid targets. If that line passes through at least 8 targets (i.e. MaxFound>=8), it can be said that enough targets have been found to form a line, and thus the card can be processed. If the best line passes through fewer than 8, then the card is considered invalid.

The resulting algorithm takes 180 divides to calculate Δrow and Δcolumn, 180 multiply/adds to calculate target0 position, and then 2880 adds/comparisons. The time we have to perform this processing is the time taken to read 36 columns of pixel data=3,374,892 ns. Not even accounting for the fact that an add takes less time than a divide, it is necessary to perform 3240 mathematical operations in 3,374,892 ns. That gives approximately 1040 ns per operation, or 104 cycles. The CPU can therefore safely perform the entire processing of targets, reducing complexity of design.

Update Centroids Based on Data Edge Border and Clockmarks

Step 0: Locate the Data Area

From Target 0 (241 of FIG. 38) it is a predetermined fixed distance in rows and columns to the top left border 244 of the data area, and then a further 1 dot column to the vertical clock marks 276. So we use TargetA, Δrow and Δcolumn found in the previous stage (Δrow and Δcolumn refer to distances between targets) to calculate the centroid or expected location for Target0 as described previously.

Since the fixed pixel offset from Target0 to the data area is related to the distance between targets (192 dots between targets, and 24 dots between Target0 and the data area 243), simply add Δrow/8 to Target0's centroid column coordinate (aspect ratio of dots is 1:1). Thus the top co-ordinate can be defined as:
(columnDotColumnTop=columnTarget0+(Δrow/8)
(rowDotColumnTop=rowTarget0+(Δcolumn/8)

Next Δrow and Δcolumn are updated to give the number of pixels between dots in a single column (instead of between targets) by dividing them by the number of dots between targets:
Δrow=Δrow/192
Δcolumn=Δcolumn/192

We also set the currentColumn register (see Phase 2) to be −1 so that after step 2, when phase 2 begins, the currentColumn register will increment from −1 to 0.

Step 1: Write Out the Initial Centroid Deltas (Δ) and Bit History

This simply involves writing setup information required for Phase 2.

This can be achieved by writing 0s to all the Δrow and Δcolumn entries for each row, and a bit history. The bit history is actually an expected bit history since it is known that to the left of the clock mark column 276 is a border column 277, and before that, a white area. The bit history therefore is 011, 010, 011, 010 etc.

Step 2: Update the Centroids Based on Actual Pixels Read.

The bit history is set up in Step 1 according to the expected clock marks and data border. The actual centroids for each dot row can now be more accurately set (they were initially 0) by comparing the expected data against the actual pixel values. The centroid updating mechanism is achieved by simply performing step 3 of Phase 2.

Phase 2—Detect Bit Pattern from Artcard Based on Pixels Read, and Write as Bytes.

Since a dot from the Artcard 9 requires a minimum of 9 sensed pixels over 3 columns to be represented, there is little point in performing dot detection calculations every sensed pixel column. It is better to average the time required for processing over the average dot occurrence, and thus make the most of the available processing time. This allows processing of a column of dots from an Artcard 9 in the time it takes to read 3 columns of data from the Artcard. Although the most likely case is that it takes 4 columns to represent a dot, the 4th column will be the last column of one dot and the first column of a next dot. Processing should therefore be limited to only 3 columns.

As the pixels from the CCD are written to the DRAM in 13% of the time available, 83% of the time is available for processing of 1 column of dots i.e. 83% of (93,747*3)=83% of 281,241 ns=233,430 ns.

In the available time, it is necessary to detect 3150 dots, and write their bit values into the raw data area of memory. The processing therefore requires the following steps:

For each column of dots on the Artcard:

Step 0: Advance to the next dot column

Step 1: Detect the top and bottom of an Artcard dot column (check clock marks)

Step 2: Process the dot column, detecting bits and storing them appropriately

Step 3: Update the centroids

Since we are processing the Artcard's logical dot columns, and these may shift over 165 pixels, the worst case is that we cannot process the first column until at least 165 columns have been read into DRAM. Phase 2 would therefore finish the same amount of time after the read process had terminated. The worst case time is: 165*93,747 ns=15,468,255 ns or 0.015 seconds.

Step 0: Advance to the Next Dot Column

In order to advance to the next column of dots we add Δrow and Δcolumn to the dotColumnTop to give us the centroid of the dot at the top of the column. The first time we do this, we are currently at the clock marks column 276 to the left of the bit image data area, and so we advance to the first column of data. Since Δrow and Δcolumn refer to distance between dots within a column, to move between dot columns it is necessary to add Δrow to columndotColumnTop and Δcolumn to rowdotColumnTop.

To keep track of what column number is being processed, the column number is recorded in a register called CurrentColumn. Every time the sensor advances to the next dot column it is necessary to increment the CurrentColumn register. The first time it is incremented, it is incremented from −1 to 0 (see Step 0 Phase 1). The CurrentColumn register determines when to terminate the read process (when reaching maxColumns), and also is used to advance the DataOut Pointer to the next column of byte information once all 8 bits have been written to the byte (once every 8 dot columns). The lower 3 bits determine what bit we're up to within the current byte. It will be the same bit being written for the whole column.

Step 1: Detect the Top and Bottom of an Artcard Dot Column.

In order to process a dot column from an Artcard, it is necessary to detect the top and bottom of a column. The column should form a straight line between the top and bottom of the column (except for local warping etc.). Initially dotColumnTop points to the clock mark column 276. We simply toggle the expected value, write it out into the bit history, and move on to step 2, whose first task will be to add the Δrow and Δcolumn values to dotColumnTop to arrive at the first data dot of the column.

Step 2: Process an Artcard's Dot Column

Given the centroids of the top and bottom of a column in pixel coordinates the column should form a straight line between them, with possible minor variances due to warping etc.

Assuming the processing is to start at the top of a column (at the top centroid coordinate) and move down to the bottom of the column, subsequent expected dot centroids are given as:
rownext=row+Δrow
columnnext=column+Δcolumn

This gives us the address of the expected centroid for the next dot of the column. However to account for local warping and error we add another Δrow and Δcolumn based on the last time we found the dot in a given row. In this way we can account for small drifts that accumulate into a maximum drift of some percentage from the straight line joining the top of the column to the bottom.

We therefore keep 2 values for each row, but store them in separate tables since the row history is used in step 3 of this phase.

    • Δrow and Δcolumn (2@4 bits each=1 byte)
    • row history (3 bits per row, 2 rows are stored per byte)

For each row we need to read a Δrow and Δcolumn to determine the change to the centroid.

The read process takes 5% of the bandwidth and 2 cache lines:
76*(3150/32)+2*3150=13,824 ns=5% of bandwidth

Once the centroid has been determined, the pixels around the centroid need to be examined to detect the status of the dot and hence the value of the bit. In the worst case a dot covers a 4×4 pixel area. However, thanks to the fact that we are sampling at 3 times the resolution of the dot, the number of pixels required to detect the status of the dot and hence the bit value is much less than this. We only require access to 3 columns of pixel columns at any one time.

In the worst case of pixel drift due to a 1% rotation, centroids will shift 1 column every 57 pixel rows, but since a dot is 3 pixels in diameter, a given column will be valid for 171 pixel rows (3*57). As a byte contains 2 pixels, the number of bytes valid in each buffered read (4 cache lines) will be a worst case of 86 (out of 128 read).

Once the bit has been detected it must be written out to DRAM. We store the bits from 8 columns as a set of contiguous bytes to minimize DRAM delay. Since all the bits from a given dot column will correspond to the next bit position in a data byte, we can read the old value for the byte, shift and OR in the new bit, and write the byte back. The read/shift&OR/write process requires 2 cache lines.

We need to read and write the bit history for the given row as we update it. We only require 3 bits of history per row, allowing the storage of 2 rows of history in a single byte. The read/shift&OR/write process requires 2 cache lines.

The total bandwidth required for the bit detection and storage is summarised in the following table:

Read centroid Δ 5%
Read 3 columns of pixel data19%
Read/Write detected bits into byte buffer10%
Read/Write bit history 5%
TOTAL39%

Detecting a Dot

The process of detecting the value of a dot (and hence the value of a bit) given a centroid is accomplished by examining 3 pixel values and getting the result from a lookup table. The process is fairly simple and is illustrated in FIG. 42. A dot 290 has a radius of about 1.5 pixels. Therefore the pixel 291 that holds the centroid, regardless of the actual position of the centroid within that pixel, should be 100% of the dot's value. If the centroid is exactly in the center of the pixel 291, then the pixels above 292 & below 293 the centroid's pixel, as well as the pixels to the left 294 & right 295 of the centroid's pixel will contain a majority of the dot's value. The further a centroid is away from the exact center of the pixel 295, the more likely that more than the center pixel will have 100% coverage by the dot.

Although FIG. 42 only shows centroids differing to the left and below the center, the same relationship obviously holds for centroids above and to the right of center. In Case 1, the centroid is exactly in the center of the middle pixel 295. The center pixel 295 is completely covered by the dot, and the pixels above, below, left, and right are also well covered by the dot. In Case 2, the centroid is to the left of the center of the middle pixel 291. The center pixel is still completely covered by the dot, and the pixel 294 to the left of the center is now completely covered by the dot. The pixels above 292 and below 293 are still well covered. In Case 3, the centroid is below the center of the middle pixel 291. The center pixel 291 is still completely covered by the dot 291, and the pixel below center is now completely covered by the dot. The pixels left 294 and right 295 of center are still well covered. In Case 4, the centroid is left and below the center of the middle pixel. The center pixel 291 is still completely covered by the dot, and both the pixel to the left of center 294 and the pixel below center 293 are completely covered by the dot.

The algorithm for updating the centroid uses the distance of the centroid from the center of the middle pixel 291 in order to select 3 representative pixels and thus decide the value of the dot:

Pixel 1: the pixel containing the centroid

Pixel 2: the pixel to the left of Pixel 1 if the centroid's X coordinate (column value) is <½, otherwise the pixel to the right of Pixel 1.

Pixel 3: the pixel above pixel 1 if the centroid's Y coordinate (row value) is <½, otherwise the pixel below Pixel 1.

As shown in FIG. 43, the value of each pixel is output to a pre-calculated lookup table 301. The 3 pixels are fed into a 12-bit lookup table, which outputs a single bit indicating the value of the dot—on or off. The lookup table 301 is constructed at chip definition time, and can be compiled into about 500 gates. The lookup table can be a simple threshold table, with the exception that the center pixel (Pixel 1) is weighted more heavily.

Step 3: Update the Centroid Δs for Each Row in the Column

The idea of the Δs processing is to use the previous bit history to generate a ‘perfect’ dot at the expected centroid location for each row in a current column. The actual pixels (from the CCD) are compared with the expected ‘perfect’ pixels. If the two match, then the actual centroid location must be exactly in the expected position, so the centroid Δs must be valid and not need updating. Otherwise a process of changing the centroid Δs needs to occur in order to best fit the expected centroid location to the actual data. The new centroid Δs will be used for processing the dot in the next column.

Updating the centroid Δs is done as a subsequent process from Step 2 for the following reasons:

to reduce complexity in design, so that it can be performed as Step 2 of Phase 1 there is enough bandwidth remaining to allow it to allow reuse of DRAM buffers, and

to ensure that all the data required for centroid updating is available at the start of the process without special pipelining

The centroid Δ are processed as Δcolumn Δrow respectively to reduce complexity.

Although a given dot is 3 pixels in diameter, it is likely to occur in a 4×4 pixel area. However the edge of one dot will as a result be in the same pixel as the edge of the next dot. For this reason, centroid updating requires more than simply the information about a given single dot.

FIG. 44 shows a single dot 310 from the previous column with a given centroid 311. In this example, the dot 310 extend A over 4 pixel columns 312-315 and in fact, part of the previous dot column's dot (coordinate=(Prevcolumn, Current Row)) has entered the current column for the dot on the current row. If the dot in the current row and column was white, we would expect the rightmost pixel column 314 from the previous dot column to be a low value, since there is only the dot information from the previous column's dot (the current column's dot is white). From this we can see that the higher the pixel value is in this pixel column 315, the more the centroid should be to the right Of course, if the dot to the right was also black, we cannot adjust the centroid as we cannot get information sub-pixel. The same can be said for the dots to the left, above and below the dot at dot coordinates (PrevColumn, CurrentRow).

From this we can say that a maximum of 5 pixel columns and rows are required. It is possible to simplify the situation by taking the cases of row and column centroid Δs separately, treating them as the same problem, only rotated 90 degrees.

Taking the horizontal case first, it is necessary to change the column centroid Δs if the expected pixels don't match the detected pixels. From the bit history, the value of the bits found for the Current Row in the current dot column, the previous dot column, and the (previous-1)th dot column are known. The expected centroid location is also known. Using these two pieces of information, it is possible to generate a 20 bit expected bit pattern should the read be ‘perfect’. The 20 bit bit-pattern represents the expected Δ values for each of the 5 pixels across the horizontal dimension. The first nibble would represent the rightmost pixel of the leftmost dot. The next 3 nibbles represent the 3 pixels across the center of the dot 310 from the previous column, and the last nibble would be the leftmost pixel 317 of the rightmost dot (from the current column)

If the expected centroid is in the center of the pixel, we would expect a 20 bit pattern based on the following table:

Bit historyExpected pixels
00000000
0010000D
0100DFD0
0110DFDD
100D0000
101D000D
110DDFD0
111DDFDD

The pixels to the left and right of the center dot are either 0 or D depending on whether the bit was a 0 or 1 respectively. The center three pixels are either 000 or DFD depending on whether the bit was a 0 or 1 respectively. These values are based on the physical area taken by a dot for a given pixel. Depending on the distance of the centroid from the exact center of the pixel, we would expect data shifted slightly, which really only affects the pixels either side of the center pixel. Since there are 16 possibilities, it is possible to divide the distance from the center by 16 and use that amount to shift the expected pixels.

Once the 20 bit 5 pixel expected value has been determined it can be compared against the actual pixels read. This can proceed by subtracting the expected pixels from the actual pixels read on a pixel by pixel basis, and finally adding the differences together to obtain a distance from the expected Δ values.

FIG. 45 illustrates one form of implementation of the above algorithm which includes a look up table 320 which receives the bit history 322 and central fractional component 323 and outputs 324 the corresponding 20 bit number which is subtracted 321 from the central pixel input 326 to produce a pixel difference 327.

This process is carried out for the expected centroid and once for a shift of the centroid left and right by 1 amount in Δcolumn. The centroid with the smallest difference from the actual pixels is considered to be the ‘winner’ and the Δcolumn updated accordingly (which hopefully is ‘no change’). As a result, a Δcolumn cannot change by more than 1 each dot column.

The process is repeated for the vertical pixels, and Δrow is consequentially updated.

There is a large amount of scope here for parallelism. Depending on the rate of the clock chosen for the ACP unit 31 these units can be placed in series (and thus the testing of 3 different A could occur in consecutive clock cycles), or in parallel where all 3 can be tested simultaneously. If the clock rate is fast enough, there is less need for parallelism.

Bandwidth Utilization

It is necessary to read the old Δ of the Δs, and to write them out again. This takes 10% of the bandwidth:
2*(76(3150/32)+2*3150)=27,648 ns=10% of bandwidth

It is necessary to read the bit history for the given row as we update its Δs. Each byte contains 2 row's bit histories, thus taking 2.5% of the bandwidth:
76((3150/2)/32)+2*(3150/2)=4,085 ns=2.5% of bandwidth

In the worst case of pixel drift due to a 1% rotation, centroids will shift 1 column every 57 pixel rows, but since a dot is 3 pixels in diameter, a given pixel column will be valid for 171 pixel rows (3*57). As a byte contains 2 pixels, the number of bytes valid in cached reads will be a worst case of 86 (out of 128 read). The worst case timing for 5 columns is therefore 31% bandwidth.
5*(((9450/(128*2))*320)*128/86)=88,112 ns=31% of bandwidth.

The total bandwidth required for the updating the centroid Δ is summarised in the following table:

Read/Write centroid Δ 10%
Read bit history2.5%
Read 5 columns of pixel data 31%
TOTAL43.5%

Memory Usage for Phase 2:

The 2 MB bit-image DRAM area is read from and written to during Phase 2 processing. The 2 MB pixel-data DRAM area is read.

The 0.5 MB scratch DRAM area is used for storing row data, namely:

Centroid array24 bits (16:8) * 2 * 3150 = 18,900 byes
Bit History array3 bits * 3150 entries (2 per byte) = 1575 bytes

Phase 3—Unscramble and XOR the Raw Data

Returning to FIG. 37, the next step in decoding is to unscramble and XOR the raw data. The 2 MB byte image, as taken from the Artcard, is in a scrambled XORed form. It must be unscrambled and re-XORed to retrieve the bit image necessary for the Reed Solomon decoder in phase 4. Turning to FIG. 46, the unscrambling process 330 takes a 2 MB scrambled byte image 331 and writes an unscrambled 2 MB image 332. The process cannot reasonably be performed in-place, so 2 sets of 2 MB areas are utilised. The scrambled data 331 is in symbol block order arranged in a 16×16 array, with symbol block 0 (334) having all the symbol 0's from all the code words in random order. Symbol block 1 has all the symbol 1's from all the code words in random order etc. Since there are only 255 symbols, the 256th symbol block is currently unused.

A linear feedback shift register is used to determine the relationship between the position within a symbol block eg. 334 and what code word eg. 355 it came from. This works as long as the same seed is used when generating the original Artcard images. The XOR of bytes from alternative source lines with 0xAA and 0x55 respectively is effectively free (in time) since the bottleneck of time is waiting for the DRAM to be ready to read/write to non-sequential addresses.

The timing of the unscrambling XOR process is effectively 2 MB of random byte-reads, and 2 MB of random byte-writes i.e. 2*(2 MB*76 ns+2 MB*2 ns)=327,155,712 ns or approximately 0.33 seconds. This timing assumes no caching.

Phase 4—Reed Solomon Decode

This phase is a loop, iterating through copies of the data in the bit image, passing them to the Reed-Solomon decode module until either a successful decode is made or until there are no more copies to attempt decode from.

The Reed-Solomon decoder used can be the VLIW processor, suitably programmed or, alternatively, a separate hardwired core such as LSI Logic's L64712. The L64712 has a throughput of 50 Mbits per second (around 6.25 MB per second), so the time may be bound by the speed of the Reed-Solomon decoder rather than the 2 MB read and 1 MB write memory access time (500 MB/sec for sequential accesses). The time taken in the worst case is thus 2/6.25 s=approximately 0.32 seconds.

Phase 5 Running the Vark Script

The overall time taken to read the Artcard 9 and decode it is therefore approximately 2.15 seconds. The apparent delay to the user is actually only 0.65 seconds (the total of Phases 3 and 4), since the Artcard stops moving after 1.5 seconds.

Once the Artcard is loaded, the Artvark script must be interpreted, Rather than run the script immediately, the script is only run upon the pressing of the ‘Print’ button 13 (FIG. 1). The taken to run the script will vary depending on the complexity of the script, and must be taken into account for the perceived delay between pressing the print button and the actual print button and the actual printing.

Alternative Artcard Format

Of course, other artcard formats are possible. There will now be described one such alternative artcard format with a number of preferable feature. Described hereinafter will be the alternative Artcard data format, a mechanism for mapping user data onto dots on an alternative Artcard, and a fast alternative Artcard reading algorithm for use in embedded systems where resources are scarce.

Alternative Artcard Overview

The Alternative Artcards can be used in both embedded and PC type applications, providing a user-friendly interface to large amounts of data or configuration information.

While the back side of an alternative Artcard has the same visual appearance regardless of the application (since it stores the data), the front of an alternative Artcard can be application dependent. It must make sense to the user in the context of the application.

Alternative Artcard technology can also be independent of the printing resolution. The notion of storing data as dots on a card simply means that if it is possible put more dots in the same space (by increasing resolution), then those dots can represent more data. The preferred embodiment assumes utilisation of 1600 dpi printing on a 86 mm×55 mm card as the sample Artcard, but it is simple to determine alternative equivalent layouts and data sizes for other card sizes and/or other print resolutions. Regardless of the print resolution, the reading technique remain the same. After all decoding and other overhead has been taken into account, alternative Artcards are capable of storing up to 1 Megabyte of data at print resolutions up to 1600 dpi. Alternative Artcards can store megabytes of data at print resolutions greater than 1600 dpi. The following two tables summarize the effective alternative Artcard data storage capacity for certain print resolutions:

Format of an Alternative Artcard

The structure of data on the alternative Artcard is therefore specifically designed to aid the recovery of data. This section describes the format of the data (back) side of an alternative Artcard.

Dots

The dots on the data side of an alternative Artcard can be monochrome. For example, black dots printed on a white background at a predetermined desired print resolution. Consequently a “black dot” is physically different from a “white dot”. FIG. 47 illustrates various examples of magnified views of black and white dots. The monochromatic scheme of black dots on a white background is preferably chosen to maximize dynamic range in blurry reading environments. Although the black dots are printed at a particular pitch (eg. 1600 dpi), the dots themselves are slightly larger in order to create continuous lines when dots are printed contiguously. In the example images of FIG. 47, the dots are not as merged as they may be in reality as a result of bleeding. There would be more smoothing out of the black indentations. Although the alternative Artcard system described in the preferred embodiment allows for flexibly different dot sizes, exact dot sizes and ink/printing behaviour for a particular printing technology should be studied in more detail in order to obtain best results.

In describing this artcard embodiment, the term dot refers to a physical printed dot (ink, thermal, electro-photographic, silver-halide etc) on an alternative Artcard. When an alternative Artcard reader scans an alternative Artcard, the dots must be sampled at least double the printed resolution to satisfy Nyquist's Theorem. The term pixel refers to a sample value from an alternative Artcard reader device. For example, when 1600 dpi dots are scanned at 4800 dpi there are 3 pixels in each dimension of a dot, or 9 pixels per dot. The sampling process will be further explained hereinafter.

Turning to FIG. 48, there is shown the data surface 1101 a sample of alternative Artcard. Each alternative Artcard consists of an “active” region 1102 surrounded by a white border region 1103. The white border 1103 contains no data information, but can be used by an alternative Artcard reader to calibrate white levels. The active region is an array of data blocks eg. 1104, with each data block separated from the next by a gap of 8 white dots eg. 1106. Depending on the print resolution, the number of data blocks on an alternative Artcard will vary. On a 1600 dpi alternative Artcard, the array can be 8×8. Each data block 1104 has dimensions of 627×394 dots. With an inter-block gap 1106 of 8 white dots, the active area of an alternative Artcard is therefore 5072×3208 dots (8.1 mm×5.1 mm at 1600 dpi).

Data Blocks

Turning now to FIG. 49, there is shown a single data block 1107. The active region of an alternative Artcard consists of an array of identically structured data blocks 1107. Each of the data blocks has the following structure: a data region 1108 surrounded by clock-marks 1109, borders 1110, and targets 1111. The data region holds the encoded data proper, while the clock-marks, borders and targets are present specifically to help locate the data region and ensure accurate recovery of data from within the region.

Each data block 1107 has dimensions of 627×394 dots. Of this, the central area of 595×384 dots is the data region 1108. The surrounding dots are used to hold the clock-marks, borders, and targets.

Borders and Clockmarks

FIG. 50 illustrates a data block with FIG. 51 and FIG. 52 illustrating magnified edge portions thereof. As illustrated in FIG. 51 and FIG. 52, there are two 5 dot high border and clockmark regions 1170, 1177 in each data block: one above and one below the data region. For example, The top 5 dot high region consists of an outer black dot border line 1112 (which stretches the length of the data block), a white dot separator line 1113 (to ensure the border line is independent), and a 3 dot high set of clock marks 1114. The clock marks alternate between a white and black row, starting with a black clock mark at the 8th column from either end of the data block. There is no separation between clockmark dots and dots in the data region.

The clock marks are symmetric in that if the alternative Artcard is inserted rotated 180 degrees, the same relative border/clockmark regions will be encountered. The border 1112, 1113 is intended for use by an alternative Artcard reader to keep vertical tracking as data is read from the data region. The clockmarks 1114 are intended to keep horizontal tracking as data is read from the data region. The separation between the border and clockmarks by a white line of dots is desirable as a result of blurring occurring during reading. The border thus becomes a black line with white on either side, making for a good frequency response on reading. The clockmarks alternating between white and black have a similar result, except in the horizontal rather than the vertical dimension. Any alternative Artcard reader must locate the clockmarks and border if it intends to use them for tracking. The next section deals with targets, which are designed to point the way to the clockmarks, border and data.

Targets in the Target Region

As shown in FIG. 54, there are two 15-dot wide target regions 1116, 1117 in each data block: one to the left and one to the right of the data region. The target regions are separated from the data region by a single column of dots used for orientation. The purpose of the Target Regions 1116, 1117 is to point the way to the clockmarks, border and data regions. Each Target Region contains 6 targets eg. 1118 that are designed to be easy to find by an alternative Artcard reader. Turning now to FIG. 53 there is shown the structure of a single target 1120. Each target 1120 is a 15×15 dot black square with a center structure 1121 and a run-length encoded target number 1122. The center structure 1121 is a simple white cross, and the target number component 1122 is simply two columns of white dots, each being 2 dots long for each part of the target number. Thus target number 1's target id 1122 is 2 dots long, target number 2's target id 1122 is 4 dots wide etc.

As shown in FIG. 54, the targets are arranged so that they are rotation invariant with regards to card insertion. This means that the left targets and right targets are the same, except rotated 180 degrees. In the left Target Region 1116, the targets are arranged such that targets 1 to 6 are located top to bottom respectively. In the right Target Region, the targets are arranged so that target numbers 1 to 6 are located bottom to top. The target number id is always in the half closest to the data region. The magnified view portions of FIG. 54 reveals clearly the how the right targets are simply the same as the left targets, except rotated 180 degrees.

As shown in FIG. 55, the targets 1124, 1125 are specifically placed within the Target Region with centers 55 dots apart. In addition, there is a distance of 55 dots from the center of target 1 (1124) to the first clockmark dot 1126 in the upper clockmark region, and a distance of 55 dots from the center of the target to the first clockmark dot in the lower clockmark region (not shown). The first black clockmark in both regions begins directly in line with the target center (the 8th dot position is the center of the 15 dot-wide target).

The simplified schematic illustrations of FIG. 55 illustrates the distances between target centers as well as the distance from Target 1 (1124) to the first dot of the first black clockmark (1126) in the upper border/clockmark region. Since there is a distance of 55 dots to the clockmarks from both the upper and lower targets, and both sides of the alternative Artcard are symmetrical (rotated through 180 degrees), the card can be read left-to-right or right-to-left. Regardless of reading direction, the orientation does need to be determined in order to extract the data from the data region.

Orientation Columns

As illustrated in FIG. 56, there are two 1 dot wide Orientation Columns 1127, 1128 in each data block: one directly to the left and one directly to the right of the data region. The Orientation Columns are present to give orientation information to an alternative Artcard reader: On the left side of the data region (to the right of the Left Targets) is a single column of white dots 1127. On the right side of the data region (to the left of the Right Targets) is a single column of black dots 1128. Since the targets are rotation invariant, these two columns of dots allow an alternative Artcard reader to determine the orientation of the alternative Artcard—has the card been inserted the right way, or back to front.

From the alternative Artcard reader's point of view, assuming no degradation to the dots, there are two possibilities:

    • If the column of dots to the left of the data region is white, and the column to the right of the data region is black, then the reader will know that the card has been inserted the same way as it was written.
    • If the column of dots to the left of the data region is black, and the column to the right of the data region is white, then the reader will know that the card has been inserted backwards, and the data region is appropriately rotated. The reader must take appropriate action to correctly recover the information from the alternative Artcard.
      Data Region

As shown in FIG. 57, the data region of a data block consists of 595 columns of 384 dots each, for a total of 228,480 dots. These dots must be interpreted and decoded to yield the original data. Each dot represents a single bit, so the 228,480 dots represent 228,480 bits, or 28,560 bytes. The interpretation of each dot can be as follows:

Black1
White0

The actual interpretation of the bits derived from the dots, however, requires understanding of the mapping from the original data to the dots in the data regions of the alternative Artcard.

Mapping Original Data to Data Region Dots

There will now be described the process of taking an original data file of maximum size 910,082 bytes and mapping it to the dots in the data regions of the 64 data blocks on a 1600 dpi alternative Artcard. An alternative Artcard reader would reverse the process in order to extract the original data from the dots on an alternative Artcard. At first glance it seems trivial to map data onto dots: binary data is comprised of 1s and 0s, so it would be possible to simply write black and white dots onto the card. This scheme however, does not allow for the fact that ink can fade, parts of a card may be damaged with dirt, grime, or even scratches. Without error-detection encoding, there is no way to detect if the data retrieved from the card is correct. And without redundancy encoding, there is no way to correct the detected errors. The aim of the mapping process then, is to make the data recovery highly robust, and also give the alternative Artcard reader the ability to know it read the data correctly.

There are three basic steps involved in mapping an original data file to data region dots:

    • Redundancy encode the original data
    • Shuffle the encoded data in a deterministic way to reduce the effect of localized alternative Artcard damage
    • Write out the shuffled, encoded data as dots to the data blocks on the alternative Artcard

Each of these steps is examined in detail in the following sections.

Redundancy Encode Using Reed-Solomon Encoding

The mapping of data to alternative Artcard dots relies heavily on the method of redundancy encoding employed. Reed-Solomon encoding is preferably chosen for its ability to deal with burst errors and effectively detect and correct errors using a minimum of redundancy. Reed Solomon encoding is adequately discussed in the standard texts such as Wicker, S., and Bhargava, V., 1994, Reed-Solomon Codes and their Applications, IEEE Press. Rorabaugh, C, 1996, Error Coding Cookbook, McGraw-Hill. Lyppens, H., 1997, Reed-Solomon Error Correction, Dr. Dobb's Journal, January 1997 (Volume 22, Issue 1).

A variety of different parameters for Reed-Solomon encoding can be used, including different symbol sizes and different levels of redundancy. Preferably, the following encoding parameters are used:

    • m=8
    • t=64

Having m=8 means that the symbol size is 8 bits (1 byte). It also means that each Reed-Solomon encoded block size n is 255 bytes (28−1 symbols). In order to allow correction of up to t symbols, 2t symbols in the final block size must be taken up with redundancy symbols. Having t=64 means that 64 bytes (symbols) can be corrected per block if they are in error. Each 255 byte block therefore has 128 (2×64) redundancy bytes, and the remaining 127 bytes (k=127) are used to hold original data. Thus:

    • n=255
    • k=127

The practical result is that 127 bytes of original data are encoded to become a 255-byte block of Reed-Solomon encoded data. The encoded 255-byte blocks are stored on the alternative Artcard and later decoded back to the original 127 bytes again by the alternative Artcard reader. The 384 dots in a single column of a data block's data region can hold 48 bytes (384/8). 595 of these columns can hold 28,560 bytes. This amounts to 112 Reed-Solomon blocks (each block having 255 bytes). The 64 data blocks of a complete alternative Artcard can hold a total of 7168 Reed-Solomon blocks (1,827,840 bytes, at 255 bytes per Reed-Solomon block). Two of the 7,168 Reed-Solomon blocks are reserved for control information, but the remaining 7166 are used to store data. Since each Reed-Solomon block holds 127 bytes of actual data, the total amount of data that can be stored on an alternative Artcard is 910,082 bytes (7166×127). If the original data is less than this amount, the data can be encoded to fit an exact number of Reed-Solomon blocks, and then the encoded blocks can be replicated until all 7,166 are used. FIG. 58 illustrates the overall form of encoding utilised.

Each of the 2 Control blocks 1132, 1133 contain the same encoded information required for decoding the remaining 7,166 Reed-Solomon blocks:

The number of Reed-Solomon blocks in a full message (16 bits stored lo/hi), and

The number of data bytes in the last Reed-Solomon block of the message (8 bits)

These two numbers are repeated 32 times (consuming. 96 bytes) with the remaining 31 bytes reserved and set to 0. Each control block is then Reed-Solomon encoded, turning the 127 bytes of control information into 255 bytes of Reed-Solomon encoded data.

The Control Block is stored twice to give greater chance of it surviving. In addition, the repetition of the data within the Control Block has particular significance when using Reed-Solomon encoding. In an uncorrupted Reed-Solomon encoded block, the first 127 bytes of data are exactly the original data, and can be looked at in an attempt to recover the original message if the Control Block fails decoding (more than 64 symbols are corrupted). Thus, if a Control Block fails decoding, it is possible to examine sets of 3 bytes in an effort to determine the most likely values for the 2 decoding parameters. It is not guaranteed to be recoverable, but it has a better chance through redundancy. Say the last 159 bytes of the Control Block are destroyed, and the first 96 bytes are perfectly ok. Looking at the first 96 bytes will show a repeating set of numbers. These numbers can be sensibly used to decode the remainder of the message in the remaining 7,166 Reed-Solomon blocks.

By way of example, assume a data file containing exactly 9,967 bytes of data. The number of Reed-Solomon blocks required is 79. The first 78 Reed-Solomon blocks are completely utilized, consuming 9,906 bytes (78×127). The 79th block has only 61 bytes of data (with the remaining 66 bytes all 0s).

The alternative Artcard would consist of 7,168 Reed-Solomon blocks. The first 2 blocks would be Control Blocks, the next 79 would be the encoded data, the next 79 would be a duplicate of the encoded data, the next 79 would be another duplicate of the encoded data, and so on. After storing the 79 Reed-Solomon blocks 90 times, the remaining 56 Reed-Solomon blocks would be another duplicate of the first 56 blocks from the 79 blocks of encoded data (the final 23 blocks of encoded data would not be stored again as there is not enough room on the alternative Artcard). A hex representation of the 127 bytes in each Control Block data before being Reed-Solomon encoded would be as illustrated in FIG. 59.

Scramble the Encoded Data

Assuming all the encoded blocks have been stored contiguously in memory, a maximum 1,827,840 bytes of data can be stored on the alternative Artcard (2 Control Blocks and 7,166 information blocks, totaling 7,168 Reed-Solomon encoded blocks). Preferably, the data is not directly stored onto the alternative Artcard at this stage however, or all 255 bytes of one Reed-Solomon block will be physically together on the card. Any dirt, grime, or stain that causes physical damage to the card has the potential of damaging more than 64 bytes in a single Reed-Solomon block, which would make that block unrecoverable. If there are no duplicates of that Reed-Solomon block, then the entire alternative Artcard cannot be decoded.

The solution is to take advantage of the fact that there are a large number of bytes on the alternative Artcard, and that the alternative Artcard has a reasonable physical size. The data can therefore be scrambled to ensure that symbols from a single Reed-Solomon block are not in close proximity to one another. Of course pathological cases of card degradation can cause Reed-Solomon blocks to be unrecoverable, but on average, the scrambling of data makes the card much more robust. The scrambling scheme chosen is simple and is illustrated schematically in FIG. 14. All the Byte 0s from each Reed-Solomon block are placed together 1136, then all the Byte is etc. There will therefore be 7,168 byte 0's, then 7,168 Byte 1's etc. Each data block on the alternative Artcard can store 28,560 bytes. Consequently there are approximately 4 bytes from each Reed-Solomon block in each of the 64 data blocks on the alternative Artcard.

Under this scrambling scheme, complete damage to 16 entire data blocks on the alternative Artcard will result in 64 symbol errors per Reed-Solomon block. This means that if there is no other damage to the alternative Artcard, the entire data is completely recoverable, even if there is no data duplication.

Write the Scrambled Encoded Data to the Alternative Artcard

Once the original data has been Reed-Solomon encoded, duplicated, and scrambled, there are 1,827,840 bytes of data to be stored on the alternative Artcard. Each of the 64 data blocks on the alternative Artcard stores 28,560 bytes.

The data is simply written out to the alternative Artcard data blocks so that the first data block contains the first 28,560 bytes of the scrambled data, the second data block contains the next 28,560 bytes etc.

As illustrated in FIG. 61, within a data block, the data is written out column-wise left to right. Thus the left-most column within a data block contains the first 48 bytes of the 28,560 bytes of scrambled data, and the last column contains the last 48 bytes of the 28,560 bytes of scrambled data. Within a column, bytes are written out top to bottom, one bit at a time, starting from bit 7 and finishing with bit 0. If the bit is set (1), a black dot is placed on the alternative Artcard, if the bit is clear (0), no dot is placed, leaving it the white background color of the card.

For example, a set of 1,827,840 bytes of data can be created by scrambling 7,168 Reed-Solomon encoded blocks to be stored onto an alternative Artcard. The first 28,560 bytes of data are written to the first data block. The first 48 bytes of the first 28,560 bytes are written to the first column of the data block, the next 48 bytes to the next column and so on. Suppose the first two bytes of the 28,560 bytes are hex D3 5F. Those first two bytes will be stored in column 0 of the data block. Bit 7 of byte 0 will be stored first, then bit 6 and so on. Then Bit 7 of byte 1 will be stored through to bit 0 of byte 1. Since each “1” is stored as a black dot, and each “0” as a white dot, these two bytes will be represented on the alternative Artcard as the following set of dots:

    • D3 (1101 0011) becomes: black, black, white, black, white, white, black, black
    • 5F (0101 1111) becomes: white, black, white, black, black, black, black, black
      Decoding an Alternative Artcard

This section deals with extracting the original data from an alternative Artcard in an accurate and robust manner. Specifically, it assumes the alternative Artcard format as described in the previous chapter, and describes a method of extracting the original pre-encoded data from the alternative Artcard.

There are a number of general considerations that are part of the assumptions for decoding an alternative Artcard.

User

The purpose of an alternative Artcard is to store data for use in different applications. A user inserts an alternative Artcard into an alternative Artcard reader, and expects the data to be loaded in a “reasonable time”. From the user's perspective, a motor transport moves the alternative Artcard into an alternative Artcard reader. This is not perceived as a problematic delay, since the alternative Artcard is in motion. Any time after the alternative Artcard has stopped is perceived as a delay, and should be minimized in any alternative Artcard reading scheme. Ideally, the entire alternative Artcard would be read while in motion, and thus there would be no perceived delay after the card had stopped moving.

For the purpose of the preferred embodiment, a reasonable time for an alternative Artcard to be physically loaded is defined to be 1.5 seconds. There should be a minimization of time for additional decoding after the alternative Artcard has stopped moving. Since the Active region of an alternative Artcard covers most of the alternative Artcard surface we can limit our timing concerns to that region.

Sampling Dots

The dots on an alternative Artcard must be sampled by a CCD reader or the like at least at double the printed resolution to satisfy Nyquist's Theorem. In practice it is better to sample at a higher rate than this. In the alternative Artcard reader environment, dots are preferably sampled at 3 times their printed resolution in each dimension, requiring 9 pixels to define a single dot. If the resolution of the alternative Artcard dots is 1600 dpi, the alternative Artcard reader's image sensor must scan pixels at 4800 dpi. Of course if a dot is not exactly aligned with the sampling sensor, the worst and most likely case as illustrated in FIG. 62, is that a dot will be sensed over a 4×4 pixel area.

Each sampled pixel is 1 byte (8 bits). The lowest 2 bits of each pixel can contain significant noise. Decoding algorithms must therefore be noise tolerant.

Alignment/Rotation

It is extremely unlikely that a user will insert an alternative Artcard into an alternative Artcard reader perfectly aligned with no rotation. Certain physical constraints at a reader entrance and motor transport grips will help ensure that once inserted, an alternative Artcard will stay at the original angle of insertion relative to the CCD. Preferably this angle of rotation, as illustrated in FIG. 63 is a maximum of 1 degree. There can be some slight aberrations in angle due to jitter and motor rumble during the reading process, but these are assumed to essentially stay within the 1-degree limit.

The physical dimensions of an alternative Artcard are 86 mm×55 mm A 1 degree rotation adds 1.5 mm to the effective height of the card as 86 mm passes under the CCD (86 sin 1°), which will affect the required CCD length.

The effect of a 1 degree rotation on alternative Artcard reading is that a single scanline from the CCD will include a number of different columns of dots from the alternative Artcard. This is illustrated in an exaggerated form in FIG. 63 which shows the drift of dots across the columns of pixels. Although exaggerated in this diagram, the actual drift will be a maximum 1 pixel column shift every 57 pixels.

When an alternative Artcard is not rotated, a single column of dots can be read over 3 pixel scanlines. The more an alternative Artcard is rotated, the greater the local effect. The more dots being read, the longer the rotation effect is applied. As either of these factors increase, the larger the number of pixel scanlines that are needed to be read to yield a given set of dots from a single column on an alternative Artcard. The following table shows how many pixel scanlines are required for a single column of dots in a particular alternative Artcard structure.

RegionHeight0° rotation1° rotation
Active region3208 dots3 pixel columns168 pixel columns
Data block 394 dots3 pixel columns 21 pixel columns

To read an entire alternative Artcard, we need to read 87 mm (86 mm+1 mm due to 1° rotation). At 4800 dpi this implies 16,252 pixel columns.

CCD (or other Linear Image Sensor) Length

The length of the CCD itself must accommodate:

    • the physical height of the alternative Artcard (55 mm),
    • vertical slop on physical alternative Artcard insertion (1 mm)
    • insertion rotation of up to 1 degree (86 sin 1°=1.5 mm)

These factors combine to form a total length of 57.5 mm.

When the alternative Artcard Image sensor CCD in an alternative Artcard reader scans at 4800 dpi, a single scanline is 10,866 pixels. For simplicity, this figure has been rounded up to 11,000 pixels. The Active Region of an alternative Artcard has a height of 3208 dots, which implies 9,624 pixels. A Data Region has a height of 384 dots, which implies 1,152 pixels.

DRAM Size

The amount of memory required for alternative Artcard reading and decoding is ideally minimized. The typical placement of an alternative Artcard reader is an embedded system where memory resources are precious. This is made more problematic by the effects of rotation. As described above, the more an alternative Artcard is rotated, the more scanlines are required to effectively recover original dots.

There is a trade-off between algorithmic complexity, user perceived delays, robustness, and memory usage. One of the simplest reader algorithms would be to simply scan the whole alternative Artcard, and then to process the whole data without real-time constraints. Not only would this require huge reserves of memory, it would take longer than a reader algorithm that occurred concurrently with the alternative Artcard reading process.

The actual amount of memory required for reading and decoding an alternative Artcard is twice the amount of space required to hold the encoded data, together with a small amount of scratch space (1-2 KB). For the 1600 dpi alternative Artcard, this implies a 4 MB memory requirement. The actual usage of the memory is detailed in the following algorithm description.

Transfer Rate

DRAM bandwidth assumptions need to be made for timing considerations and to a certain extent affect algorithmic design, especially since alternative Artcard readers are typically part of an embedded system.

A standard Rambus Direct RDRAM architecture is assumed, as defined in Rambus Inc, October 1997, Direct Rambus Technology Disclosure, with a peak data transfer rate of 1.6 GB/sec. Assuming 75% efficiency (easily achieved), we have an average of 1.2 GB/sec data transfer rate. The average time to access a block of 16 bytes is therefore 12 ns.

Dirty Data

Physically damaged alternative Artcards can be inserted into a reader. Alternative Artcards may be scratched, or be stained with grime or dirt. A alternative Artcard reader can't assume to read everything perfectly. The effect of dirty data is made worse by blurring, as the dirty data affects the surrounding clean dots.

Blurry Environment

There are two ways that blurring is introduced into the alternative Artcard reading environment:

    • Natural blurring due to nature of the CCD's distance from the alternative Artcard.
    • Warping of alternative Artcard

Natural blurring of an alternative Artcard image occurs when there is overlap of sensed data from the CCD. Blurring can be useful, as the overlap ensures there are no high frequencies in the sensed data, and that there is no data missed by the CCD. However if the area covered by a CCD pixel is too large, there will be too much blurring and the sampling required to recover the data will not be met. FIG. 64 is a schematic illustration of the overlapping of sensed data.

Another form of blurring occurs when an alternative Artcard is slightly warped due to heat damage. When the warping is in the vertical dimension, the distance between the alternative Artcard and the CCD will not be constant, and the level of blurring will vary across those areas.

Black and white dots were chosen for alternative Artcards to give the best dynamic range in blurry reading environments. Blurring can cause problems in attempting to determine whether a given dot is black or white.

As the blurring increases, the more a given dot is influenced by the surrounding dots. Consequently the dynamic range for a particular dot decreases. Consider a white dot and a black dot, each surrounded by all possible sets of dots. The 9 dots are blurred, and the center dot sampled. FIG. 65 shows the distribution of resultant center dot values for black and white dots.

The diagram is intended to be a representative blurring. The curve 1140 from 0 to around 180 shows the range of black dots. The curve 1141 from 75 to 250 shows the range of white dots. However the greater the blurring, the more the two curves shift towards the center of the range and therefore the greater the intersection area, which means the more difficult it is to determine whether a given dot is black or white. A pixel value at the center point of intersection is ambiguous—the dot is equally likely to be a black or a white.

As the blurring increases, the likelihood of a read bit error increases. Fortunately, the Reed-Solomon decoding algorithm can cope with these gracefully up to t symbol errors. FIG. 65 is a graph of number predicted number of alternative Artcard Reed-Solomon blocks that cannot be recovered given a particular symbol error rate. Notice how the Reed-Solomon decoding scheme performs well and then substantially degrades. If there is no Reed-Solomon block duplication, then only 1 block needs to be in error for the data to be unrecoverable. Of course, with block duplication the chance of an alternative Artcard decoding increases.

FIG. 66 only illustrates the symbol (byte) errors corresponding to the number of Reed-Solomon blocks in error. There is a trade-off between the amount of blurring that can be coped with, compared to the amount of damage that has been done to a card. Since all error detection and correction is performed by a Reed-Solomon decoder, there is a finite number of errors per Reed-Solomon data block that can be coped with. The more errors introduced through blurring, the fewer the number of errors that can be coped with due to alternative Artcard damage.

Overview of alternative Artcard Decoding

As noted previously, when the user inserts an alternative Artcard into an alternative Artcard reading unit, a motor transport ideally carries the alternative Artcard past a monochrome linear CCD image sensor. The card is sampled in each dimension at three times the printed resolution. Alternative Artcard reading hardware and software compensate for rotation up to 1 degree, jitter and vibration due to the motor transport, and blurring due to variations in alternative Artcard to CCD distance. A digital bit image of the data is extracted from the sampled image by a complex method described here. Reed-Solomon decoding corrects arbitrarily distributed data corruption of up to 25% of the raw data on the alternative Artcard. Approximately 1 MB of corrected data is extracted from a 1600 dpi card.

The steps involved in decoding are so as indicated in FIG. 67.

The decoding process requires the following steps:

    • Scan 1144 the alternative Artcard at three times printed resolution (eg scan 1600 dpi alternative Artcard at 4800 dpi)
    • Extract 1145 the data bitmap from the scanned dots on the card.
    • Reverse 1146 the bitmap if the alternative Artcard was inserted backwards.
    • Unscramble 1147 the encoded data
    • Reed-Solomon 1148 decode the data from the bitmap
      Algorithmic Overview
      Phase 1—Real Time Bit Image Extraction

A simple comparison between the available memory (4 MB) and the memory required to hold all the scanned pixels for a 1600 dpi alternative Artcard (172.5 MB) shows that unless the card is read multiple times (not a realistic option), the extraction of the bitmap from the pixel data must be done on the fly, in real time, while the alternative Artcard is moving past the CCD. Two tasks must be accomplished in this phase:

    • Scan the alternative Artcard at 4800 dpi
    • Extract the data bitmap from the scanned dots on the card

The rotation and unscrambling of the bit image cannot occur until the whole bit image has been extracted. It is therefore necessary to assign a memory region to hold the extracted bit image. The bit image fits easily within 2 MB, leaving 2 MB for use in the extraction process.

Rather than extracting the bit image while looking only at the current scanline of pixels from the CCD, it is possible to allocate a buffer to act as a window onto the alternative Artcard, storing the last N scanlines read. Memory requirements do not allow the entire alternative Artcard to be stored this way (172.5 MB would be required), but allocating 2 MB to store 190 pixel columns (each scanline takes less than 11,000 bytes) makes the bit image extraction process simpler.

The 4 MB memory is therefore used as follows:

    • 2 MB for the extracted bit image
    • ˜2 MB for the scanned pixels
    • 1.5 KB for Phase 1 scratch data (as required by algorithm)

The time taken for Phase 1 is 1.5 seconds, since this is the time taken for the alternative Artcard to travel past the CCD and physically load.

Phase 2—Data Extraction from Bit Image

Once the bit image has been extracted, it must be unscrambled and potentially rotated 180°. It must then be decoded. Phase 2 has no real-time requirements, in that the alternative Artcard has stopped moving, and we are only concerned with the user's perception of elapsed time. Phase 2 therefore involves the remaining tasks of decoding an alternative Artcard:

    • Re-organize the bit image, reversing it if the alternative Artcard was inserted backwards
    • Unscramble the encoded data
    • Reed-Solomon decode the data from the bit image

The input to Phase 2 is the 2 MB bit image buffer. Unscrambling and rotating cannot be performed in situ, so a second 2 MB buffer is required. The 2 MB buffer used to hold scanned pixels in Phase 1 is no longer required and can be used to store the rotated unscrambled data.

The Reed-Solomon decoding task takes the unscrambled bit image and decodes it to 910,082 bytes. The decoding can be performed in situ, or to a specified location elsewhere. The decoding process does not require any additional memory buffers.

The 4 MB memory is therefore used as follows:

    • 2 MB for the extracted bit image (from Phase 1)
    • ˜2 MB for the unscrambled, potentially rotated bit image
    • <1 KB for Phase 2 scratch data (as required by algorithm)

The time taken for Phase 2 is hardware dependent and is bound by the time taken for Reed-Solomon decoding. Using a dedicated core such as LSI Logic's L64712, or an equivalent CPU/DSP combination, it is estimated that Phase 2 would take 0.32 seconds.

Phase 1—Extract Bit Image

This is the real-time phase of the algorithm, and is concerned with extracting the bit image from the alternative Artcard as scanned by the CCD.

As shown in FIG. 68 Phase 1 can be divided into 2 asynchronous process streams. The first of these streams is simply the real-time reader of alternative Artcard pixels from the CCD, writing the pixels to DRAM. The second stream involves looking at the pixels, and extracting the bits. The second process stream is itself divided into 2 processes. The first process is a global process, concerned with locating the start of the alternative Artcard. The second process is the bit image extraction proper.

FIG. 69 illustrates the data flow from a data/process perspective.

Timing

For an entire 1600 dpi alternative Artcard, it is necessary to read a maximum of 16,252 pixel-columns. Given a total time of 1.5 seconds for the whole alternative Artcard, this implies a maximum time of 92,296 ns per pixel column during the course of the various processes.

Process 1—Read Pixels from CCD

The CCD scans the alternative Artcard at 4800 dpi, and generates 11,000 1-byte pixel samples per column. This process simply takes the data from the CCD and writes it to DRAM, completely independently of any other process that is reading the pixel data from DRAM. FIG. 70 illustrates the steps involved.

The pixels are written contiguously to a 2 MB buffer that can hold 190 full columns of pixels. The buffer always holds the 190 columns most recently read. Consequently, any process that wants to read the pixel data (such as Processes 2 and 3) must firstly know where to look for a given column, and secondly, be fast enough to ensure that the data required is actually in the buffer.

Process 1 makes the current scanline number (CurrentScanLine) available to other processes so they can ensure they are not attempting to access pixels from scanlines that have not been read yet.

The time taken to write out a single column of data (11,000 bytes) to DRAM is: 11,000/16*12=8,256 ns

Process 1 therefore uses just under 9% of the available DRAM bandwidth (8256/92296).

Process 2—Detect Start of Alternative Artcard

This process is concerned with locating the Active Area on a scanned alternative Artcard. The input to this stage is the pixel data from DRAM (placed there by Process 1). The output is a set of bounds for the first 8 data blocks on the alternative Artcard, required as input to Process 3. A high level overview of the process can be seen in FIG. 71.

An alternative Artcard can have vertical slop of 1 mm upon insertion. With a rotation of 1 degree there is further vertical slop of 1.5 mm (86 sin 1°). Consequently there is a total vertical slop of 2.5 mm. At 1600 dpi, this equates to a slop of approximately 160 dots. Since a single data block is only 394 dots high, the slop is just under half a data block. To get a better estimate of where the data blocks are located the alternative Artcard itself needs to be detected.

Process 2 therefore consists of two parts:

    • Locate the start of the alternative Artcard, and if found,
    • Calculate the bounds of the first 8 data blocks based on the start of the alternative Artcard.
      Locate the Start of the Alternative Artcard

The scanned pixels outside the alternative Artcard area are black (the surface can be black plastic or some other non-reflective surface). The border of the alternative Artcard area is white. If we process the pixel columns one by one, and filter the pixels to either black or white, the transition point from black to white will mark the start of the alternative Artcard. The highest level process is as follows:

for (Column=0; Column < MAX_COLUMN; Column++)
{
Pixel = ProcessColumn(Column)
if (Pixel)
return (Pixel, Column)// success!
}
return failure// no alternative Artcard found

The ProcessColumn function is simple. Pixels from two areas of the scanned column are passed through a threshold filter to determine if they are black or white. It is possible to then wait for a certain number of white pixels and announce the start of the alternative Artcard once the given number has been detected. The logic of processing a pixel column is shown in the following pseudocode. 0 is returned if the alternative Artcard has not been detected during the column. Otherwise the pixel number of the detected location is returned.

// Try upper region first
count = 0
for (i=0; i<UPPER_REGION_BOUND; i++)
{
if (GetPixel(column, i) < THRESHOLD)
{
count = 0// pixel is black
}
else
{
count++// pixel is white
if (count > WHITE_ALTERNATIVE ARTCARD)
return i
}
}
// Try lower region next. Process pixels in reverse
count = 0
for (i=MAX_PIXEL_BOUND; i>LOWER_REGION_BOUND; i−−)
{
if (GetPixel(column, i) < THRESHOLD)
{
count = 0// pixel is black
}
else
{
count++// pixel is white
if (count > WHITE_ALTERNATIVE ARTCARD)
return i
}
}
//Not in upper bound or in lower bound. Return failure
return 0

Calculate Data Block Bounds

At this stage, the alternative Artcard has been detected. Depending on the rotation of the alternative Artcard, either the top of the alternative Artcard has been detected or the lower part of the alternative Artcard has been detected. The second step of Process 2 determines which was detected and sets the data block bounds for Phase 3 appropriately.

A look at Phase 3 reveals that it works on data block segment bounds: each data block has a StartPixel and an EndPixel to determine where to look for targets in order to locate the data block's data region.

If the pixel value is in the upper half of the card, it is possible to simply use that as the first StartPixel bounds. If the pixel value is in the lower half of the card, it is possible to move back so that the pixel value is the last segment's EndPixel bounds. We step forwards or backwards by the alternative Artcard data size, and thus set up each segment with appropriate bounds. We are now ready to begin extracting data from the alternative Artcard.

// Adjust to become first pixel if is lower pixel
if (pixel > LOWER_REGION_BOUND)
{
pixel −= 6 * 1152
if (pixel < 0)
pixel = 0
}
for (i=0; i<6; i++)
{
endPixel = pixel + 1152
segment[i].MaxPixel = MAX_PIXEL_BOUND
segment[i].SetBounds(pixel, endPixel)
pixel = endPixel
}

The MaxPixel value is defined in Process 3, and the SetBounds function simply sets StartPixel and EndPixel clipping with respect to 0 and MaxPixel.

Process 3—Extract Bit Data from Pixels

This is the heart of the alternative Artcard Reader algorithm. This process is concerned with extracting the bit data from the CCD pixel data. The process essentially creates a bit-image from the pixel data, based on scratch information created by Process 2, and maintained by Process 3. A high level overview of the process can be seen in FIG. 72.

Rather than simply read an alternative Artcard's pixel column and determine what pixels belong to what data block, Process 3 works the other way around. It knows where to look for the pixels of a given data block. It does this by dividing a logical alternative Artcard into 8 segments, each containing 8 data blocks as shown in FIG. 73.

The segments as shown match the logical alternative Artcard. Physically, the alternative Artcard is likely to be rotated by some amount. The segments remain locked to the logical alternative Artcard structure, and hence are rotation-independent. A given segment can have one of two states:

    • LookingForTargets: where the exact data block position for this segment has not yet been determined. Targets are being located by scanning pixel column data in the bounds indicated by the segment bounds. Once the data block has been located via the targets, and bounds set for black & white, the state changes to ExtractingBitImage.
    • ExtractingBitImage: where the data block has been accurately located, and bit data is being extracted one dot column at a time and written to the alternative Artcard bit image. The following of data block clockmarks gives accurate dot recovery regardless of rotation, and thus the segment bounds are ignored. Once the entire data block has been extracted, new segment bounds are calculated for the next data block based on the current position. The state changes to LookingForTargets.

The process is complete when all 64 data blocks have been extracted, 8 from each region.

Each data block consists of 595 columns of data, each with 48 bytes. Preferably, the 2 orientation columns for the data block are each extracted at 48 bytes each, giving a total of 28,656 bytes extracted per data block. For simplicity, it is possible to divide the 2 MB of memory into 64×32 k chunks. The nth data block for a given segment is stored at the location:

StartBuffer+(256k*n)

Data Structure for Segments

Each of the 8 segments has an associated data structure. The data structure defining each segment is stored in the scratch data area. The structure can be as set out in the following table:

DataNameComment
CurrentStateDefines the current state of the segment. Can be one of:
LookingForTargets
ExtractingBitImage
Initial value is LookingForTargets
Used during LookingForTargets:
StartPixelUpper pixel bound of segment. Initially set by Process 2.
EndPixelLower pixel bound of segment. Initially set by Process 2
MaxPixelThe maximum pixel number for any scanline.
It is set to the same value for each segment: 10,866.
CurrentColumnPixel column we're up to while looking for targets.
FinalColumnDefines the last pixel column to look in for targets.
LocatedTargetsPoints to a list of located Targets.
PossibleTargetsPoints to a set of pointers to Target structures that represent
currently investigated pixel shapes that may be targets
AvailableTargetsPoints to a set of pointers to Target structures that are currently unused.
TargetsFoundThe number of Targets found so far in this data block.
PossibleTargetCountThe number of elements in the PossibleTargets list
AvailabletargetCountThe number of elements in the AvailableTargets list
Used during ExtractingBitImage:
BitImageThe start of the Bit Image data area in DRAM where to store the
next data block:
Segment 1 = X, Segment 2 = X + 32k etc
Advances by 256k each time the state changes from
ExtractingBitImageData to Looking ForTargets
CurrentByteOffset within BitImage where to store next extracted byte
CurrentDotColumnHolds current clockmark/dot column number.
Set to −8 when transitioning from state LookingForTarget to
ExtractingBitImage.
UpperClockCoordinate (column/pixel) of current upper
clockmark/border
LowerClockCoordinate (column/pixel) of current lower
clockmark/border
CurrentDotThe center of the current data dot for the current dot column.
Initially set to the center of the first (topmost) dot of
the data column.
DataDeltaWhat to add (column/pixel) to CurrentDot to advance to the
center of the next dot.
BlackMaxPixel value above which a dot is definitely white
WhiteMinPixel value below which a dot is definitely black
MidRangeThe pixel value that has equal likelihood of coming
from black or white. When all smarts have not determined the dot,
this value is used to determine it. Pixels below this value are
black, and above it are white.

High Level of Process 3

Process 3 simply iterates through each of the segments, performing a single line of processing depending on the segment's current state. The pseudocode is straightforward:

blockCount = 0
while (blockCount < 64)
for (i=0; i<8; i++)
{
finishedBlock = segment[i].ProcessState( )
if (finishedBlock)
blockCount++
}

Process 3 must be halted by an external controlling process if it has not terminated after a specified amount of time. This will only be the case if the data cannot be extracted. A simple mechanism is to start a countdown after Process 1 has finished reading the alternative Artcard. If Process 3 has not finished by that time, the data from the alternative Artcard cannot be recovered.

CurrentState=LookingForTargets

Targets are detected by reading columns of pixels, one pixel-column at a time rather than by detecting dots within a given band of pixels (between StartPixel and EndPixel) certain patterns of pixels are detected. The pixel columns are processed one at a time until either all the targets are found, or until a specified number of columns have been processed. At that time the targets can be processed and the data area located via clockmarks. The state is changed to ExtractingBitImage to signify that the data is now to be extracted. If enough valid targets are not located, then the data block is ignored, skipping to a column definitely within the missed data block, and then beginning again the process of looking for the targets in the next data block. This can be seen in the following pseudocode:

finishedBlock = FALSE
if(CurrentColumn < Process1.CurrentScanLine)
{
ProcessPixelColumn( )
CurrentColumn++
}
if ((TargetsFound == 6) ∥ (CurrentColumn > LastColumn))
{
if (TargetsFound >= 2)
ProcessTargets( )
if (TargetsFound >= 2)
{
BuildClockmarkEstimates( )
SetBlackAndWhiteBounds( )
CurrentState = ExtractingBitImage
CurrentDotColumn = −8
}
else
{
// data block cannot be recovered. Look for
// next instead. Must adjust pixel bounds to
// take account of possible 1 degree rotation.
finishedBlock = TRUE
SetBounds(StartPixel−12, EndPixel+12)
BitImage += 256KB
CurrentByte = 0
LastColumn += 1024
TargetsFound = 0
}
}
return finishedBlock

ProcessPixelColumn

Each pixel column is processed within the specified bounds (between StartPixel and EndPixel) to search for certain patterns of pixels which will identify the targets. The structure of a single target (target number 2) is as previously shown in FIG. 54:

From a pixel point of view, a target can be identified by:

    • Left black region, which is a number of pixel columns consisting of large numbers of contiguous black pixels to build up the first part of the target.
    • Target center, which is a white region in the center of further black columns
    • Second black region, which is the 2 black dot columns after the target center
    • Target number, which is a black-surrounded white region that defines the target number by its length
    • Third black region, which is the 2 black columns after the target number

An overview of the required process is as shown in FIG. 74.

Since identification only relies on black or white pixels, the pixels 1150 from each column are passed through a filter 1151 to detect black or white, and then run length encoded 1152. The run-lengths are then passed to a state machine 1153 that has access to the last 3 run lengths and the 4th last color. Based on these values, possible targets pass through each of the identification stages.

The GatherMin&Max process 1155 simply keeps the minimum & maximum pixel values encountered during the processing of the segment. These are used once the targets have been located to set BlackMax, WhiteMin, and MidRange values.

Each segment keeps a set of target structures in its search for targets. While the target structures themselves don't move around in memory, several segment variables point to lists of pointers to these target structures. The three pointer lists are repeated here:

LocatedTargetsPoints to a set of Target structures that represent
located targets.
PossibleTargetsPoints to a set of pointers to Target structures
that represent currently investigated pixel
shapes that may be targets.
AvailableTargetsPoints to a set of pointers to Target structures
that are currently unused.

There are counters associated with each of these list pointers: TargetsFound, PossibleTargetCount, and AvailableTargetCount respectively.

Before the alternative Artcard is loaded, TargetsFound and PossibleTargetCount are set to 0, and AvailableTargetCount is set to 28 (the maximum number of target structures possible to have under investigation since the minimum size of a target border is 40 pixels, and the data area is approximately 1152 pixels). An example of the target pointer layout is as illustrated in FIG. 75.

As potential new targets are found, they are taken from the AvailableTargets list 1157, the target data structure is updated, and the pointer to the structure is added to the PossibleTargets list 1158. When a target is completely verified, it is added to the LocatedTargets list 1159. If a possible target is found not to be a target after all, it is placed back onto the AvailableTargets list 1157. Consequently there are always 28 target pointers in circulation at any time, moving between the lists.

The Target data structure 1160 can have the following form:

DataNameComment
CurrentStateThe current state of the target search
DetectCountCounts how long a target has been in a given state
StartPixelWhere does the target start? All the lines of
pixels in this target should start within a
tolerance of this pixel value.
TargetNumberWhich target number is this (according to
what was read)
ColumnBest estimate of the target's center column ordinate
PixelBest estimate of the target's center pixel ordinate

The ProcessPixelColumn function within the find targets module 1162 (FIG. 74) then, goes through all the run lengths one by one, comparing the runs against existing possible targets (via StartPixel), or creating new possible targets if a potential target is found where none was previously known. In all cases, the comparison is only made if S0.color is white and S1.color is black.

The pseudocode for the ProcessPixelColumn set out hereinafter. When the first target is positively identified, the last column to be checked for targets can be determined as being within a maximum distance from it. For 1° rotation, the maximum distance is 18 pixel columns.

pixel = StartPixel
t = 0
target=PossibleTarget[t]
while ((pixel < EndPixel) && (TargetsFound < 6))
{
if ((S0.Color == white) && (S1.Color == black))
{
do
{
keepTrying = FALSE
if
(
(target != NULL)
&&
(target−>AddToTarget(Column, pixel, S1, S2, S3))
)
{
if (target−>CurrentState == IsATarget)
{
Remove target from PossibleTargets List
Add target to LocatedTargets List
TargetsFound++
if (TargetsFound == 1)
FinalColumn = Column + MAX_TARGET_DELTA}
}
else if (target−>CurrentState == NotATarget)
{
Remove target from PossibleTargets List
Add target to AvailableTargets List
keepTrying = TRUE
}
else
{
t++// advance to next target
}
target = PossibleTarget[t]
}
else
{
tmp = AvailableTargets[0]
if (tmp−>AddToTarget(Column,pixel,S1,S2,S3)
{
Remove tmp from AvailableTargets list
Add tmp to PossibleTargets list
t++// target t has been shifted right
}
}
} while (keepTrying)
}
pixel += S1.RunLength
Advance S0/S1/S2/S3
}

AddToTarget is a function within the find targets module that determines whether it is possible or not to add the specific run to the given target:

    • If the run is within the tolerance of target's starting position, the run is directly related to the current target, and can therefore be applied to it.
    • If the run starts before the target, we assume that the existing target is still ok, but not relevant to the run. The target is therefore left unchanged, and a return value of FALSE tells the caller that the run was not applied. The caller can subsequently check the run to see if it starts a whole new target of its own.
    • If the run starts after the target, we assume the target is no longer a possible target. The state is changed to be NotATarget, and a return value of TRUE is returned.

If the run is to be applied to the target, a specific action is performed based on the current state and set of runs in S1, S2, and S3. The AddToTar