Digital communication system which can be utilized as a security system for apartment houses or the like
United States Patent 3922664
A signal transmitter located in each occupant's apartment of an apartment house, condominium, or the like, is connected to the usual commercial 115 VAC, 60 Hz power line common to all of the apartments including the manager's quarters. A receiver located in the manager's quarters is also connected to the common power line. Each transmitter is designed to superimpose a signal having a predetermined frequency on the 60 Hz frequency of the power line. The signal is initiated when the transmitter is triggered by a commercially available device capable of detecting an invasion of the apartment's security. The length of the signal is predetermined for each apartment to designate the particular apartment which is the source of the signal. The receiver in the manager's quarters is programmed to detect a signal having the predetermined frequency and to provide a corresponding output pulse for every negative-going transition of the 60 Hz line voltage so long as the predetermined signal remains superimposed on the commercial power line. The output of the receiver is connected to commercially available devices which count the pulses and visually display the number of the apartment being threatened. Audible warning devices can also be utilized to alert the manager. The system is also used to monitor and display the reading and operation of numerous other types of installations including service station gas pumps, industrial controls, remote monitoring stations, hospital, motel and school signaling systems.
US Patent References:
Electrical remote-control system
Goodwin - January 1952 - 2580539
Alarm systems
Henriques - June 1968 - 3388389
SIGNALLING AND COMMUNICATION SYSTEM
Wattenburg - August 1969 - 3460121
PROTECTIVE SYSTEM
Buchsbaum - December 1969 - 3482243
SURVEILLANCE SYSTEM
Faber et al. - May 1973 - 3732562
Electrical remote-control system
Goodwin - January 1952 - 2580539
Alarm systems
Henriques - June 1968 - 3388389
SIGNALLING AND COMMUNICATION SYSTEM
Wattenburg - August 1969 - 3460121
PROTECTIVE SYSTEM
Buchsbaum - December 1969 - 3482243
SURVEILLANCE SYSTEM
Faber et al. - May 1973 - 3732562
Application Number:
05/473996
Publication Date:
11/25/1975
Filing Date:
05/28/1974
View Patent Images:
Export Citation:
Primary Class:
Other Classes:
340/541, 340/693.200, 340/825.520, 340/7.500, 340/524, 340/825.710, 340/10.100, 340/538, 340/825.670, 340/825.650
International Classes:
G08B25/06; G08B25/01; G08B1/08; G08B13/00
Field of Search:
340/31A,280,276,216,288,168S,168R,31R,416,220
US Patent References:
Primary Examiner:
Swann III, Glen R.
Attorney, Agent or Firm:
Lothrop & West
Claims:
What is claimed is
1. A digital communication system having at least one transmitting station and at least one receiving station connected by a common power line operating at a given frequency, said transmitting station comprising:
2. A digital communication system as in claim 1 in which there is a plurality of transmitting stations; and in which said predetermined number of negative going transitions of each of said first oscillators differs from the others and is selected so as to distinguish each of said transmitting stations from the others.
3. A digital communication system as in claim 1 in which each of said transmitting and receiving stations includes a standby source of electrical energy; said energy source being capable of maintaining proper voltages and current levels during any loss of common power line voltages, said energy source maintaining operation of said first and second oscillators and maintaining their frequency and synchronization, said transmitting and receiving stations being initially synchronized with respect to the propagation delay time occasioned by the distance separating said stations measured along the common power line.
4. A digital communication system as in claim 1 in which each of said transmitting stations is located in a respective dwelling of a multi-dwelling unit; in which said receiving station is located at a position remote from said transmitter stations; in which each dwelling includes means connected to the respective one of said transmitting stations for detecting the invasion of said dwelling; and a trigger circuit connecting each of said invasion detecting means to the respective one of said transmitting stations to initiate the operation of said transmitting station in the event the respective one of said dwellings in invaded.
1. A digital communication system having at least one transmitting station and at least one receiving station connected by a common power line operating at a given frequency, said transmitting station comprising:
2. A digital communication system as in claim 1 in which there is a plurality of transmitting stations; and in which said predetermined number of negative going transitions of each of said first oscillators differs from the others and is selected so as to distinguish each of said transmitting stations from the others.
3. A digital communication system as in claim 1 in which each of said transmitting and receiving stations includes a standby source of electrical energy; said energy source being capable of maintaining proper voltages and current levels during any loss of common power line voltages, said energy source maintaining operation of said first and second oscillators and maintaining their frequency and synchronization, said transmitting and receiving stations being initially synchronized with respect to the propagation delay time occasioned by the distance separating said stations measured along the common power line.
4. A digital communication system as in claim 1 in which each of said transmitting stations is located in a respective dwelling of a multi-dwelling unit; in which said receiving station is located at a position remote from said transmitter stations; in which each dwelling includes means connected to the respective one of said transmitting stations for detecting the invasion of said dwelling; and a trigger circuit connecting each of said invasion detecting means to the respective one of said transmitting stations to initiate the operation of said transmitting station in the event the respective one of said dwellings in invaded.
Description:
BACKGROUND OF THE INVENTION
Although the patent literature and the market place afford many types of communication equipment capable of monitoring occurrences at different locations and displaying the information at a central location, there remains considerable room for improvement.
STATEMENT OF THE INVENTION
It is therefore an object of the invention to provide a digital communication system exemplified by a security system for apartment houses, and the like, which utilizes the common power line usually found in such multiple living units as the transmission link, and which therefore eliminates the need for other interconnecting wires between the manager's quarters and the other apartments to be monitored.
It is another object of the invention to provide a digital communication system, such as a security system for an apartment house, which can be installed either during, or at any time after construction of the building.
It is still another object of the invention to provide a digital communication system, such as a security system for an apartment house, which is portable and which can therefore be moved in its entirety to another apartment house, if desired; or in which the receiver unit can be moved from one apartment to another, if necessary.
It is yet another object of the invention to provide a digital communication system, a typical embodiment of which is a security system for a multiple dwelling unit, which affords a most advantageous cost to benefit ratio owing to the relatively low acquisition and maintenance costs and the high degree of reliability of the installation.
It is a further object of the invention to provide a digital communication system, such as a security system for an apartment house, in which the receiver is inherently synchronized with the transmitter, as a consequence of which any possibility of an ambiguous count is eliminated.
It is a still further object of the invention to provide a digital communication system which can be advantageously utilized as a security system inasmuch as threats of invasion can be silently monitored, thereby enabling the intruder more readily to be apprehended before becoming aware that the intrusion has been detected.
It is an additional object of the invention to provide a digital communication system, including a security system for apartment houses, and the like, which is compatible with conventional, commercially available detection devices, such as those based upon the use of photoelectric cells, or laser beams, for example, and which is also compatible with conventional, commercially available pulse counting and display devices.
It is another object of the invention to provide a digital communication system which is versatile in that it is capable of being readily adapted for use in numerous different environments.
It is a further object of the invention to provide a generally improved digital communication system.
Other objects, together with the foregoing, are attained in the embodiment described in the following description and illustrated in the accompanying figures.
SHORT DESCRIPTION OF THE DRAWINGS
FIG. 1 is a simplified diagrammatic layout of a digital communication system constructed pursuant to the invention, the system shown herein being especially adapted for use in a multiple dwelling unit to provide security;
FIG. 2 is a schematic diagram of a transmitter of the security system of FIG. 1; and,
FIG. 3 is a schematic diagram of a receiver in the security system.
PREFERRED EMBODIMENT OF THE INVENTION
While the digital communication system of the invention is susceptible of numerous physical embodiments, depending upon the environment and requirements of use, numerous installations constructed in accordance with the herein shown and described security system for apartment houses, or the like, have been made, tested, sold and used, and all have performed in an eminently satisfactory manner. Wide use has also been made of a slightly modified system used to monitor and display the reading and operation of service station gas pumps.
The security system of the invention shown in FIGS. 1 - 3 and which is generally designated by the reference numeral 12, affords numerous advantages when installed in a multiple dwelling complex, such as an apartment house 13, condominium, or the like, consisting of numerous individual dwelling units 14, 15, 16 and 17, in which apartments 15, 16 and 17 are occupied by individual tenants, for example, and apartment 14 provides quarters used by the apartment house manager.
As will be recognized, the customary apartment house includes considerably more than four dwelling units for economic reasons. In order to simplify the disclosure, however, yet clarify the concept, only four such units are shown and described herein. A manager using the system herein could efficiently monitor dozens of tenant's apartments or individually owned condominium units.
Common to all of the apartments in the complex is the customary commercial power line 18 having, in the example shown, two wires 19 and 20 extending from the meter 21 and supplying energy to all of the units by lateral pairs of conductors 22, 23, 24 and 25, leading to units - 17, respectively. The voltage is ordinarily 115 VAC and the frequency 60 Hz. As will be recognized, the respective wire pairs 22 - 25 also service all other energy requirements of the respective apartments 14 - 17. As will also be recognized, many apartment houses provide meters at the input to each apartment. Such an arrangement would not impair the system operation or efficiency and in the interests of simplifying the drawing, FIG. 1 illustrates only one meter.
As stated, all of the apartments are connected to the power line 19 and 20 and it is this interconnection which provides the electrical link between the apartments of the three tenants, 15, 16 and 17, with the manager's quarters 14.
No additional interconnecting wires are necessary. Thus, the present security system can be installed at any time, either during construction of the apartment house, or subsequent thereto, without the necessity of structural modifications or additions to the house.
In each of the tenant's apartments 15 - 17 there is provided a suitable intrusion detecting device 26, 27 and 28, respectively. The manager's quarters 14 can dispense with it, if desired.
There are numerous commercial detection devices of this nature. Some depend upon a single interruption of an electrical current. Such is the principle of a simple photoelectric cell installation schematically displayed in FIG. 1.
Other devices of a more sophisticated nature are also available, exemplary being detectors of the laser beam type wherein beam interruptions must occur in a preset manner, thereby helping to prevent false alarms.
In the event the occupant of apartment 15, for example, wishes to actuate the security system of apartment 15, the device 26 is switched to "on" position. Thereafter, an invasion of the guarded portion of the perimeter, such as the door 29, will be detected by the device 26 which thereupon imposes a signal at the input 31 (see FIG. 2) to a transmitter 32 in the apartment 15.
The other two tenant-occupied apartments, 16 and 17, have similar transmitters 33 and 34 connected to the detecting devices 27 and 28, respectively, as shown in FIG. 1.
All three of the transmitters 32 - 34 are programmed to transmit at a predetermined frequency which is identical for all apartments. This predetermined frequency is superimposed on i.e. applied to, the 60 Hz line voltage frequency of the common power line 18 and is detected by a receiver 36 located in the manager's quarters 14. If desired, additional receivers can be installed in other locations to afford multiple supervision capabilities.
The receiver 36, in turn, is interfaced with a conventional, commercially available counting and display device 37, and frequently with an audible warning device 38.
In the schematic diagram of the transmitter circuit 32, as appears in FIG. 2, power is provided by a +5 volt dc regulated ±5% power supply and by a +18 volt dc unregulated power supply.
The circuit is triggered by a negative going pulse at the input 31. The length of the trigger pulse is not critical except that it should not be shorter than 50 milliseconds and shall reach a negative value of at least one-third of the regulated 5 volt dc power supply.
The trigger pulse can be a dc level shift or a wave shape of any form so long as it meets the foregoing requirements of pulse length and amplitude. This is made possible owing to the provision of a dc blocking capacitor C1 (0.001 uF at 20V) located in the conductor 39 leading from the signal input 31.
The resistor R1 (27 K 1/2 W) holds pin 2 of IC1 to a positive level and allows C1 to discharge after a trigger pulse.
IC1 is a timing circuit (Signetics NE555) connected as a monostable multivibrator whose output at pin 3 will go high during the timing cycle. Said timing cycle is determined by the values of R2 and C2 pursuant to the formula
where R2 is in ohms (R2 being 12K 1/2 W in this instance) and C2 is in Farads (C2 being 1.0 uF at 12V in the present case); and shall be computed to provide a timing cycle of no more than 15 milliseconds and no less than 11 milliseconds. The timing of IC1, in other words, is arranged so that its output will be high for a period which exceeds that of a half cycle of the 60 Hz line voltage but for a period which is less than a full cycle of the 60 Hz line voltage.
The pin 1 of IC1 is connected to a conductor 41 at system ground 42; and pins 4 and 8 of IC1 are connected to the conductor 43 of the +5 volt dc regulated power supply.
As previously indicated, the output of IC1 at pin 3 goes high during the timing cycle, this output being introduced to pins 3 and 4 of IC2 and thereby providing a positive signal when the system is triggered. IC2 (7410) is a triple three-input NAND gate, 1/3 of which is used herein as a synchronizing gate to orient the system timing so that the predetermined frequency to be superimposed on the 60 Hz line voltage will commence during the negative half cycle of the 60 Hz line voltage.
The other input, pin 5, of the NAND gate of IC2 is derived from 1/6 of IC12 (7404), being connected thereto by the conductor 44, and provides a square wave output which is the complement of the 60 Hz line voltage. Pin 5 of IC2 receives a positive signal during the negative half cycle of the 60 Hz line voltage which, when paired with a positive signal at pins 3 and 4 of IC2 causes pin 6 of IC2 to become negative.
pin 6 of IC2 leads to a dc blocking capacitor C3 (0.001 uF at 20V) which provides a negative going pulse to pin 2 of IC3 (Signetics NE555) through conductor 46.
Connected in shunt across the +5 volt dc bus 43 and the conductor 46 is a resistor R3 (27K 1/2 W) which holds pin 2 of IC3 positive and allows C3 to discharge after providing a trigger to pin 2 of IC3.
IC3 is a timing circuit connected as a monostable multivibrator whose output goes high during the timing cycle. The purpose of IC3 is to provide drive to transistors Q1 (2N718) and Q2(2N718) for a predetermined but variable period which is determined by another part of the circuit, as will subsequently be described.
IC3 accomplishes its timing period function in the following manner. R5 (1.0 Meg. 1/2 W) and C4 (50.0 uF at 12V) determine a timing period calculated by the formula t = 1.1 R5 C4, using the same units as heretofore described; and for the purpose of IC3 herein the components shall be selected so as to provide a timing cycle which is in excess of the maximum timing as determined by other parts of the circuit; to be described.
Resistor R4 (5.1K 1/2 W) which is connected to pin 4 of IC3 holds pin 4 high until triggered to a low state by pin 8 of IC2, as will be explained later.
Resistor R4 and pin 4 of IC3 are connected to pin 8 of IC2 by conductor 47; and it is to be noted that the IC2 referred to in connection with R4 and pin 4 of IC3 is the same IC2 previously referred to as having its pin 6 connected to capacitor C3. Merely different pins of the same IC2 are utilized.
When pin 4 of IC3 goes low, the IC3 is reset and the timing cycle is terminated.
Pin 1 of IC3 is connected to system ground 41 and pin 8 is connected to the common + 5 volt dc bus 43.
Line resistor R16 (10K 1/2 W) limits current from the output of pin 3 of IC3 to the transistors Q1 and Q2 previously referred to.
The function of Q1 is to provide a path to system ground 41 for IC4 (Signetics NE555) for a period determined by the high output from pin 3 of IC3 which causes IC4 to be activated during this period only.
Q2, on the other hand, provides a path to system ground 41 for the four pins 2, 3, 6 and 7 of IC6, IC7 and IC8, by means of connecting conductors 48 and 49.
Q1 and Q2 are activated at the same time and for the same period, as determined by the pin 3 of IC3.
Q2 will subsequently again be mentioned in connection with a further explanation of IC6, IC7 and IC8.
IC4 is a timing circuit connected to operate as an astable multivibrator, whose purpose is to determine the frequency to be superimposed on the 60 Hz line voltage. This frequency is determined by R7 (2.5K Potentiometer 1/4 W), R8 (6.8K metal film 1/2 W) and C5 (0.001 uF at 20V) and calculated by the formula ##EQU1##
R7 is adjustable in order to effect final trimming to the precise frequency desired.
C5 is of polycarbonate or polystyrene construction to provide good temperature stability, and R8 is, for the same reason, of metal film construction. It is desirable that R8 and C5 be selected to have equal and opposite temperature coefficients in order to offset each other and maintain the proper frequency in a changing environment where temperature is a factor.
Pins 2 and 6 of IC4 are connected together to provide the desired astable mode of operation; and pins 4 and 8 of IC 4 are connected to the bus 43 affording the +5 volt dc power supply.
Pin 3 of IC4 is the output and provides the drive for transistor Q3 (2N718).
R6 (10K 1/2 W) is the load resistor for IC4 and also provides impedance matching for Q3. Q3 acts as a buffer driver for IC4 and its collector is connected to the +18 volts dc to provide a level change for the output.
R10 (1K 1/2 W) is a current limiting resistor for Q3 and also acts as part of the high pass filter and impedance matching network consisting of C7 (0.1 uF at 500V), R11 (10K 1/2 W), C6 (0.1 uF at 500V) and C8 (0.1 uF at 500V).
The other sides of C6 and C8 are connected directly to the 60 Hz, 115 VAC common power line 18, i.e. the conductors 19 and 20 of power line 18, interconnected with all the apartment house dwelling units including the manager's quarters.
Reference is now had to IC5 (Signetics NE555), a timing circuit connected to operate as an astable multivibrator whose frequency of operation is exactly that of the 60 Hz line voltage and which is exactly synchronized with that same 60 Hz line voltage.
IC5 has as its principle purpose the maintaining of the 60 Hz frequency in case of temporary commercial power failure, provided there is a source of standby power.
IC5 is connected in a manner similar to that of IC4 with the following exceptions: pin 1 is connected directly to system ground 41 for continuous operation; pin 5 of IC5 is connected to C9 (10.0 uF at 12V) and pin 5 of IC5 is the input for synchronizing IC5 with the commercial power line 18. The capacitor C9 serves both as dc blocking and ac coupling. R14 (47K 1/2 W) is comparable to R8, R15 (50K Potentiometer 1/4 W) to R7 and C10 (1.0 uF at 12V) to C5.
Diode D1 (1N4004) is a separate rectifying diode connected to the secondary windings 51 of the power transformer 52 which provides the input for the +18 volt and the +5 volt power supply.
D1 provides a 60 Hz wave form input to R9 (220 ohm 1/2 W) and R13 (680 ohm 1/2 W) which form a voltage divider to provide a voltage output of less than 5 volts to R12.
R12 (47K 1/2 W) is a current limiting resistor and provides interconnection for the 60 Hz wave to C9.
Pin 3 of IC5, the output of IC5, provides a square wave output to pin 14 of IC8 (7490) through a conductor 53 and to an input of 1/6 of the hex inverter IC12. This 1/6 of IC12 is that portion of IC12 which provides the complement of the 60 Hz line voltage previously referred to in connection with pin 5 of IC2, to which IC12 is connected by the conductor 44.
IC6, IC7 and IC8 are decade counting units, all of the standard marking 7490. Each of these counting units provides an output of 0 through 9 in BCD form, as determined by negative going signals received at pin 14 of IC6, IC7 and IC8.
When connected as shown in FIG. 2, the least significant digit will be developed by IC8, the most significant digit will be developed by IC6 and the digit of intermediate significance by IC7.
Pins 2, 3, 6 and 7 of IC's 6, 7 and 8 are the reset pins and the IC's 6, 7 and 8 will not count unless these four pins are held to within 0.8 volt of system ground 41 to which said pins are connected through conductor 49, transistor Q2 and conductor 48, as previously described. This requirement is met by the aid of Q2 when activated during the timing cycle of IC3.
IC's 9, 10 and 11 are BCD to decimal decoding units with the standard designation 7442.
The outputs of IC's 9, 10 and 11 are each connected to the respective inputs of inverters of IC12 in such a manner that the predetermined count will provide a negative signal to each inverter.
Upon receiving the negative signal at the predetermined count, the inverters provide a positive signal to all inputs, i.e. pins 9, 10 and 11 of the NAND gate (see lower left-hand corner of FIG. 2) which is 1/3 of IC2, and which, in turn, provides a negative signal to pin 4 of IC3, via the conductor 47 as previously described, thereby resetting the timing cycle of IC3 and terminating the total sequence of operations.
The purpose of overall transmitter circuit 32 just described is broadly as follows. Upon receiving a triggering signal, the circuit commences, during the negative half cycle of the 60 Hz line voltage, to superimpose a predetermined frequency on the 60 Hz line voltage for a predetermined number of counts of said 60 Hz line voltage and then shut itself off.
The intelligence of the information is determined by (a) the frequency of the signal and (b) the time domain of the signal. The former is identical for all apartments and the latter is a characteristic identifying each particular apartment as the source.
The receiver 36 at the manager's apartment 14 is actuated by detection of the predetermined frequency of the transmitter and the location of the transmitter location is determined by the time domain exercised by the frequency.
Reference is now had to the receiver 36 which marshals the information on a suitable central control and alerts the manager to actual or threatened invasions of the security barriers in the respective apartments.
The receiver circuit 36 is designed to monitor the 60 Hz line voltage of the commercial power line 18 for a specific predetermined frequency superimposed on the 60 Hz line voltage and to synchronize itself with the first negative going signal of the 60 Hz line voltage after detecting the superimposed frequency.
The receiver circuit also determines the extent of the time domain commanded by the superimposed frequency and provides a pulsed output wherein the number of said pulses bears a direct and linear relationship with the time domain of the superimposed frequency, thereby enabling suitable counting and display devices to indicate the location of the originating transmitter.
The receiver circuit 36 is powered by a +5 volt dc and a +9 volt dc regulated ± 5% of power supply, as particularly appears in FIG. 3.
The connection with the 60 Hz 115 VAC commercial power line 18 having the predetermined frequency superimposed thereon is shown in the upper left hand portion of FIG. 3.
Capacitors C1 and C2 (both 0.1 uF at 500V) are connected directly to the 60 Hz line 18 and act as a high pass filter. T1 (interstage coupling transformer, primary 1K, secondary 8 ohm) acts as an impedance matching and isolation unit. One lead 56 of the secondary of T1 extendns to system ground 57 and the other lead 58 of the T1 secondary is connected to C3 (470 p F) which provides dc blocking while R1 (51K 1/2 W), R2 (10K), R3 (3.3K) and R4 (1K) provide bias and impedance matching for the input and output of transistor Q1 (2N718)
Q1 serves as a single stage amplifier for high frequency signals passed by C1, C2, T1 and C3.
C4 (0.1 uF at 12V) is a coupling capacitor between Q1 and the input pin 3 of IC1 (Signetics NE567)
IC1 is a linear IC fabricated to act as a phase locked loop. C9 (2.0 uF at 12V) connected to pin 1 of IC1 acts as an output filter, and C8 (1.0 uF at 12V) connected to pin 2 of IC1 serves as the low pass filter, both C8 and C9 being connected to system ground 57. Pin 4 of IC1 is the connection to the +9V dc bus 59.
Pins 5 and 6 of IC1 are the connections for timing elements to determine the free running frequency of the current controlled oscillator of IC1. This frequency is determined by using the formula: ##EQU2## and, in this instance, with R10 a 12K 1/2 W resistor of the metal film type, to provide good temperature stability, and R11 (2.5K Potentiometer 1/4 W) a variable resistor to provide for final trimming of the free running frequency. Capacitor C5 (0.001 uF at 50V) is preferably of polycarbonate or polystyrene construction, for good temperature stability, and both R10 and C5 should have equal and opposite temperature coefficients so that they will offset each other and maintain the proper frequency in a changing environment where temperature is a factor.
Pin 7 of IC1 is connected to system ground 57.
Pin 8 of IC1 is the output and provides a low output when the input at pin 3 of IC1 is within the detection band of the IC. The detection bandwidth of IC1 is determined primarily by the value of C8 and is calculated by the formula: ##EQU3## where: BW is the detection bandwidth, in % of f out;
V in is the input voltage, in volts;
f out is the free running frequency in Hz of the current controlled oscillator in the absence of an input signal; and
C8 is the capacitance of the low-pass filter in uF.
For minimum lock up time of IC1, the following formulas can be applied to determine the values of C8 and C9: ##EQU4##
In order to maintain a narrow detection bandwidth, fast lock up time and eliminate chatter at the output, D1 (1N914) and R12 (20K) have been added to the circuit to provide a latching action when the input is first detected as being within the acceptable detection bandwidth. When the output pin of IC1 goes low, D1 conducts, and through R12, pin 1 of IC1 is brought low, causing IC1 to latch in that condition.
IC2 (Signetics NE555) is a timing circuit connected to operate as an astable multivibrator whose frequency of operation is exactly that of the 60 Hz line voltage and which is exactly synchronized with said 60 Hz line voltage.
IC2 has a further purpose of maintaining the 60 Hz frequency in case of commercial power line failure, provided there is a source of standby power.
Pin 5 of IC2 is connected to C6 (10.0 uF at 12V) and pin 5 is the input for synchronizing IC2 with the commercial power line 18, C6 serving as dc blocking and ac coupling.
D2 (1N4004) is a separate rectifying diode connected to the secondary 61 of the power transformer 62 which provides the input for the +9 volt and +5 volt regulated power supply. D2 provides a 60 Hz wave form input to R6 (680 ohm) and R5 (220 ohm) which form a voltage divider to provide a voltage output of less than 5 volts to R7. R7 (47K) is a current limiting resistor and provides interconnection for the 60 Hz wave form input to C6.
The 60 Hz frequency of IC2 is determined by R8 (47K), R9 (50K Potentiometer 1/4 watt) and C7 (1.0 uF at 12V) and calculated by the formula: ##EQU5##
R9 is adjustable for final trimming to the precise desired frequency.
Pins 2 and 6 of IC2 are connected to C7 and pin 7 is connected to a conductor extending between R8 and R9.
Pin 1 of IC2 is connected to system ground 57.
Pins 4 and 8 of IC2 are connected to the +5 volt dc line 64.
Pin 3 of IC2 is the output and provides a square wave for the input pin 14 of IC3.
IC3 is a divide by 12 circuit with the standard designation 7492; however, in the present circuit its function is to operate as a toggle switch which can be strobed for operation in a precise manner.
When pin 8 of IC1 is high, IC3 is reset through pins 6 and 7 of IC3 and all outputs of IC3 go low. In this mode, the outputs of IC3 remain low and it will not count.
On the other hand, when pin 8 of IC1 goes low, the low input on pins 6 and 7 of IC3 allows IC3 to count any negative going transition received on pin 14 of IC3.
At the first negative transition on pin 14 of IC3, pin 12 goes high. This high output on pin 12 of IC3 causes transistor Q2 (2N718) to turn on through current limiting resistor R13 (1K) in conductor 66 connecting pin 12 and Q2.
As Q2 turns on, the base junction of transistor Q3 (2N5375) is driven low through R14 (10K), which causes Q3 to turn on and apply positive voltage to pin 1 of IC1, which forces IC1 to unlatch.
As IC1 turns off, pin 8 of IC1 goes high and forces IC3 to reset, with pin 12 of IC3 going low.
Therefore, as long as there is a signal within the detection bandwidth of pin 3 of IC1, then, for every negative going transition at pin 14 of IC3, pin 12 of IC3 will provide a full square wave.
R14 (10K) and R15 (1K) are current limiting resistors for Q2 and Q3 whereas C10 (5.0 uF at 12V) insures that Q3 will remain "on" long enough properly to unlatch IC1.
The output 67 of pin 12 of IC3 can be utilized or counted in any convenient manner, as by any commercially available device 37 whose input is compatible with the 7400 series of transistor-transistor logic. Visual notation of the apartment number is provided and in order that the manager need not maintain a constant visual scan of the read-out panel, a suitable audible warning is provided by the conventional audible alerting device 38 indicated schematically in FIG. 1.
While the foregoing security system represents one important adaptation of the digital communication system of the invention, it will be recognized that by suitably varying the components the system can be applied to numerous other situations. Inclusive of these are service station installations in which gas pumps are monitored. In this environment the system is modified so as to send out one count at a time, for example, each time 1 cent or 0.10 gallon registers on the pump.
Other situations include industrial controls where the number and/or frequency indicates a condition, stop-start signals or stop until a predetermined signal is received from a predetermined point; remote monitoring stations, e.g. water level or temperature; hospital motel and school signaling systems, e.g. patient service or teacher safety.
In all cases the digital communication system shown, described and claimed herein is of unique value owing to its accuracy; in other words, the transmitter initiates the superimposed signal on the 60 Hz line voltage during the negative half-cycle and the superimposed signal along with the 60 Hz line voltage propagate at the same rate so the receiver always detects and counts the same negative-going transition of the 60 Hz line voltage as the transmitter, therefore removing any possibility of an ambiguous count. In summary, the inherent synchronization built into the two units, transmitter and receiver, with respect to the transmitted signal eliminates any possibility of receiving inaccurate information.
Although the patent literature and the market place afford many types of communication equipment capable of monitoring occurrences at different locations and displaying the information at a central location, there remains considerable room for improvement.
STATEMENT OF THE INVENTION
It is therefore an object of the invention to provide a digital communication system exemplified by a security system for apartment houses, and the like, which utilizes the common power line usually found in such multiple living units as the transmission link, and which therefore eliminates the need for other interconnecting wires between the manager's quarters and the other apartments to be monitored.
It is another object of the invention to provide a digital communication system, such as a security system for an apartment house, which can be installed either during, or at any time after construction of the building.
It is still another object of the invention to provide a digital communication system, such as a security system for an apartment house, which is portable and which can therefore be moved in its entirety to another apartment house, if desired; or in which the receiver unit can be moved from one apartment to another, if necessary.
It is yet another object of the invention to provide a digital communication system, a typical embodiment of which is a security system for a multiple dwelling unit, which affords a most advantageous cost to benefit ratio owing to the relatively low acquisition and maintenance costs and the high degree of reliability of the installation.
It is a further object of the invention to provide a digital communication system, such as a security system for an apartment house, in which the receiver is inherently synchronized with the transmitter, as a consequence of which any possibility of an ambiguous count is eliminated.
It is a still further object of the invention to provide a digital communication system which can be advantageously utilized as a security system inasmuch as threats of invasion can be silently monitored, thereby enabling the intruder more readily to be apprehended before becoming aware that the intrusion has been detected.
It is an additional object of the invention to provide a digital communication system, including a security system for apartment houses, and the like, which is compatible with conventional, commercially available detection devices, such as those based upon the use of photoelectric cells, or laser beams, for example, and which is also compatible with conventional, commercially available pulse counting and display devices.
It is another object of the invention to provide a digital communication system which is versatile in that it is capable of being readily adapted for use in numerous different environments.
It is a further object of the invention to provide a generally improved digital communication system.
Other objects, together with the foregoing, are attained in the embodiment described in the following description and illustrated in the accompanying figures.
SHORT DESCRIPTION OF THE DRAWINGS
FIG. 1 is a simplified diagrammatic layout of a digital communication system constructed pursuant to the invention, the system shown herein being especially adapted for use in a multiple dwelling unit to provide security;
FIG. 2 is a schematic diagram of a transmitter of the security system of FIG. 1; and,
FIG. 3 is a schematic diagram of a receiver in the security system.
PREFERRED EMBODIMENT OF THE INVENTION
While the digital communication system of the invention is susceptible of numerous physical embodiments, depending upon the environment and requirements of use, numerous installations constructed in accordance with the herein shown and described security system for apartment houses, or the like, have been made, tested, sold and used, and all have performed in an eminently satisfactory manner. Wide use has also been made of a slightly modified system used to monitor and display the reading and operation of service station gas pumps.
The security system of the invention shown in FIGS. 1 - 3 and which is generally designated by the reference numeral 12, affords numerous advantages when installed in a multiple dwelling complex, such as an apartment house 13, condominium, or the like, consisting of numerous individual dwelling units 14, 15, 16 and 17, in which apartments 15, 16 and 17 are occupied by individual tenants, for example, and apartment 14 provides quarters used by the apartment house manager.
As will be recognized, the customary apartment house includes considerably more than four dwelling units for economic reasons. In order to simplify the disclosure, however, yet clarify the concept, only four such units are shown and described herein. A manager using the system herein could efficiently monitor dozens of tenant's apartments or individually owned condominium units.
Common to all of the apartments in the complex is the customary commercial power line 18 having, in the example shown, two wires 19 and 20 extending from the meter 21 and supplying energy to all of the units by lateral pairs of conductors 22, 23, 24 and 25, leading to units - 17, respectively. The voltage is ordinarily 115 VAC and the frequency 60 Hz. As will be recognized, the respective wire pairs 22 - 25 also service all other energy requirements of the respective apartments 14 - 17. As will also be recognized, many apartment houses provide meters at the input to each apartment. Such an arrangement would not impair the system operation or efficiency and in the interests of simplifying the drawing, FIG. 1 illustrates only one meter.
As stated, all of the apartments are connected to the power line 19 and 20 and it is this interconnection which provides the electrical link between the apartments of the three tenants, 15, 16 and 17, with the manager's quarters 14.
No additional interconnecting wires are necessary. Thus, the present security system can be installed at any time, either during construction of the apartment house, or subsequent thereto, without the necessity of structural modifications or additions to the house.
In each of the tenant's apartments 15 - 17 there is provided a suitable intrusion detecting device 26, 27 and 28, respectively. The manager's quarters 14 can dispense with it, if desired.
There are numerous commercial detection devices of this nature. Some depend upon a single interruption of an electrical current. Such is the principle of a simple photoelectric cell installation schematically displayed in FIG. 1.
Other devices of a more sophisticated nature are also available, exemplary being detectors of the laser beam type wherein beam interruptions must occur in a preset manner, thereby helping to prevent false alarms.
In the event the occupant of apartment 15, for example, wishes to actuate the security system of apartment 15, the device 26 is switched to "on" position. Thereafter, an invasion of the guarded portion of the perimeter, such as the door 29, will be detected by the device 26 which thereupon imposes a signal at the input 31 (see FIG. 2) to a transmitter 32 in the apartment 15.
The other two tenant-occupied apartments, 16 and 17, have similar transmitters 33 and 34 connected to the detecting devices 27 and 28, respectively, as shown in FIG. 1.
All three of the transmitters 32 - 34 are programmed to transmit at a predetermined frequency which is identical for all apartments. This predetermined frequency is superimposed on i.e. applied to, the 60 Hz line voltage frequency of the common power line 18 and is detected by a receiver 36 located in the manager's quarters 14. If desired, additional receivers can be installed in other locations to afford multiple supervision capabilities.
The receiver 36, in turn, is interfaced with a conventional, commercially available counting and display device 37, and frequently with an audible warning device 38.
In the schematic diagram of the transmitter circuit 32, as appears in FIG. 2, power is provided by a +5 volt dc regulated ±5% power supply and by a +18 volt dc unregulated power supply.
The circuit is triggered by a negative going pulse at the input 31. The length of the trigger pulse is not critical except that it should not be shorter than 50 milliseconds and shall reach a negative value of at least one-third of the regulated 5 volt dc power supply.
The trigger pulse can be a dc level shift or a wave shape of any form so long as it meets the foregoing requirements of pulse length and amplitude. This is made possible owing to the provision of a dc blocking capacitor C1 (0.001 uF at 20V) located in the conductor 39 leading from the signal input 31.
The resistor R1 (27 K 1/2 W) holds pin 2 of IC1 to a positive level and allows C1 to discharge after a trigger pulse.
IC1 is a timing circuit (Signetics NE555) connected as a monostable multivibrator whose output at pin 3 will go high during the timing cycle. Said timing cycle is determined by the values of R2 and C2 pursuant to the formula
where R2 is in ohms (R2 being 12K 1/2 W in this instance) and C2 is in Farads (C2 being 1.0 uF at 12V in the present case); and shall be computed to provide a timing cycle of no more than 15 milliseconds and no less than 11 milliseconds. The timing of IC1, in other words, is arranged so that its output will be high for a period which exceeds that of a half cycle of the 60 Hz line voltage but for a period which is less than a full cycle of the 60 Hz line voltage.
The pin 1 of IC1 is connected to a conductor 41 at system ground 42; and pins 4 and 8 of IC1 are connected to the conductor 43 of the +5 volt dc regulated power supply.
As previously indicated, the output of IC1 at pin 3 goes high during the timing cycle, this output being introduced to pins 3 and 4 of IC2 and thereby providing a positive signal when the system is triggered. IC2 (7410) is a triple three-input NAND gate, 1/3 of which is used herein as a synchronizing gate to orient the system timing so that the predetermined frequency to be superimposed on the 60 Hz line voltage will commence during the negative half cycle of the 60 Hz line voltage.
The other input, pin 5, of the NAND gate of IC2 is derived from 1/6 of IC12 (7404), being connected thereto by the conductor 44, and provides a square wave output which is the complement of the 60 Hz line voltage. Pin 5 of IC2 receives a positive signal during the negative half cycle of the 60 Hz line voltage which, when paired with a positive signal at pins 3 and 4 of IC2 causes pin 6 of IC2 to become negative.
pin 6 of IC2 leads to a dc blocking capacitor C3 (0.001 uF at 20V) which provides a negative going pulse to pin 2 of IC3 (Signetics NE555) through conductor 46.
Connected in shunt across the +5 volt dc bus 43 and the conductor 46 is a resistor R3 (27K 1/2 W) which holds pin 2 of IC3 positive and allows C3 to discharge after providing a trigger to pin 2 of IC3.
IC3 is a timing circuit connected as a monostable multivibrator whose output goes high during the timing cycle. The purpose of IC3 is to provide drive to transistors Q1 (2N718) and Q2(2N718) for a predetermined but variable period which is determined by another part of the circuit, as will subsequently be described.
IC3 accomplishes its timing period function in the following manner. R5 (1.0 Meg. 1/2 W) and C4 (50.0 uF at 12V) determine a timing period calculated by the formula t = 1.1 R5 C4, using the same units as heretofore described; and for the purpose of IC3 herein the components shall be selected so as to provide a timing cycle which is in excess of the maximum timing as determined by other parts of the circuit; to be described.
Resistor R4 (5.1K 1/2 W) which is connected to pin 4 of IC3 holds pin 4 high until triggered to a low state by pin 8 of IC2, as will be explained later.
Resistor R4 and pin 4 of IC3 are connected to pin 8 of IC2 by conductor 47; and it is to be noted that the IC2 referred to in connection with R4 and pin 4 of IC3 is the same IC2 previously referred to as having its pin 6 connected to capacitor C3. Merely different pins of the same IC2 are utilized.
When pin 4 of IC3 goes low, the IC3 is reset and the timing cycle is terminated.
Pin 1 of IC3 is connected to system ground 41 and pin 8 is connected to the common + 5 volt dc bus 43.
Line resistor R16 (10K 1/2 W) limits current from the output of pin 3 of IC3 to the transistors Q1 and Q2 previously referred to.
The function of Q1 is to provide a path to system ground 41 for IC4 (Signetics NE555) for a period determined by the high output from pin 3 of IC3 which causes IC4 to be activated during this period only.
Q2, on the other hand, provides a path to system ground 41 for the four pins 2, 3, 6 and 7 of IC6, IC7 and IC8, by means of connecting conductors 48 and 49.
Q1 and Q2 are activated at the same time and for the same period, as determined by the pin 3 of IC3.
Q2 will subsequently again be mentioned in connection with a further explanation of IC6, IC7 and IC8.
IC4 is a timing circuit connected to operate as an astable multivibrator, whose purpose is to determine the frequency to be superimposed on the 60 Hz line voltage. This frequency is determined by R7 (2.5K Potentiometer 1/4 W), R8 (6.8K metal film 1/2 W) and C5 (0.001 uF at 20V) and calculated by the formula ##EQU1##
R7 is adjustable in order to effect final trimming to the precise frequency desired.
C5 is of polycarbonate or polystyrene construction to provide good temperature stability, and R8 is, for the same reason, of metal film construction. It is desirable that R8 and C5 be selected to have equal and opposite temperature coefficients in order to offset each other and maintain the proper frequency in a changing environment where temperature is a factor.
Pins 2 and 6 of IC4 are connected together to provide the desired astable mode of operation; and pins 4 and 8 of IC 4 are connected to the bus 43 affording the +5 volt dc power supply.
Pin 3 of IC4 is the output and provides the drive for transistor Q3 (2N718).
R6 (10K 1/2 W) is the load resistor for IC4 and also provides impedance matching for Q3. Q3 acts as a buffer driver for IC4 and its collector is connected to the +18 volts dc to provide a level change for the output.
R10 (1K 1/2 W) is a current limiting resistor for Q3 and also acts as part of the high pass filter and impedance matching network consisting of C7 (0.1 uF at 500V), R11 (10K 1/2 W), C6 (0.1 uF at 500V) and C8 (0.1 uF at 500V).
The other sides of C6 and C8 are connected directly to the 60 Hz, 115 VAC common power line 18, i.e. the conductors 19 and 20 of power line 18, interconnected with all the apartment house dwelling units including the manager's quarters.
Reference is now had to IC5 (Signetics NE555), a timing circuit connected to operate as an astable multivibrator whose frequency of operation is exactly that of the 60 Hz line voltage and which is exactly synchronized with that same 60 Hz line voltage.
IC5 has as its principle purpose the maintaining of the 60 Hz frequency in case of temporary commercial power failure, provided there is a source of standby power.
IC5 is connected in a manner similar to that of IC4 with the following exceptions: pin 1 is connected directly to system ground 41 for continuous operation; pin 5 of IC5 is connected to C9 (10.0 uF at 12V) and pin 5 of IC5 is the input for synchronizing IC5 with the commercial power line 18. The capacitor C9 serves both as dc blocking and ac coupling. R14 (47K 1/2 W) is comparable to R8, R15 (50K Potentiometer 1/4 W) to R7 and C10 (1.0 uF at 12V) to C5.
Diode D1 (1N4004) is a separate rectifying diode connected to the secondary windings 51 of the power transformer 52 which provides the input for the +18 volt and the +5 volt power supply.
D1 provides a 60 Hz wave form input to R9 (220 ohm 1/2 W) and R13 (680 ohm 1/2 W) which form a voltage divider to provide a voltage output of less than 5 volts to R12.
R12 (47K 1/2 W) is a current limiting resistor and provides interconnection for the 60 Hz wave to C9.
Pin 3 of IC5, the output of IC5, provides a square wave output to pin 14 of IC8 (7490) through a conductor 53 and to an input of 1/6 of the hex inverter IC12. This 1/6 of IC12 is that portion of IC12 which provides the complement of the 60 Hz line voltage previously referred to in connection with pin 5 of IC2, to which IC12 is connected by the conductor 44.
IC6, IC7 and IC8 are decade counting units, all of the standard marking 7490. Each of these counting units provides an output of 0 through 9 in BCD form, as determined by negative going signals received at pin 14 of IC6, IC7 and IC8.
When connected as shown in FIG. 2, the least significant digit will be developed by IC8, the most significant digit will be developed by IC6 and the digit of intermediate significance by IC7.
Pins 2, 3, 6 and 7 of IC's 6, 7 and 8 are the reset pins and the IC's 6, 7 and 8 will not count unless these four pins are held to within 0.8 volt of system ground 41 to which said pins are connected through conductor 49, transistor Q2 and conductor 48, as previously described. This requirement is met by the aid of Q2 when activated during the timing cycle of IC3.
IC's 9, 10 and 11 are BCD to decimal decoding units with the standard designation 7442.
The outputs of IC's 9, 10 and 11 are each connected to the respective inputs of inverters of IC12 in such a manner that the predetermined count will provide a negative signal to each inverter.
Upon receiving the negative signal at the predetermined count, the inverters provide a positive signal to all inputs, i.e. pins 9, 10 and 11 of the NAND gate (see lower left-hand corner of FIG. 2) which is 1/3 of IC2, and which, in turn, provides a negative signal to pin 4 of IC3, via the conductor 47 as previously described, thereby resetting the timing cycle of IC3 and terminating the total sequence of operations.
The purpose of overall transmitter circuit 32 just described is broadly as follows. Upon receiving a triggering signal, the circuit commences, during the negative half cycle of the 60 Hz line voltage, to superimpose a predetermined frequency on the 60 Hz line voltage for a predetermined number of counts of said 60 Hz line voltage and then shut itself off.
The intelligence of the information is determined by (a) the frequency of the signal and (b) the time domain of the signal. The former is identical for all apartments and the latter is a characteristic identifying each particular apartment as the source.
The receiver 36 at the manager's apartment 14 is actuated by detection of the predetermined frequency of the transmitter and the location of the transmitter location is determined by the time domain exercised by the frequency.
Reference is now had to the receiver 36 which marshals the information on a suitable central control and alerts the manager to actual or threatened invasions of the security barriers in the respective apartments.
The receiver circuit 36 is designed to monitor the 60 Hz line voltage of the commercial power line 18 for a specific predetermined frequency superimposed on the 60 Hz line voltage and to synchronize itself with the first negative going signal of the 60 Hz line voltage after detecting the superimposed frequency.
The receiver circuit also determines the extent of the time domain commanded by the superimposed frequency and provides a pulsed output wherein the number of said pulses bears a direct and linear relationship with the time domain of the superimposed frequency, thereby enabling suitable counting and display devices to indicate the location of the originating transmitter.
The receiver circuit 36 is powered by a +5 volt dc and a +9 volt dc regulated ± 5% of power supply, as particularly appears in FIG. 3.
The connection with the 60 Hz 115 VAC commercial power line 18 having the predetermined frequency superimposed thereon is shown in the upper left hand portion of FIG. 3.
Capacitors C1 and C2 (both 0.1 uF at 500V) are connected directly to the 60 Hz line 18 and act as a high pass filter. T1 (interstage coupling transformer, primary 1K, secondary 8 ohm) acts as an impedance matching and isolation unit. One lead 56 of the secondary of T1 extendns to system ground 57 and the other lead 58 of the T1 secondary is connected to C3 (470 p F) which provides dc blocking while R1 (51K 1/2 W), R2 (10K), R3 (3.3K) and R4 (1K) provide bias and impedance matching for the input and output of transistor Q1 (2N718)
Q1 serves as a single stage amplifier for high frequency signals passed by C1, C2, T1 and C3.
C4 (0.1 uF at 12V) is a coupling capacitor between Q1 and the input pin 3 of IC1 (Signetics NE567)
IC1 is a linear IC fabricated to act as a phase locked loop. C9 (2.0 uF at 12V) connected to pin 1 of IC1 acts as an output filter, and C8 (1.0 uF at 12V) connected to pin 2 of IC1 serves as the low pass filter, both C8 and C9 being connected to system ground 57. Pin 4 of IC1 is the connection to the +9V dc bus 59.
Pins 5 and 6 of IC1 are the connections for timing elements to determine the free running frequency of the current controlled oscillator of IC1. This frequency is determined by using the formula: ##EQU2## and, in this instance, with R10 a 12K 1/2 W resistor of the metal film type, to provide good temperature stability, and R11 (2.5K Potentiometer 1/4 W) a variable resistor to provide for final trimming of the free running frequency. Capacitor C5 (0.001 uF at 50V) is preferably of polycarbonate or polystyrene construction, for good temperature stability, and both R10 and C5 should have equal and opposite temperature coefficients so that they will offset each other and maintain the proper frequency in a changing environment where temperature is a factor.
Pin 7 of IC1 is connected to system ground 57.
Pin 8 of IC1 is the output and provides a low output when the input at pin 3 of IC1 is within the detection band of the IC. The detection bandwidth of IC1 is determined primarily by the value of C8 and is calculated by the formula: ##EQU3## where: BW is the detection bandwidth, in % of f out;
V in is the input voltage, in volts;
f out is the free running frequency in Hz of the current controlled oscillator in the absence of an input signal; and
C8 is the capacitance of the low-pass filter in uF.
For minimum lock up time of IC1, the following formulas can be applied to determine the values of C8 and C9: ##EQU4##
In order to maintain a narrow detection bandwidth, fast lock up time and eliminate chatter at the output, D1 (1N914) and R12 (20K) have been added to the circuit to provide a latching action when the input is first detected as being within the acceptable detection bandwidth. When the output pin of IC1 goes low, D1 conducts, and through R12, pin 1 of IC1 is brought low, causing IC1 to latch in that condition.
IC2 (Signetics NE555) is a timing circuit connected to operate as an astable multivibrator whose frequency of operation is exactly that of the 60 Hz line voltage and which is exactly synchronized with said 60 Hz line voltage.
IC2 has a further purpose of maintaining the 60 Hz frequency in case of commercial power line failure, provided there is a source of standby power.
Pin 5 of IC2 is connected to C6 (10.0 uF at 12V) and pin 5 is the input for synchronizing IC2 with the commercial power line 18, C6 serving as dc blocking and ac coupling.
D2 (1N4004) is a separate rectifying diode connected to the secondary 61 of the power transformer 62 which provides the input for the +9 volt and +5 volt regulated power supply. D2 provides a 60 Hz wave form input to R6 (680 ohm) and R5 (220 ohm) which form a voltage divider to provide a voltage output of less than 5 volts to R7. R7 (47K) is a current limiting resistor and provides interconnection for the 60 Hz wave form input to C6.
The 60 Hz frequency of IC2 is determined by R8 (47K), R9 (50K Potentiometer 1/4 watt) and C7 (1.0 uF at 12V) and calculated by the formula: ##EQU5##
R9 is adjustable for final trimming to the precise desired frequency.
Pins 2 and 6 of IC2 are connected to C7 and pin 7 is connected to a conductor extending between R8 and R9.
Pin 1 of IC2 is connected to system ground 57.
Pins 4 and 8 of IC2 are connected to the +5 volt dc line 64.
Pin 3 of IC2 is the output and provides a square wave for the input pin 14 of IC3.
IC3 is a divide by 12 circuit with the standard designation 7492; however, in the present circuit its function is to operate as a toggle switch which can be strobed for operation in a precise manner.
When pin 8 of IC1 is high, IC3 is reset through pins 6 and 7 of IC3 and all outputs of IC3 go low. In this mode, the outputs of IC3 remain low and it will not count.
On the other hand, when pin 8 of IC1 goes low, the low input on pins 6 and 7 of IC3 allows IC3 to count any negative going transition received on pin 14 of IC3.
At the first negative transition on pin 14 of IC3, pin 12 goes high. This high output on pin 12 of IC3 causes transistor Q2 (2N718) to turn on through current limiting resistor R13 (1K) in conductor 66 connecting pin 12 and Q2.
As Q2 turns on, the base junction of transistor Q3 (2N5375) is driven low through R14 (10K), which causes Q3 to turn on and apply positive voltage to pin 1 of IC1, which forces IC1 to unlatch.
As IC1 turns off, pin 8 of IC1 goes high and forces IC3 to reset, with pin 12 of IC3 going low.
Therefore, as long as there is a signal within the detection bandwidth of pin 3 of IC1, then, for every negative going transition at pin 14 of IC3, pin 12 of IC3 will provide a full square wave.
R14 (10K) and R15 (1K) are current limiting resistors for Q2 and Q3 whereas C10 (5.0 uF at 12V) insures that Q3 will remain "on" long enough properly to unlatch IC1.
The output 67 of pin 12 of IC3 can be utilized or counted in any convenient manner, as by any commercially available device 37 whose input is compatible with the 7400 series of transistor-transistor logic. Visual notation of the apartment number is provided and in order that the manager need not maintain a constant visual scan of the read-out panel, a suitable audible warning is provided by the conventional audible alerting device 38 indicated schematically in FIG. 1.
While the foregoing security system represents one important adaptation of the digital communication system of the invention, it will be recognized that by suitably varying the components the system can be applied to numerous other situations. Inclusive of these are service station installations in which gas pumps are monitored. In this environment the system is modified so as to send out one count at a time, for example, each time 1 cent or 0.10 gallon registers on the pump.
Other situations include industrial controls where the number and/or frequency indicates a condition, stop-start signals or stop until a predetermined signal is received from a predetermined point; remote monitoring stations, e.g. water level or temperature; hospital motel and school signaling systems, e.g. patient service or teacher safety.
In all cases the digital communication system shown, described and claimed herein is of unique value owing to its accuracy; in other words, the transmitter initiates the superimposed signal on the 60 Hz line voltage during the negative half-cycle and the superimposed signal along with the 60 Hz line voltage propagate at the same rate so the receiver always detects and counts the same negative-going transition of the 60 Hz line voltage as the transmitter, therefore removing any possibility of an ambiguous count. In summary, the inherent synchronization built into the two units, transmitter and receiver, with respect to the transmitted signal eliminates any possibility of receiving inaccurate information.