Description:
BACKGROUND OF THE INVENTION
This invention concerns apparatus for automatically distributing playing cards, and more specifically, wherein the distribution is accomplished in a controlled probability manner.
Apparatus for achieving a random or pseudo-random distribution of a deck of playing cards into stacks are generally well-known in the art. Included are devices which actually shuffle or interleave the deck of cards similarly to the operation a human dealer performs to achieve the desired random distribution, and other devices which automatically control the distribution of successive cards in a deck into separate stacks to achieve the same result. Heretofore, however, such shuffling and/or distribution devices have been implemented mechanically, resulting in large, complex, and expensive machines. They are typically cumbersome to operate, and are subject to frequent breakdowns.
Accordingly, it is a general object of the card distribution machine of the present invention to overcome the disadvantages of the prior art discussed above.
It is another object of the present invention to provide such a card machine which pseudo-randomly distributes a deck of cards into a predetermined number of card stacks.
It is a further object of the present invention to provide such a card machine which eliminates the requirement for physically interleaving a deck of cards to provide a pseudo-random distribution thereof.
It is a further object of the present invention to provide such a card machine which changes the probability that a card will be distributed into a given stack, relative to the other stacks, after each successive card is distributed.
It is another object of the present invention to provide such a card machine which automatically distributes a deck of cards into a predetermined number of separate stacks, each stack containing a predetermined number of cards.
It is a still further object of the present invention to provide such a card machine which is dependable, simple in operation, and contains a minimum amount of mechanical components.
It is another object of the present invention to provide such a card machine which uses electronic logic means to control the pseudo-random distribution of playing cards.
SUMMARY OF THE INVENTION
According to the invention, the cards to be distributed are initially positioned in a deck holder, from which successive cards are individually removed and then directed by an orienting means into a card channel, which is arranged such that the cards move therein. Arranged along the card channel are a plurality of card hoppers, the card hoppers having associated therewith card gating means, which, when actuated, guide a card moving in the card channel into its associated card hopper. A logic circuit controls the actuation of the card gating means', and hence the selection of the card hopper into which the cards are distributed.
More specifically, the logic circuit is actuated in response to a driving circuit, which is actuated for a random time period determined by the interval of time a card contacts a switch means during the card's gravity-controlled fall in the card channel. The logic circuit, in response to the driving circuit, cyclically energizes a plurality of logic circuit output lines. The cyclical energizing of the output lines is slightly altered by the operation of the logic circuit after each card is distributed in accordance with a revised probability of card hopper selection for the next card. When the contact of the card with the switch means is terminated, the output line which is energized at that point in time is coupled via a coupling means actuated concurrently with the termination of switch contact to its associated card gating means for actuation thereof.
In one aspect of the invention, the logic circuit provides a controlled probability of actuation of each card guiding means by reducing the time during which the output connection associated with the particular card guiding means last actuated is energized relative to the other output connections.
In another aspect of the invention, the card channel is downwardly directed from the deck holder, the card guiding means' associated with the individual card hoppers located along the card channel being positioned substantially within the card channel, such that the cards move in the card channel under the force of gravity when the card guiding means are not actuated. More specifically, means are provided for propelling each successively removed card against the switch means, which is positioned at a top end of the card channel means, the card falling away from the switch means under the force of gravity into the card channel, with the length of time that the individual card is positioned against the switch means being a random time event.
DESCRIPTION OF THE DRAWINGS
FIG. 1 is a side elevation view of one embodiment of the card distribution structure of the present invention.
FIG. 2 is an isometric view of the card distribution structure in FIG. 1.
FIG. 3 is a block diagram of the logic circuitry which controls the operation of the card distribution structure of FIGS. 1 and 2.
FIG. 4 is a block diagram of the hopper select circuit shown in simplified block form in FIG. 3.
DESCRIPTION OF THE PREFERRED EMBODIMENT
In achieving a distribution of playing cards into a predetermined number of separate stacks, the apparatus of the present invention does not shuffle or interleave the cards. Rather, successive cards in a deck are pseudo-randomly distributed according to a controlled probability directly into individual stacks, under the control of an electronic logic circuit. Although the structure and function of the present invention will be described in the context of a standard 52-card deck, and four separate card stacks, (indicating that the particular card game being dealt has four players) the invention is by no means limited to such a particular application. Card decks of greater or lesser number may be conveniently utilized, as well as other numbers of card stacks, by modifying the structure and the logic circuit of the preferred embodiment in accordance with the principles of the present invention.
Referring to FIGS. 1 and 2, a deck of cards 11 to be distributed is initially placed by a user in a deck holder 12 positioned near the top of the apparatus. The deck holder 12 is in the general form of a shallow, box-like enclosure, having one face thereof removed for insertion of the cards. It comprises horizontal bottom member 13, vertical side walls 15, 15a, and end walls 18 and 19, with end wall 19 having a cut-out portion 19a defined therein for facilitating insertion and removal of the cards from the holder 12 by the operator. When the deck of cards is correctly inserted in the deck holder 12, a portion of the bottom card in the deck rests on the surface of rotatable roller 14, which extends longitudinally substantially between side walls 15 and 15a near end wall 18 and extends slightly into the enclosure through an opening in bottom member 13. In operation, as roller 14 rotates counterclockwise under the control of a motor (not shown) the bottommost card 15 of the deck is ejected endwise out of the deck holder 12 through a slot 16 in deck holder end wall 18. The card is moved out of the deck holder 12 over a horizontally disposed plate 17 which is coplanar with bottom member 13 and disposed adjacent end wall 18. The card is moved at such a rate that the card proceeds sufficiently forward to contact pin switch 20, which protrudes upward from plate 17 at a point approximately the length of a card away from deck holder end wall 18. Upon contact with pin switch 20 by card 15, a trip lever 22, located in a slot 22a in plate 17, is actuated, flipping the card 15 up about the one end 24 thereof adjacent pin switch 20, until the opposite end 26 thereof contacts card switch 28, which is positioned on an upwardly extending portion of a card channel 30, as hereinafter clarified.
At this point, the card 15 is longitudinally aligned with the downwardly sloping card channel 30, which comprises elongated rear wall 32, the upper end of which substantially mates with plate 17 in the vicinity of the pin switch 20, elongated shallow side walls 34 and 36, which extend away from plate 17 along the longitudinal edges of the rear wall 32, and a cover portion 37, one end of which is secured to the free edges 51 and 53 of the side walls 34 and 36 in the vicinity of the upper ends 51a and 53a thereof. The cover portion 37 is a plate-like projection which extends upwardly from the upper ends 51a and 53a of side walls 34 and 36, and generally parallel to rear wall 32. Arranged successively along the card channel 30 and extending therefrom is a series of card hoppers 38, 40 42, and 44. Each card hopper is a shallow box-like enclosure slightly larger in outline than a playing card, and includes two side walls 46 and 48 (labeled with hopper 38 in FIG. 2), which slope downwardly and extend from the side walls 34 and 36 of channel 30, a bottom member 50 having one end 50a thereof coterminal with the free edges 51, 53 of the channel side walls 34, 36, respectively, and end wall sections 52a, 52b located at the opposite end 50b of bottom member 50. The end wall sections 52a, 52b project normal to bottom member 50 and are connected at one edge thereof, respectively, to hopper side walls 46, 48. Hopper bottom member 50 includes a cutout portion 58 extending from end 50b to permit convenient removal of the piled cards.
Each of the card hoppers includes an associated magnetically actuated hopper gate 60, which is pivotable about two points, 63 and 65 on side walls 34 and 36, points 63 and 65 being defined for card hopper 38 by the intersections of the card channel side walls 34, 36 with hopper side walls 46, 48. The gate 60 is normally held in a raised position by a spring 35, the raised position being that in which gate 60 is maintained away from rear wall 32 so as to permit the card to slide adjacent the card channel rear wall 32 beneath the hopper gates. Each hopper gate is in the shape of an inverted V, the free ends 62, 64 thereof being pivotally connected to the channel 30 in the position defined above. When a hopper gate is actuated, it is pivoted about free ends 62 and 64 such that the point 66 of the V-shaped gate rests against the card channel rear wall 32, thereby guiding the moving card into the card hopper associated with the actuated hopper gate. Gate 61 is associated with hopper 44 and is permanently oriented in the channel so as to result in a stacking of the cards.
Each hopper gate 60 has a suitable magnetic means 68 for actuation of the hopper gate 60 in response to an electric signal against the restraining action of spring 35. Only one hopper gate, of course, is actuated for each card. The bottom hopper 44 does not have a hopper gate since the card will automatically fall into that hopper if the first three hopper gates associated with card hoppers 38, 40 and 42, are maintained in the raised position. Thus, a series of successive electric signals may be used to actuate selected ones of the hopper gates associated with hoppers 38, 40, and 42, thereby providing a distribution of the deck of cards originally placed in the card holder 12 into four stacks, each containing a predetermined number of cards.
Referring now to FIG. 3, the operation of the logic circuit portion of the card distribution machine is initiated when reset switch 70 is operated by the user, the reset switch 70 being typically located on an accessible part of the apparatus. This is accomplished by the user after a card deck is placed in deck holder 12, and starts the distribution sequence. The operation of reset switch 70 places a ground on the R (reset) connections of flip-flops 72, 73, 74, and 75, which together form a 4-bit counter. When reset by operation of reset switch 70 the successive outputs of flip-flops 72 through 75 will be 1111. A ground is simultaneously applied to the respective R (reset) connections of four-bit registers 78, 79, 80 and 81. Registers 78 through 81 each are comprised of four serially connected flip-flops, connected such that upon application of the ground signal to the R connections of the registers, the signal at the output connections A, B, C, D respectively, is 0100, (positive logic) which is the binary complement of 13, using the convention of least significant digit to most significant digit from left to right, which is the convention followed in this application for registers 78 through 81 and flip-flops 72 through 75. Each register 78 through 81 will thus count to 13 before being automatically recycled to its reset position of 0100. Four registers which count to 13 are used because the logic circuit of FIG. 3 has been designed to accommodate a distribution of a 52-card deck into four equal stacks. Other modes of distribution may be accomplished with different numbers of registers and different reset configurations. The reset condition of 0100 for registers 78 through 81 and 1111 for flip-flops 72 through 75 is referred to as the initial logic circuit condition, and results whenever reset switch 70 is operated.
As will be clarified hereafter, when the reset switch 70 is operated and released, one of the output lines E, F, G, H of hopper select circuit 84 will be high and the other output lines all low. Each of the hopper select output lines E through H goes high in turn under the control of oscillator 86, the initial high output line being that line which was high at the termination of the last previous distribution sequence. The hopper select circuit 84 is shown more clearly in FIG. 4. The pulse output from oscillator 86 appears at input connection T of flip-flop 88, the output Q of which is applied to AND gates 91 and 93, and the output Q of which is applied to AND gates 90 and 92. The Q output from flip-flop 88 is also applied as an input signal to flip-flop 94, which is identical to flip-flop 88, and which has a Q output connected to AND gates 92 and 93, and a Q output to AND gates 90 and 91. Thus, successive pulses from oscillator 86 at input T of input 88 will result in a high output of successive AND gates 93, 92, 91, and 90, having outputs E through H, successively. Thus, one of the hopper select output lines E through H will always be high, while the remaining output lines will be low.
As stated above, the initial output condition of each register 78 through 81 is 0100, at outputs A through D, respectively. Each output from each register 78 through 81 is connected as one input to one of a complex of register AND gates. AND gates 105 through 108 are associated with outputs from register 78, AND gates 110 through 113 with register 79, AND gates 115 through 118 with register 80, and AND gates 120 through 123 with register 31. The other input to the register AND gates are the outputs E through H of hopper select circuit 84. Output line E is connected to AND gates 105 through 108 along the outputs from register 78; output F is connected to AND gates 110 through 113 along with the outputs from register 79; output line G is connected to AND gates 115 through 118 along with the outputs from register 80; and output line H is connected to AND gates 120 through 123, along with the outputs from register 81.
The outputs of AND gates 105 through 108, 110 through 113, 115 through 118, and 120 through 123 are connected to a complex of OR gates. As an example, for a first OR gate complex, the outputs of AND gates 105 and 110 are applied to OR gate 125, and the outputs of AND gates 115 and 120 are applied to OR gate 126. The outputs of OR gates 125 and 126 are then applied to OR gate 127. In a similar fashion, OR gates 130, 131 and 132 form a second OR gate complex; OR gates 135, 136 and 137 form a third OR gate complex; and OR gates 140, 141 and 142 form a fourth OR gate complex, connected as shown in FIG. 3.
Four EXCLUSIVE OR gates 145, 146, 147, 148 comprise another complex of gates. Gate 145 has as inputs the output of OR gate 127 and the output line 72a of flip-flop 72. Gate 146 has as inputs the output of OR gate 132 and the output line 73a of flip-flop 73. Gate 147 has as inputs the output of OR gate 137 and the output line 74a from flip-flop 74. Gate 148 has as inputs the output of OR gate 142 and the output line 75a of flip-flop 75. The outputs of EXCLUSIVE OR gates 145-148 are connected to NAND gate 150, the output of which controls oscillator 86.
In operation, when reset switch 70 operated, the bottommost card in deck holder 12 is moved out of the deck holder by the rotation of roller 14. The ejected card first contacts pin switch 20, whereupon the card is flipped up to contact and actuate card switch 28, as explained above. Card switch 28 (FIG. 3), during the time the card is in contact therewith, places a ground on the connection 98a of one-shot 98, maintaining it in a quiescent or reset state, and a ground on connection 96a of oscillator 96, turning it on. As long as a card physically contacts card switch 28, oscillator 96 will remain in an on condition.
When energized, oscillator 96 begins to generate output pulses at a one MHz rate, which pulses are applied on output line 100 connected to the four-bit counter comprised of series-connected flip-flops 72 through 75. The 4-bit counter driven by oscillator 96 begins to count at the one MHz rate, providing successive output pulses at flip-flop outputs 72a, 73a, 74a and 75a. As pointed out above, the initial logic condition (i.e. alter reset by switch 70) of flip-flops 72 through 75 is 1111, and the counter counts from that initial condition.
One and only one of the output lines E through H from hopper select circuit 84 will be high at any one time. As explained above, outputs E through H will go high successively. Assuming for purposes of explanation that hopper select output line E is high when reset switch 70 is activated, and lines F through H are low, a logical one will be placed on one of the inputs to each AND gate 105 through 108. AND gates 110 through 113, 115 through 118, and 120 through 123 will have logic zeros from the output lines F through H of hopper select circuit 84, respectively. Thus, the outputs of AND gates 110 through 113, 115 through 118, 120 through 123 will also be a logic zero. The outputs of AND gates 105, 107 and 108 are also logic zero, since the register 78 outputs A, C and D connected thereto, respectively, are also zero in accordance with the initial logic condition of registers 78 through 81. However, the output of AND gate 106 is a logic one, since the initial condition of output B of each register 78 through 81 is a logic one. This logic one from AND gate 106 is applied to OR gate 130, while all other inputs to OR gates 125, 126, 130, 131, 135, 136, 140, and 141 are zero. The input to OR gate 132 from OR gate 130 is thus also a logic one. All other inputs to OR gates 127, 132, 137, and 142 are logic zero. The outputs of OR gates 127, 132, 137, and 142 are thus respectively 0100, which are in turn applied to EXCLUSIVE OR gates 145 through 148.
As stated above, the initial logic circuit condition of flip-flops 72 through 75, connected to EXCLUSIVE OR gates 145 through 148, is 1111. After 13 successive counts from oscillator 96, inputs to EXCLUSIVE OR gates 145 through 148 from flip-flops 72 through 75 will be 1011, respectively. Since EXCLUSIVE OR gate 146 has a logic one input from OR gate 132, the outputs of all EXCLUSIVE OR gates 145 through 148 to NAND gate 150 will go high for the first time since the circuit operation was initiated with hopper select output line E high, forcing the output of NAND gate 150 to go low. The low output of NAND gate 150 resets the flip-flops 72 through 75 to 0001 through connection C, and simultaneously turns oscillator 86 on, which in turn increments the hopper select circuit so that line F goes high and E, G, and H are low.
This logic process is cyclically repeated, with oscillator 86 incrementing hopper select circuit 84 whenever all 4 inputs to NAND gate 150 go high, as explained above.
The cycle continues as long as card switch 28 is closed, i.e. the card 15 is in contact with the card switch. As soon as the card falls a sufficient distance down the card channel 30 to release card switch 28, the switch 28 resets to its normally open position, releasing the ground from the connection 96a of oscillator 96, thus turning it off. Simultaneously, a high signal is applied to connection 98a of one-shot 98 through inverter 152, setting it for its predetermined period. During the predetermined set period of one-shot multivibrator 98, an output signal is applied on line 154 to one input of AND gates 156, 157, 158, and 159, associated with registers 78 through 81, respectively. Hopper select output line E is connected as the other input to AND gate 156, while line F is connected to AND gate 157, line G to AND gate 158, and line H to AND gate 159. The outputs of AND gates 156 through 159 are connected, respectively, to the input connections (IN) of registers 78 through 81.
Additionally, the outputs of AND gates 156 through 158 are each connected to associated hopper gate drive circuits 160, 161 and 162. Hopper gate drive circuits 160 through 162 are identical and include as an example a transistor 166 connected between ground and one of the magnetic hopper gate actuators 68. AND gate 159 is not connected to a hopper gate drive circuit since its associated card hopper does not have a hopper gate, as explained above.
Assuming for purposes of explanation that hopper select output line E is high when card switch 28 opens, AND gate 156 will provide an output signal in response to the signal on line 154 from one-shot 98. The output signal from AND gate 156 will be applied through resistor 164, and will turn on transistor 166, completing the circuit for the magnetic hopper gate actuator 68 corresponding to the first card hopper. As explained above, the actuation of a particular hopper gate guides the sliding card into the associated hopper. Hopper gate drive circuits 161 and 162, respectively, are associated with the second and third card hoppers along the channel 30. Simultaneously with the actuation of drive circuit 160, a signal is applied from AND gate 156 to its associated register 78, incrementing the register count by 1 so that it now reads 1100.
This completes the operational sequence of the machine for the first ejected card. The apparatus is now ready to receive the next card. As each successive card falls from contact with card switch 28, one of the AND gates 156 through 159 will be actuated, the output of which actuated AND gate will in turn actuate its associated hopper gate drive circuit (with the exception of AND gate 159) and increment its associated register. This process is repeated until one of the registers 78 through 81 becomes filled (i.e., its output reads 1111). When the hopper select line E through H corresponding to the filled register is next energized, the presence of the 1111 output immediately forces the hopper select circuit to increment to the next output line, thereby automatically skipping each register when it is full. Since the registers 78 through 81 were set initially to a count of 0100, the output of each register will read 1111 when thirteen counts have been accumulated. Each card hopper will thus receive 13 cards. Thus, the initial count of the registers 78 through 81 is established with consideration of the number of cards which is to be distributed to the individual hoppers.
The controlled distribution of the individual cards to achieve an equal chance for all possible permutations of the total number of cards in a deal is provided by the combination of the switch 28 being closed by contact with the individual cards for a random time, the very short pulse interval of the driving circuit compared to the closure of switch 28, and the operation of the logic circuit. The card switch 28 is closed as long as contact exists between a card and the switch 28. Due to slight differences in the weight and orientation of each card as it is propelled against the switch 28 by lever 22, each card will close the switch 28 for an amount of time which is randomly distributed over a small interval of time. Oscillator 96 runs at a relatively high rate (e.g., 1 MHz) compared with the detectable difference in switch contact time, as well as the range over which the contact time varies, such that several cycles of energization of output connections E through H occur between the smallest detectable difference in switch contact time. This would ordinarily result in a substantially random pattern of output connection energization at termination of switch contact. The logic circuit, however, operates to slightly alter the probabilities of each output connection being energized upon termination of switch contact relative to one another.
As an example, if the first card in the deck is distributed to the hopper associated with register 78 and output line E, in response to which the count in register 78 is incremented by 1 to 1100, the outputs of AND gates 127, 132, 137 and 142 will be 1100 respectively, when the next card distribution is initiated. With oscillator 96 running, only 12 intervening counts are necessary in order to have all of the inputs of AND gate 150 at a logic one, which in turn increments hopper select 84 to energize the next output line F. Since register 79 is still set at its initial logic condition of 0100, 13 counts are necessary from oscillator 96 in order to increment the hopper select circuit 84 to energize the next hopper select line G. Thus, if the first card is distributed to the card hopper associated with register 78, the output line E will be energized for a shorter time relative to the energization time of the other output lines for the next card to be distributed. Thus, there is a slightly reduced probability of having the oscillator 96 terminate its operation (when the card falls out of contact with switch 28) when output line E is energized relative to the other output lines. The logic circuit thus operates to slightly alter the probabilities of the actuation of each hopper select circuit upon the distribution of each card. After the first card has been distributed to the card hopper associated with register 78, the probability of the next card going in that hopper will be 12/51 and 13/51 for the other hoppers.
Such an arrangement provides substantially a "fair deal", in which all possible permutations of the cards in a deck are equally possible during distribution, (as is the purpose as well in shuffling the cards) within the constraint that the cards must be distributed into stacks containing a predetermined number of cards.
The process described above continues until all of the cards have been distributed into the individual hoppers. At the conclusion of the distribution, one given hopper select line is high. This line will be initially high for the succeeding sequence of distribution. The sequence is repeated by inserting a deck of cards into the holder 12, and operating the reset switch 70.
Thus, an automatic card distributor has been described which utilized logic control for controlled distribution of a deck of cards into a predetermined number of individual stacks, each stack containing a predetermined number of cards. Certain initial circuit conditions are established corresponding to such variables as the number of cards to be used and the number of players. The apparatus automatically distributes the cards on a controlled basis, the probability determined by the amount of time an individual card is positioned against a card switch during its fall along a downwardly directed channel, and the condition of registers 78 through 81.
Although an exemplary embodiment of the invention has been disclosed herein for purposes of illustration, it will be understood that various changes, modifications and substitutions may be incorporated in such embodiment without departing from the spirit of the invention as defined by the claims which follow.