05/438515

06/17/1975

01/31/1974

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Pioneer Electric Corporation (Tokyo, JA)

84/611

84/DIG.012, 984/348, 84/DIG.022, 84/613

G10H1/38; G10H1/00; G10H5/00

84/1.01,1.03,1.17,1.24,DIG.12,DIG.22

3707594	AUTOMATIC RHYTHM SOUND PRODUCING DEVICE ADAPTED FOR USE WITH KEYBOARD MUSICAL INSTRUMENTS	December 1972	Ichikawa
3708602	AN ELECTRONIC ORGAN WITH AUTOMATIC CHORD AND BASS SYSTEMS	January 1973	Hiyama
3711618	AUTOMATIC HARMONY APPARATUS	January 1973	Freeman
3715442	CHORD TONE GENERATOR CONTROL SYSTEM	February 1973	Freeman
3760088	AUTOMATIC RHYTHM PLAYING APPARATUS	September 1973	Nakada
3763305	AUTOMATIC RHYTHM PLAYING APPARATUS	October 1973	Nakada et al.
3764722	AUTOMATIC RHYTHM SYSTEM PROVIDING DRUM BREAK	October 1973	Southard
3795755	AUTOMATIC ACCOMPANIMENT DEVICE OF AN ELECTRONIC MUSICAL INSTRUMENT	March 1974	Uchiyama

Wilkinson, Richard B.

Witkowski, Stanley J.

Sughrue, Rothwell Mion Zinn And Macpeak

I claim

1. An automatic chord performance apparatus for a chord organ comprising:

2. An automatic chord performance apparatus as recited in claim 1 further comprising gate circuit means connected to receive said chord signals and adapted to be controlled to give a rhythm pattern on said chord signals.

3. An automatic chord performance apparatus as recited in claim 2 further comprising automatic rhythm generating means synchronized with said address means and controlling said gate circuit means for generating a preselected rhythm pattern.

4. An automatic chord performance apparatus as recited in claim 2 wherein said gate circuit means is manually controlled by the player to provide said rhythm pattern.

5. An automatic chord performance apparatus as recited in claim 1 wherein said chord selection means includes two groups of manually operable switches, one of said groups of switches designating chord tone information and the other of said groups of switches designating chord type information.

6. An automatic chord performance apparatus as recited in claim 5 wherein said memory means is a random access binary memory, said apparatus further including:

7. An automatic chord performance apparatus as recited in claim 6 wherein said random access binary memory has information stored therein in accordance with a Y-address and an X-address, said address means including:

8. An automatic chord performance apparatus as recited in claim 7 wherein said program means includes a Y-address program switch means manually operable for setting said sequence of musical phrases to be played back.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention generally relates to electronic musical instruments, and, more particularly, to an automatic chord performance apparatus for a chord organ which permits the average player to attain a higher level of musical performance with relative ease.

2. Description of the Prior Art

There is known a chord technique which is one of the normal techniques for playing an electronic organ. This technique is to play a melody on the upper keyboard or manual and a chord on the lower keyboard or manual. The main chord patterns or types in the tempered scale used most commonly for musical performances are as follows: Chord Name Tone Numbers Counting From The Root Through The Twelve Notes Which Comprise An Octave ______________________________________ major tones of numbers 1, 5 and 8 minor tones of numbers 1, 4 and 8 major 6th tones of numbers 1, 5, 8, and 10 minor 6th tones of numbers 1, 4, 8, and 10 major 7th tones of numbers 1, 5, 8, and 11 minor 7th tones of numbers 1, 4, 8, and 11 Augment tones of numbers 1, 5, 9, and 11 Diminish tones of numbers 1, 4, 7, and 9 ______________________________________

The roots of the above-mentioned eight kinds of chord patterns or types are of 12 tones, namely, C, C sharp, D, D sharp, E, F, F sharp, G, G sharp, A, A sharp, and B, respectively. Thus, there are a total of 96 main chords (eight chord types multiplied by 12 roots). Consequently, it is too difficult for the beginner or casual player to master this many chords.

In order to eliminate this difficulty, electronic organs have been manufactured which automatically construct the desired chord when one key or switch knob is touched or pushed thereby making a chord performance easier. An organ having such functions is called a chord organ. In playing a chord organ, a player is able to play all desired chords only by touching one chord selection switch at a time in accordance with the progress of the musical composition being performed.

If this kind of chord organ further had the function of storing the progress pattern of the chords for a particular musical composition and then automatically playing preselected chords in order, musical performances could be made even easier. Such a chord organ would be ideally suited for accompanying another musical instrument or a song.

SUMMARY OF THE INVENTION

It is, therefore, the primary object of this invention to improve the chord performance function of the chord organ of the prior art.

This and other objects of the invention are attained by providing an automatic chord performance apparatus which selectively stores typical chord patterns and then automatically plays them back during a musical performance thereby making easier a higher level of musical performance.

The invention is based in part on the recognition that most musical compositions, be it folk music, popular music or jazz, can be classified into any one of the following musical construction patterns:

(1) A ➝ A' ➝ A"

(2) a ➝ a' ➝ a ➝ a'

(3) a ➝ a' ➝ a" ➝ a'

(4) a ➝ a' ➝ b ➝ a'

(5) a ➝ b ➝ a

the symbols A, A', A", and B represent musical phrases which are generally composed of either four or eight bars, and the arrows indicating the progression of musical phrases.

If the total sequence of chords to be played for a long musical composition were to be stored for subsequent atuomatic playing, a memory of huge capacity would be required. The present invention avoids this problem by storing chord information in musical phrases thereby greatly reducing the required memory capacity. In the storing operation, each musical phrase is separately stored in blocks addressed Y1, Y2, . . . , Yn. As an example, the progress of the chords arranged in playing order for a particular song maybe as follows:

│ C │Dm7 │G7 │C │C/Cdim │Dm7 │G7 │C │➝A │ C │Dm7 │G7 │C │C/Cdim │Dm7 │G7 │C │➝A │Dm7/G7 │C/A7 │Fm/G7 │C │Amb/B7 │Em │Cm6/D7 │Fm/G7 │➝B │C │Dm7 │G7 │C │C/Cdim │Dm7 │G7 │C │➝A

It will be recognized that for the song assumed above, the composition is in the form of a musical composition having the musical phrase pattern of A ➝ A ➝ B ➝ A where each phrase is composed of eight bars.

It is generally necessary in playing this song to store the progress of the chords of all the 32 bars, but in the practice of this invention it is enough only to store each eight bars of the musical phrases A and B, or a total of only sixteen bars, in the addresses Y1 and Y2, respectively. During the performance of the song when the Y-address is designated in the order of Y1 ➝ Y1 ➝ Y2 ➝ Y1, the chord performance progresses in the form of the musical composition having the musical phrase pattern A ➝ A ➝ B ➝ A.

BRIEF DESCRIPTION OF THE DRAWINGS

The specific nature of the invention, as well as other objects, aspects, uses and advantages thereof, will clearly appear from the following description and from the accompanying drawings, in which:

FIG. 1 is a block diagram showing the entire construction of a chord organ in accordance with the present invention.

FIG. 2 is a block diagram showing a chord selection switch and an encoder.

FIG. 3 is a table showing the binary codes encoded by said encoder.

FIG. 4 is a block diagram showing a Y-address programing switch, a Y-address designation circuit, an X-address designation circuit and a clock-pulse generating circuit.

FIG. 5 is a block diagram showing a decoder, a tone generating circuit and a chord selection circuit.

FIG. 6 is a block diagram showing a rhythm pattern matrix, a rhythm pattern selection switch and a signal gate.

DESCRIPTION OF THE PREFERRED EMBODIMENT

Referring now to the drawings, and more particularly to FIG. 1, the chord performance apparatus according to the invention includes a chord selection switch 1 which permits the player or performer to select both the tone or root (e.g. C, C sharp, D, . . . , B) and the type or pattern (e.g. major, minor, . . . , seventh) of the chords to be played for a desired musical composition. These selections are encoded by an encoder 2 in the form of a 7-bit binary word and stored in a random access memory 3. Memory 3 may be of any well known type such as, for example, a magnetic core memory, but preferably takes the form of a solid-state memory of the type employing field-effect transistors in an integrated circuit structure. A commercially available integrated circuit which could be used for the memory 3 is SN 7481A or SN 7484A sold by Texas Instruments Incorporated. This integrated circuit membry is a sixteen-bit active-element memory so that memory 3 may be made up of 28 of these memories to provide 448-bit capacity.

The apparatus further includes a Y-address program switch 4 also operated by the player for storing the sequence of the musical phrases such as Y1 ➝ Y1 ➝ Y2 ➝ Y1 to be played back in accordance with the chord patterns of the music to be performed. A Y-address designation circuit 5 is controlled by the Y-address program switch and responsive to a clock pulse frequency divided by 16 to generate a signal designating one of four Y-addresses in the memory 3. An X-address designation circuit 6 responsive to the clock pulse input from clock pulse generating circuit 7 produces the clock pulse frequency divided by 16 for the Y-address designation circuit and also generates a signal designating one of sixteen X-addresses in the memory 3.

The information read out of the memory 3 by the signals generated by the Y-address and the X-address designating circuits 5 and 6, respectively, is decoded by decoder 8 to provide root and chord type information to the chord selection circuit 9. The chord selection circuit 9 also receives tone signals from the tone generating circuit 10 and, under the control of the root and chord information from decoder 8, generates the desired chord signals.

The clock pulse generating circuit 7 also provides a clock pulse signal to a rhythm pattern matrix 13 which generates a plurality of rhythm patterns suitable for most popular music compositions. The rhythm pattern selection switch 14 is operated by the player to select the desired rhythm pattern for the music composition to be played.

The gate circuit 12 receives the chord signals generated by the chord selection circuit 9 and is controlled by the selected rhythm pattern signal from the rhythm pattern selection switch 14 to provide an output to an audio amplifier and speaker adapted to be connected to the output terminal 11.

The invention will now be described in more detail with reference to FIGS. 2 through 6 wherein like reference numerals designate like or corresponding parts throughout the several figures. In FIG. 2 the chord selection switch 1 is shown as composed of two groups of switches 1--1 and 1-2. The switch group 1--1 is used to select one of the twelve roots C, C sharp, D, . . . , B, and the switch group 1-2 is used to select one out of the eight chord types major, minor, . . . , seventh. The chord information produced by operating the chord selection switch groups 1--1 and 1--2 is encoded by encoder 2 as a 7-bit binary word wherein four bits of the word specify the root and the remaining three bits specify the type. The table shown in FIG. 3 provides an example of the codes encoded by the encoder 2. Taking as a specific illustration, suppose that the D minor seventh chord has been selected on the chord selection switch 1. Then, the encoded binary word as shown in the table of FIG. 3 is 1010011, reading the most significant bit from the left to the least significant bit at the right.

The encoder 2 is of simple construction and preferably takes the form of a diode matrix. The 7-bit binary word from encoder 2 is stored in the memory 3 which has sixteen X-addresses and four Y-addresses, and thus a capacity of sixty-four 7-bit words. Memory 3 stores the information coming from encoder 2 in accordance with the following address array:

X1 X2 X3 X4 X16 ______________________________________ Y1 101 102 103 104 116 Y2 201 202 203 204 216 Y3 301 302 303 304 316 Y4 401 402 403 404 416 ______________________________________

If the X-address progresses two steps every bar, it is able to store the chord variation every two beats in case of a music, having four beats in one bar. In the example of above-mentioned music, the chords are stored as follows:

Progress Code of Chord Address D7 D6 D5 D4 D3 D2 D1 ______________________________________ C 101 0 0 0 0 0 0 1 C 102 0 0 0 0 0 0 1 Dm7 103 1 0 1 0 0 1 1 Dm7 104 1 0 1 0 0 1 1 G7 105 1 0 0 1 0 0 0 A G7 106 1 0 0 1 0 0 0 . . . . . . . . . . . . . . . C 115 0 0 0 0 0 0 1 C 116 0 0 0 0 0 0 1 Dm7 201 1 0 1 0 0 1 1 G7 202 1 0 0 1 0 0 0 C 203 0 0 0 0 0 0 1 A7 204 1 0 0 1 0 1 0 B . . . . . . . . . . . . . . . . . . . . . G7 216 1 0 0 1 0 0 0 ______________________________________

As shown in FIG. 4, the switch group 4 for programing the Y-address is composed of switches Y1, Y2, Y3, and Y4, which are preset in accordance with the form of the musical composition. Still referring to the example of the above-mentioned music, the switches are preset in the sequential order of Y1 ➝ Y1 ➝ Y2 ➝ Y1.

The Y-address designation circuit 5 has the ability of storing any combination of Y-addresses up to sixteen steps. The sequential operation of the switches in the switch group 4 are sensed by the encoder 5-2 which generates a 2-bit binary code word output each time a switch is operated. This binary word is fed in parallel to a 16-stage, 2-bit shift register 5-1. The output of the shift register 5-1 is fed in parallel to the decoder 5-3 which generates the Y-address designation signal.

In the automatic chord performance operation, the Y-address designation circuit 5 sends out Y-address designation signals according to the program stored in the shift register 5-1. These signals designate one of the four Y-addresses stored in the memory 3, namely, the musical phrase to be played.

An X-address designation circuit 6 sends out the sixteen X-address designation signals to the memory 3. This circuit is composed of a 4-bit binary counter 6-1 and a decoder 6-2. The decoder 6-2 has four inputs from the counter 6-1 and generates, one by one, each of the sixteen X-addresses for the memory 3. These addresses, as previously indicated, correspond to the bars in order of a musical phrase.

The Y-address designation circuit 5 and the X-address designation circuit 6 operate in synchronism under the control of the clock pulse generating circuit 7, which is preferably a multivilrator circuit of well known design. The clock pulses from the clock circuit 7 are connected to the 4-bit counter 6-1 in the X-address designation circuit 6. This counter operates as a frequency divider dividing the clock pulse signal by sixteen. The thus divided clock pulse signal is then supplied as the shift pulse through OR gate 5-4 to each stage of the shift register 5-1.

The information read out of the memory 3 due to the X and Y address designating signals is, as shown in FIG. 5, decoded by means of a decoder 8, again of the diode matrix type. Decoder 8 provides as its outputs root and chord type information which is applied to the chord selection circuit 9. A detailed description of the chord selection circuit may be had by reference to co-pending patent application Ser. No. 429,002 filed by Toshiyuki Amaya on Dec. 27, 1973, for "A Chord Selection Apparatus for an Electronic Musical Instrument" and assigned to a common assignee with the present application. Only a summary of the description of the chord selection circuit 9 is presented here to facilitate an understanding of the present invention.

First and second ring-counters 9-1 and 9-7 are associated respectively with key-tone selection gates 9-5 and chord pattern selection gates 9--9. Gates 9-5 are enabled by the root information from decoder 8, and gates 9--9 are enabled by the chord type information from decoder 8. The ring-counters 9-1 and 9-7 are driven by opposite phase outputs of a common clock 9-2. An output from one of the gates 9-5 is differentiated by the differentiator circuit 9-6 to generate a reset pulse for ring-counter 9-7 with the result that ring-counter 9-7 will be counting in synchronism but delayed with respect to ring-counter 9-1. The outputs of ring-counter 9-1 successively enable D-type latching circuits 9-3 which are connected to the signal output gates 9-4. The diode matrix 9-8 receives the outputs from ring-counter 9-7 and provides outputs to the chord pattern selection gates 9--9. The outputs of gates 9--9 are connected to the inputs of the latching circuits 9-3. Thus, the signal gates 9-4 are enabled upon the coincidence of signals from the ring-counter 9-1 and one of the chord pattern selection gates 9--9.

It will therefore be understood that the chord selection circuit 9 constructs designated chords by selecting by means of the signal gates 9-4 some of the tones from the tone generating circuit 10 in accordance with the desired chord type and root. The tone signals from the tone generating circuit 10, which are composed of the 12 tones from C to B, are sent out of the chord selection circuit 9 as chord signals which are applied to the signal gate 12.

Referring now to FIG. 6, the rhythm pattern matrix 13 is composed of a 4-stage binary counter 13-1 having a 32-bit capacity when the input clock pulse from clock pulse generating circuit 7 is taken as the least significant bit. The output of counter 13-1 is decoded by a decoder 13-2 to sequentially generate 32 inputs to the diode matrix 13-3. Diode matrix 13-3 is designed in a well known manner to generate a number of rhythm patterns suitable for most popular music compositions.

The player selects a rhythm pattern matching the musical composition to be played by operating the rhythm pattern selection switch 14. The selected rhythm pattern signal is connected to the signal gate 12, which is an analog switch such as a field effect transistor. The switch 12 thus serves to give a desired rhythm pattern on the chord signals produced by the chord selection circuit 9. Alternatively, the signal gate 12 may be a manually operable switch operated by the player to provide the rhythm directly.

It will be apparent that, by employing the present invention, the chords harmonious with a played melody are automatically played without the player having to play the chords during a musical performance. Further, by storing the chords in musical phrases in the memory, a relatively simple memory can be used to store enough chords to perform most popular music.

Although an exemplary embodiment has been described, it will be understood that various modifications can be made in construction and arrangement within the scope of the invention as defined in the appended claims.