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Title:
UNIVERSAL ON-DELAY TIMER
United States Patent 3814948
Abstract:
An on-delay timer comprised substantially entirely of solid state elements for energizing a load a timed interval after the pilot switch is closed. Upon reopening the switch, the load is immediately deenergized and the timer is automatically reset into readiness for another timing operation. The timer is universal in that it can be operated on a wide range of voltages (20 to 132) of either D.C. or 50/60 Hz A.C., and the value of the load current can be from a few milliamperes to a value limited by the capabilities of the components used, such as one ampere for a typical timer. It incorporates a leaky switch detector that enables proper operation even if the switch leaks current to some extent. An indicator indicates "off," timing (flashing) and "on " conditions.


Inventors:
Schuchmann, Russell P. (Racine, WI)
Schutten, Herman P. (Elm Grove, WI)
Small III, Isadore (Milwaukee, WI)
Van Zeeland, Donald L. (Franklin, WI)
Application Number:
05/296275
Publication Date:
06/04/1974
Filing Date:
10/10/1972
Assignee:
Cutler-Hammer, Inc. (Milwaukee, WI)
Primary Class:
Other Classes:
361/198
International Classes:
H03K17/292; (IPC1-7): H04H7/00
Field of Search:
317/141S,142,148.5B 302
View Patent Images:
US Patent References:
3641397OFF-DELAY SOLID-STATE TIMER SYSTEMSFebruary 1972Elliot et al.
3584262SOLID-STATE ON DELAY TIME DELAY APPARATUSJune 1971Gary
3555367N/AJanuary 1971Watson
3512048ELECTRONIC TIMER CIRCUITMay 1970Wallentowitz et al.
Primary Examiner:
Smith Jr., David
Attorney, Agent or Firm:
Rather, Autio Wm H. R. A.
Claims:
We claim

1. A universal on-delay timer system that operates properly on any power supply voltage through a wide range of voltages of either A.C. or D.C. to energize a load a time interval after closure of a pilot switch comprising:

2. The invention defined in claim 1, wherein said pilot switch is effective upon reopening thereof for controlling immediate deenergization of the load.

3. A universal on-delay timer system that operates properly on any power supply voltage through a wide range of voltages of either A.C. or D.C. to energize a load a time interval after closure of a pilot switch comprising:

4. The invention defined in claim 3, wherein:

5. A universal on-delay timer system that operates properly on any power supply voltage through a wide range of voltages of either A.C. or D.C. to energize a load a time interval after closure of a pilot switch comprising:

6. The invention defined in claim 1, wherein said control circuit comprises:

7. A universal on-delay timer system that operates properly on any power supply voltage through a wide range of voltages of either A.C. or D.C. to energize a load a time interval after closure of a pilot switch comprising:

8. The invention defined in claim 7, wherein said power conversion circuit incorporates:

9. The invention defined in claim 8, wherein said power conversion circuit also comprises:

10. The invention defined in claim 7, wherein said control switching means comprises:

Description:
BACKGROUND OF THE INVENTION

On-delay timers of the solid state type and the like have been known heretofore.

While these known timers have been useful for their intended purpose, this invention relates to improvements thereover.

SUMMARY OF THE INVENTION

This invention relates to solid state on-delay timers.

An object of the invention is to provide an on-delay timer of the universal type, meaning that it has a wide range of application to different voltages and loads.

A more specific object of the invention is to provide an on-delay timer that will operate properly on a wide range of supply voltage values.

Another specific object of the invention is to provide an on-delay timer that will operate properly on either D.C. or A.C. power.

Another specific object of the invention is to provide an on-delay timer that will supply a wide range of load currents.

Another specific object of the invention is to provide an on-delay timer that will control either resistive or inductive loads.

Another specific object of the invention is to provide an on-delay timer with leaky switch detection means enabling proper operation if, on closing, the pilot switch impedance goes below a predetermined level and if, on opening, the pilot switch impedance goes above a predetermined higher level.

Another specific object of the invention is to provide an on-delay timer with an indicator that is off when the load is deenergized, flashes when the timer is timing, and is on when the load is energized.

Another specific object of the invention is to provide an on-delay timer that resets if the pilot switch is reopened during the timing interval.

Another specific object of the invention is to provide an on-delay timer having combinations of the aforementioned features.

Other objects and advantages of the invention will hereinafter appear.

BRIEF DESCRIPTION OF THE DRAWING

The single FIGURE of the drawing shows a semiconductor universal on-delay timer constructed in accordance with the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT

Referring to the drawing, there is shown a solid state universal on-delay timer system according to the invention. This timer system is a delay on energization or on-delay timer in that it energizes a load L a predetermined time interval after closure of pilot switch SW.

This timer system is supplied with electrical power through a pair of power line terminals L1 and L2 shown at the left side of the drawing. This electrical supply may be either A.C. or D.C. and may have a wide range of voltage between 20 and 132 volts.

The load circuit comprises a path from terminal L1 through pilot switch SW, triac Q3 and load L to terminal L2. As will be apparent, when pilot switch SW is closed and triac Q3 is fired into conduction, the load will be energized with A.C. or D.C. depending upon which type of supply is connected to the line terminals.

The system is provided with a power supply circuit for supplying control voltage of 15 volts D.C. to the timer circuit. This power supply circuit comprises primarily transistors Q1 and Q4. As shown at the left part of the drawing, the base of transistor Q1 is supplied with voltage from a voltage divider comprising a rectifying diode D1 and resistors R1, R2 and R3 connected in series in that order from terminal L1 to terminal L2. The base of transistor Q1 is connected to the junction between resistors R1 and R2. The emitter of transistor Q1 is supplied with voltage from terminal L1 through switch SW and rectifying diode D2 while the collector thereof is connected through resistors R4 and R5 in series to terminal L2. From this it will be apparent that whenever switch SW is closed, transistor Q1 will be rendered conducting as long as the impedance of the closed switch is below a predetermined low value, hereinafter described in connection with the leaky switch detection circuit. Also, whenever switch SW is opened, transistor Q1 will be rendered nonconducting as long as the impedance of the open switch is above a predetermined high value as hereinafter described.

Also in this power circuit for supplying transistor Q4 with voltage, a rectifying circuit extends from terminals L1 through switch SW, a rectifying diode D3 and current limiting resistor R11 in series to the collector of transistor Q4. The base of transistor Q4 receives voltage through resistor R7 from the collector of transistor Q1. The emitter of transistor Q4 is connected through a reverse-blocking diode D4 to conductor 2 to supply 15 volts D.C. or the like thereto.

Transistor Q4 is a power transistor connected as an emitter follower to supply the control voltage to the timer and indicator circuits to the right thereof.

Also in this power circuit, a zener diode ZD1 is connected from the base of transistor Q4 to terminal L2. This may be a 15 volt zener diode or the like to regulate the D.C. voltage on conductor 2 at 15 volts.

The aforementioned leaky switch detector circuit is incorporated into this power circuit. This leaky switch detection is accomplished with transistor Q1, its base bias circuit including resistors R1, R2 and R3 and resistor R6. This latter resistor R6 is in series in the circuit extending from terminal L1 through switch SW, diode D3 and resistor R6 to terminal L2. Resistor R6 forms with the impedance of switch SW a voltage divider whose junction is connected through diode D2 to the emitter of transistor Q1. Thus, the switch impedances at which transistor Q1 will turn on and off can be predetermined by the base bias voltage and the value of resistor R6.

A filter circuit comprising a capacitor C4 and a resistor R15 in parallel is connected between conductor 2 and terminal L2 to smooth the control voltage in the case of an A.C. supply.

Triac Q3 in the aforementioned load circuit is provided with a firing circuit comprising a reed relay contact CR1 and resistors R8 and R9 connected in series across the triac with the junction between resistors R8 and R9 being connected to the gate of the triac. A transient suppressing capacitor C2 is connected across gate bias resistor R9. A dv/dt circuit comprising resistor R10 and capacitor C3 in series is connected across the triac to slow down the rate of change of voltage therein for proper operation. A voltage variable resistor ZNR is connected across triac Q3 and load L, and serves to limit the maximum voltage across the output to protect the circuit components from transient voltages. This ZNR may be a 220 volt high energy varistor.

A reset disabling switching transistor Q2 is provided to shunt the inputs to reset transistors Q5 and Q6 whenever the pilot switch is closed and the system is operating. At other times, the reset transistors conduct to discharge the filter capacitor and timing capacitor, respectively. For this purpose, the collector of transistor Q2 is supplied with voltage from the junction between resistors R2 and R3. The base of transistor Q2 is supplied with voltage from the junction between resistor R4 and its base bias resistor R5 and its emitter is connected to terminal L2.

Filter reset transistor Q5 receives base current through its base bias resistor R12 from the junction of resistors R2 and R3, and receives collector current through current limiting resistor R14 from D.C. conductor 2 its emitter being connected to terminal L12. A transient voltage suppressing capacitor C1 is connected from the junction of resistors R2 and R3 to terminal L2 to prevent inadvertent turn-on of the reset transistors.

Timer reset transistor Q6 receives base current from the junction of resistors R2 and R3 through its base bias resistor R13 and receives collector voltage from the timer circuit as hereinafter described its emitter is connected to terminal L2.

The timer circuit is provided with a regulated 10 volt D.C. supply. For this purpose current limiting resistor R16 and a 10 volt zener diode ZD2 are connected in series from D.C. conductor 2 to terminal L2. The junction of resistor R16 and zener diode ZD2 is connected to 10 volt D.C. conductor 4.

The timer circuit comprises a bridge circuit supplied with voltage across conductor 4 and terminal L2 and provides the control bias voltage for a programmable unijunction transistor (PUT) Q7 used as a trigger device. For this purpose, the left leg of the bridge comprises a variable resistor P1, a fixed resistor R17 and a timing capacitor C5 connected in that order from conductor 4 to terminal L2. The junction between resistor R17 and capacitor C5 is connected through current limiting resistor R18 to the anode of PUT Q7. The right leg of the bridge comprises resistors R19 and R20 connected in series from conductor 4 to terminal L2. The junction between resistors R19 and R20 is connected to the gate of the PUT. A capacitor C6 is connected across resistor R20 to delay the drop of voltage on the gate of the PUT and prevent its falling below its anode voltage and thereby to prevent firing of the PUT when the timer is being reset.

The collector-emitter circuit of the aforementioned timer reset transistor Q6 is connected across resistor R18 and capacitor C5 to discharge this timer capacitor.

The output of the timer circuit is used to fire an SCR that energizes a reed relay that, in turn, renders the aforementioned triac Q3 conductive in the load circuit. For this purpose, the cathode of the PUT is connected to the gate of silicon controller rectifier (SCR) Q8. The anode of the SCR is supplied with voltage from conductor 2 through light emitting diode LED and the coil CR of an isolating reed relay. The cathode of the SCR is connected to terminal L2. A transient voltage suppressing capacitor C7 is connected between the gate and cathode of the SCR. A gate bias register R21 is connected between the gate and cathode of the SCR. A transient voltage suppressing capacitor C8 is also connected across the SCR Q8 anode-cathode terminals.

The flasher indicator circuit comprises a light emitting diode LED and a state indicator circuit that causes it to be off when the load is not energized, to flash when the system is timing, and to provide a steady light when the load is energized.

This state indicator circuit comprises a voltage divider including resistors R22 and R23 in series connected from D.C. conductor 2 to terminal L2. The junction between resistors R22 and R23 is connected to the base of transistor Q10 to apply a base current thereto. A flasher control capacitor C9 and a resistor R24 are connected in series from conductor 2 to terminal L2. The junction between capacitor C9 and resistor R24 is connected to the emitter of transistor Q10.

In this state indicator circuit, the emitter of transistor Q9 is supplied with voltage from conductor 2 through resistor R25 while the collector thereof is connected to the base of transistor Q10. The junction of light emitting diode LED and reed relay coil CR is connected through resistor R26 to the base of transistor Q9, and the emitter of transistor Q9 is connected through resistor R27 to the junction between reed relay coil CR and the anode of the SCR. Resistor R27 is much larger in resistance value than coil CR and resistor R26 together so that the resistance of the base-emitter path through resistor R27, coil CR and resistor R26 is primarily determined by resistor R27 for reasons hereinafter described.

OPERATION OF THE STATE INDICATOR

Assuming that SCR Q8 and transistors Q9 and Q10 are initially non-conducting, the voltage divider applies a bias current to the base of transistor Q10. Initially a higher positive voltage is applied to the emitter from conductor 2 through capacitor C9 to reverse bias the base-emitter circuit and hold transistor Q10 non-conducting.

As capacitor C9 charges by current flow through resistor R24, the voltage at the emitter of transistor Q10 decreases below the voltage on the base to start the transistor conducting at about 0.6 volt forward base-emitter voltage. At low values of collector current, the collector current of transistor Q10 is shunted around the emitter-base circuit of transistor Q9, that is, it flows through the shunt path formed by resistor R27, coil CR and resistor R26. Since resistor R27 is much larger in resistance value than coil CR and resistor R26 such as 220 kilohms as against 470 ohms for resistor R26, the resistance of the shunt path is determined primarily by resistor R27. Resistor R27 serves two purposes. It shunts Q8 and Q10 leakage currents around the emitter-base circuit of transistor Q9 and thereby prevents spurious turn-on of the Q9-Q10 pair due to leakage current. It also establishes the peak point current of the the Q9-Q10 pair in that the current flowing in transistor Q10 must reach a value to develop 0.6 volt across resistor R27 before transistor Q9 conducts and regeneration in the Q9-Q10 pair occurs.

When capacitor C9 charges to the point where the base-emitter junction of transistor Q10 becomes sufficiently forward biased, the Q9-Q10 transistor pair switches on. That is, the voltage drop across resistor R27 causes emitter-base current to flow-in transistor Q9 to render it conducting. The transistor Q9 collector current then goes to the base-emitter junction of transistor Q10 to turn the latter on more, causing transistor Q9 to conduct more, etc., causing regeneration.

This regenerating conduction of the transistor pair allows capacitor C9 to discharge. This discharge current flows primarily through light emitting diode LED, resistor R26 and transistor Q10 to light the LED, but some current also flows through the secondary path consisting of resistor R25, emitter-collector of transistor Q9 and base-emitter of the transistor Q10. The initial discharge current is limited by resistor R26 which also serves to lengthen the discharge time thereby to provide a more visible LED flash. Since the initial discharge current has a high value, the LED brightness is high. Since the pulse current through the LED is obtained from charge stored on capacitor C9, both the steady state and pulse current demands from the voltage supply from conductor 2 are low.

The indicator LED is now lit and will be extinguished when capacitor C9 has discharged. For this purpose, as the discharge current from capacitor C9 decays to zero, the voltage drop across resistor R26 becomes snall so that the voltage at the base of transistor Q9 is provided primarily by the diode voltage drop characteristic of the LED. The voltage drop across the LED is substantially constant at about 1.5 volts over a wide range of currents. Thus, the voltage across resistor R25 is maintained at this voltage minus the emitter-base junction drop of transistor Q9 or 1.5 minus 0.6 which is 0.9 volts. Under these conditions, the circuit including the LED, transistor Q9 and the resistor R25 is equivalent to a current source that injects a current of 0.41 ma (voltage 0.9 divided by 2,200 ohms resistance of resistor R25 into the junction between the base of the transistor Q10 and resistors R22 and R23. The current provided by this current source determines the turn-off point of the Q9-Q10 pair. As capacitor C9 discharges, the voltage at the emitter of transistor Q10 will rise until it reaches a given value at which the curent being drawn through the voltage divider is equal to the current provided by this current source. Thus, no base drive current is available for transistor Q10 and transistors Q10 and Q9 are rendered non-conducting, causing the indicator LED to be extinguished.

Capacitor C9 is then free to resume charging to provide a second flash in a similar manner. The flash rate is preferably about two per second.

When SCR Q8 is fired into conduction as hereinafter described, current will flow continuously from conductor 2 through the LED, coil CR and the SCR to provide a steady indication.

OPERATION OF THE TIMING SYSTEM

When this system is used on a D.C. supply, the positive side is connected to terminal L1 and the negative or grounded side is connected to terminal L2. This causes current flow through diode D1 and resistors R1, R2 and R3 to apply a bias voltage on the base of transistor Q1 that is lower than the supply voltage in accordance with the drop in diode D1 and resistor R1.

For on-delay energization of load L, switch SW is closed. Current flows from terminal L1 therethrough and through diode D3 and resistor R6 to terminal L2.

The leaky switch detection occurs as follows. The impedance of the closed switch SW and resistor R6 form a voltage divider. The voltage from the junction of this divider is applied through diode D2 to the emitter of transistor Q1. It will be apparent that the higher the impedance of the closed switch, the lower this emitter voltage will be. This transistor will not be rendered conducting unless its emitter-base junction is forward biased. Thus, the transistor detects the impedance of the pilot switch and will allow proper operation if the closed switch impedance is low enough such as less than 100 ohms, for example. On reopening, the load will deenergize if the open switch impedance is high enough such as greater than 40,000 ohms, for example, as hereinafter described.

On closure of switch SW, assuming its impedance is less than 100 ohms, transistor Q1 is turned on, causing current flow through diode D2, emitter-collector junction of transistor Q1 and resistors R4 and R5. The voltage drop across resistor R5 forward biases the base-emitter junction of transistor Q2 to render the latter conducting thereby to shunt base current from reset-transistors Q5 and Q6. This keeps the reset transistors Q5 and Q6 turned off, allowing the filter capacitor C4 and timing capacitor C5 to charge as hereinafter described.

Closure of switch SW as aforesaid also applies the supply voltage across triac Q3 and load L. The supply voltage is also applied by switch SW through diode D3 and resistor R11 to the collector of power transistor Q4. Current from the collector of transistor Q1 is applied through resistor R7 to the base of transistor Q4 to render the latter conducting. This causes a D.C. voltage to be applied through transistor Q4 and diode D4 to conductor 2. Zener diode ZD1 at the base of transistor Q4 regulates this voltage to 15 volts D.C.

The filter comprising capacitor C4 and resistor R15 smooths the D.C. voltage when the system is used with an A.C. power supply.

The timer circuit supply voltage is taken from the D.C. conductor. Current flows from conductor 2 through resistor R16 and zener diode ZD2 to regulate the voltage on conductor 4 at 10 volts D.C.

For the timing function, current flows through variable resistor P1 and resistor R17 to charge timing capacitor C5, the charging rate and thus the time interval being set at variable resistor P1. Current also flows through resistors R19 and R20 in the other leg of the bridge to apply a bias voltage from the junction of this voltage divider to the gate of PUT Q7. Capacitor C6 charges to the voltage across resistor R20. Now, when timing capacitor C5 charges, the voltage on the anode of the PUT increases. This charging time is the time interval of the on-delay system. During this time interval, since the D.C. control voltage is being applied to the flasher indicator circuit, the LED flashes in the manner hereinbefore described to indicate that the system is timing. Before switch SW was closed, of course, the LED was off since there was no voltage on conductor 2.

The timing interval terminates when the anode voltage of the PUT exceeds the level of the gate voltage. At this time, the PUT triggers on and applies current from its cathode to the gate of SCR Q8 to fire the latter into conduction. As a result, current now flows through the LED, coil CR and the SCR to energize the reed relay and close its contact CR1. As a result, current flows into the gate of triac Q3 to fire the triac into conduction thereby to energize the load.

The current flow in the SCR maintains the LED continuously lighted to indicate that the load is energized.

When switch SW is reopened, the load is deenergizes instantly and without any time delay if the impedance across the open switch is 40,000 ohms or more. If the switch impedance is at least that amount, the voltage drop across it will be enough to reverse bias the emitter-base junction of transistor Q1 to render it nonconducting. This switch thus opens the load circuit to deenergize the load. The switch also disconnects the control voltage so that the reed relay is deenergized and its contact opened and the LED is extinguished to indicate that the load is deenergized.

The circuit is reset as follows. Opening of switch SW removes the base current from transistor Q2, rendering the latter nonconducting so it no longer shunts the base-emitter junctions of the reset transistors. Consequently, the voltage across resistor R3 is now applied to bias the base-emitter junctions of transistors Q5 and Q6 on. As a result, filter capacitor C4 discharges through resistor R14 and the collecting-emitter junction of transistor Q5. And timing capacitor C5 discharges through resistor R18 and the collector-emitter junction of transistor Q6. In this manner, the capacitors are reset to zero charge so that the system will always start from the same point when switch SW is closed resulting in accurate timing repeatability.

When A.C. power is connected to terminals L1 and L2, the system operates in substantially the same manner as with D.C. power except that half-wave rectified power is used for control purposes and full-wave power is used for the load. Thus, the positive half-cycle of the supply voltage is applied through diodes D1, D2 and D3 and the negative half-cycle is blocked. Also, the positive half-cycle of voltage is applied through power transistor Q4 and diode D4 to the D.C. conductor and the negative half-cycle is blocked. Under this condition, the rectified half-wave voltage on the D.C. conductor is smoothed by filter C4-R15 to provide smooth unidirectional voltage for operation of the timer circuit and the flasher indicator circuit in the manner hereinbefore described. When contact CR1 is closed at the end of the timedelay period, triac Q3 is fired on each half-cycle to provide full-wave A.C. energization of the load. For this purpose, the gating pulse of current must be applied to the gate of the triac to render it conducting. When terminal L1 is positive, current flows through contact CR1 and resistor R8 into the gate and out of the lower terminal of triac Q3 to render it conducting. When terminal L2 is positive on alternate half-cycles of the supply A.C. voltage, current flows into the lower terminal and out of the gate and then through resistor R8 and contact CR1 to fire the triac into conduction.

Reed relay CR electrically isolates the control circuit from the power output (load) circuit.

While the system hereinbefore described is effectively adapted to fulfill the objects stated, it is to be understood that the invention is not intended to be confined to the particular preferred embodiment of universal on-delay timer disclosed inasmuch as it is susceptible of various modifications without departing from the scope of the appended claims.