Black, Millard G. (Santa Ana, CA)
Nater, Robert A. (Granada Hills, CA)
Rolston, Charles E. (Santa Ana, CA)
Roberts, William H. (Corona Del Mar, CA)
Hoover, Edward D. (Placentia, CA)
Gunning, William F. (Los Altos, CA)
King, Robert P. (Anaheim, CA)

05/105597

10/23/1973

01/11/1971

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Walt, Disney Productions (Burbank, CA)

318/568.110

360/79

G06T15/70; G06F15/20

40/106.3,106.36,28.3 179/1.2S 340/324A,172.5 318/567,568,162-164,17 235/151,151.1,151.11

3585628

COMPUTER FOR GENERATING ANIMATED IMAGES WITH OVERLAP PREVENTION AND ANIMATION RECORDING

June 1971

Harrison

"Method for Computer Animation of Lip Movements" IBM Technical Disclosure Bulletin, Vol. 14, No. 10, 3-1972, 235-151..

Botz, Eugene G.

We claim

1. In a system for controlling sequential operation of devices comprising an animated presentation in response to transmitted data,

2. The control system of claim 1, further comprising, means connected to said transmitting means for determining the time and sequence of transmission of said plurality of units of positioning data and associated addresses.

3. The control system of claim 2,

4. The control system of claim 3, wherein

5. The control system of claim 4, wherein,

6. The control system of claim 4, wherein said developing means comprises one or more digital counter means, equal in number to said predetermined points.

7. The control system of claim 6, further comprising, means connected between said initiating means and each of said counters for controlling each of said counters to repeat their counting sequence a predetermined number of times.

8. The control system of claim 2, wherein said determining means conprises counter means for developing sequenced retrieval signals at a controllable rate.

9. The control system of claim 8, further comprising, means to start and stop operation of said counter means.

10. The system of claim 2, wherein said determining means further controls transmission of said data units and associated address units in synchronism with transmission of recorded audio signal.

11. The system of claim 10, wherein said controlling means comprises, audio playback means having at least one track for sensing recorded timing signals.

12. The control system of claim 1, wherein said transmitting means comprises, means for retrievably storing said plurality of units of positioning data and associated addresses.

13. The control system of claim 1, wherein said transmitting means comprises,

14. The system of claim 13,

15. The system of claim 13, wherein said generating means begins to generate said sequence signals at a time dependent upon received timing signals.

16. The system of claim 15,

17. The system of claim 16, wherein said timing signal generating means comprises one or more digital counter means, each counter initiated by arrival of a group at one of said predetermined points to count to a predetermined limit.

18. The system of claim 17, further comprising, means for controlling each of said counter means to repeat its counting sequence a predetermined number of times after each count is initiated.

19. The system of claim 14, wherein said generating means transmits sequence signals which are altered at a predetermined rate.

20. The system of claim 13, wherein

21. The system of claim 13, wherein

22. The system of claim 21, wherein

23. The system of claim 22, further comprising

24. The system of claim 23, wherein each of said variably positionable devices comprises means for positioning a mechanical device in accordance with the value of each data unit supplied thereto.

25. The system of claim 23, wherein said transmitting means transmits said units of positioning data, associated address units and associated group identity units in digital form.

26. The system of claim 23, wherein said read-out means outputs data in serial form and said receiving means comprises means for converting said positioning data to analog form.

27. The system of claim 23, wherein each of said variably positionable devices comprises a hydraulic device having a position determined by the value of said supplied data unit.

28. The system of claim 1, further comprising

29. The system of claim 28, wherein

30. The system of claim 28, further comprising timing means for generating signals, each of which is applied to said generating means for initiating operation thereof.

31. The system of claim 1, wherein each of said variably positionable devices comprises output circuit means for positioning a mechanical device in accordance with the value of each data unit supplied thereto.

32. The system of claim 31, wherein each of said variably positionable devices comprises a hydraulic device having a position determined by the value of said supplied data unit.

33. The system of claim 1, wherein said transmitting means transmits said positioning data and associated addresses in digital form.

34. The system of claim 33, wherein said receiving means comprises means for converting said positioning data to analog form.

35. The system of claim 1, wherein

36. The system of claim 1, further comprising

37. In a system for controlling sequential operation of variably positionable devices in response to transmitted digital data to produce an animated presentation,

38. The control system of claim 37, further comprising,

39. The control system of claim 38, wherein said generating means comprises a digital counter generating said signal at a predetermined rate.

40. The control system of claim 39, further comprising means for determining the rate of generation of said signals.

41. The control system of claim 38,

42. The control system of claim 41, further comprising, means controlling said generating means to repeat its operating sequence a predetermined number of times each starting by said initiating means.

43. The control system of claim 38,

44. In a system for controlling sequential operation of variably positionable devices in response to transmitted digital data to produce an animated presentation,

45. The control system of claim 44, wherein said decoding means comprises second means for storing said retrieved data and address units in locations in accordance with said decoded group identity unit.

46. The control system of claim 45, further comprises, means for selectively controlling retrieval of said units from said second storage means.

47. The control system of claim 46, wherein said selective controlling means comprises a controlled oscillator.

48. In a system for controlling sequential operation of variably positionable devices in response to transmitted digital data to produce an animated presentation,

49. The control system of claim 48, further comprising,

50. In a system for controlling sequential operation of variably positionable devices in response to transmitted digital data to produce an animated presentation.

51. The system of claim 50, further comprising, means for transmitting audio signals in timed relation with said generation of sequence numbers.

52. In a system for controlling sequential operation of variably positionable devices in response to transmitted digital data to produce an animated presentation,

53. The system of claim 52, further comprising,

54. The system of claim 53, wherein said audio signal transmitting means comprises

55. The system of claim 54, wherein said first and second sensing means comprises first and second tape playback means.

56. The system of claim 55, further comprising, means located in the area of the animated presentation for audibly reproducing said sensed audio signals.

57. In a system for controlling sequential operation of devices in response to transmitted digital data,

58. In a system for producing a controlled animated presentation,

59. In a system for producing a controlled, animated presentation,

60. The control system of claim 59, further comprising,

61. The control system of claim 60, further comprising, means located in the area of said animated presentation for audibly reproducing said transmitted audio signal.

62. In a system for producing a controlled, animated presentation,

63. The control system of claim 62, further comprising, means located in the area of said animated presentation for audibly reproducing said transmitted audio signal.

64. In a system for producing a controlled, animated presentation,

65. The control system of claim 64, wherein said means for synchronously sensing comprises tape playback means.

66. In a system for producing a controlled, animated presentation,

67. The system of claim 66, wherein said storing means also stores a plurality of units of addresses, each of said address units associated with at least one of said data units.

68. The system of claim 67, further comprising means connected to receive said retrieved units for decoding each of said address units and supplying the associated data units to the output circuit means identified thereby.

69. The system of claim 68, wherein

70. The system of claim 69, wherein said decoding means further comprises,

71. The system of claim 70, wherein

72. The system of claim 71, wherein

73. The system of claim 72, wherein there are as many controlled relay circuits as bit positions in one of said data units.

74. The system of claim 66, further comprising, means for controlling said retrieving means to determine the rate and sequence of transmission of said data units and associated address units to said output circuit means.

75. The system of claim 74, further comprising, means for transmitting an audio signal to the area of said animated presentation in synchronism with the controlled transmission of said data units and associated address units.

76. The system of claim 75, wherein, said means for transmitting comprises,

77. The system of claim 76, wherein

78. The system of claim 77, further comprising means responsive to said unit retrieval signal or retrieving said unit or units of data and addresses associated with the retrieved sequence unit for which a predetermined type of comparison was made by said comparing means.

79. The system of claim 78, wherein

80. The system of claim 66, wherein said storing means stores, in addition to said data units, a plurality of output destination units, each of said destination units associated with at least one of said data units.

81. The system of claim 80, wherein said destination units comprise address units, each different address unit corresponding to one of said first or second output circuits.

82. The system of claim 81, further comprising, means connected to said transferring means for receiving said retrieved data units and associated address units, decoding said address units and transmitting each data unit to the output circuit means identified by the decoded address unit.

83. The system of claim 82, wherein said output circuits each comprise

84. The system of claim 83, wherein each of said variably positionable devices comprise,

85. The system of claim 84, wherein

86. The system of claim 83, wherein each of said controlled devices comprise,

87. The system of claim 80, wherein

88. The system of claim 87, further comprising, means connected to said transferring means for receiving said data units and associated group identity units, decoding said identity units and transmitting each data unit only to the output circuit group indicated by the associated group identity unit.

89. The system of claim 87, wherein said output destination units further comprise address units, each different address unit corresponding to one of said first or second output circuits.

90. The system of claim 89, further comprising,

91. In a system for acquisition and transmission of stored digital data in synchronism with transmission of audio signals, the combination comprising,

92. The system of claim 91, wherein,

93. The system of claim 92, wherein said recorded audio signals and said recorded timing signals are recorded on the same recording medium.

94. The system of claim 91, wherein said stored units of digital information comprise,

95. The system of claim 94, further comprising means for generating a synchronizing signal from said retrieval signal to determine the time and sequence of the synchronous transmission of each of said units of digital information.

96. The system of claim 95, further comprising, comparator means for comparing said synchronizing signals and said retrieved sequence units and generating a comparison control signal when said signals and unit are found to be equal.

97. The system of claim 96, wherein, said comparison control signal causes said digital information unit transmitting means to transmit all data units associated with the sequence unit found equal to said synchronizing signal.

98. In a system for controlling sequential operation of devices in synchronism with a transmitted audio signal, the combination comprising,

99. The system of claim 98, wherein said transmitting means comprises,

100. The system of claim 99, wherein said synchronizing means controls the rate and sequence of retrieval of said data units and associated sequence units.

101. The system of claim 98, wherein said directing means comprises means for decoding each received address unit and supplying said associated data unit only to the output circuit corresponding to said address unit.

102. The system of claim 101, wherein said data units and said address units are transmitted in digital form.

103. The system of claim 102, wherein said directing means, further comprises, means for converting the received digital data units to analog form.

104. The system of claim 103, wherein each of said output circuits comprise means for positioning a mechanical device in accordance with the value of each data unit transmitted thereto.

105. The system of claim 104, wherein said positioning means comprises a hydraulic device having a position determined by the value of said transmitted data unit.

106. The system of claim 100, wherein said synchronizing means comprises

107. The system of claim 106, wherein

108. The system of claim 106, wherein said developing means comprises,

109. The system of claim 108, wherein said supplying means comprises a comparator means for comparing two input signals and developing a control output dependent upon the relative values of the two inputs.

110. The system of claim 109,

111. The system of claim 110, wherein said retrieving means, upon receipt of said comparator output control signal transmits to said directing means all data units associated with the sequence data unit found equal to said memory sequence signal.

112. In a system for the acquisition and storage of data for retrieval for the purpose of control of an animated presentation,

113. The data acquisition and storage system of claim 112, wherein said plurality of first positionable means comprises,

114. The data acquisition and storage system of claim 113, wherein

115. The data acquisition and storage system of claim 113, wherein said first generating means comprises an analog to digital converter.

116. The data acquisition and storage system of claim 115, further comprising, controllable means connected to receive each of said generated electrical signals for scanning each of said signals and transmitting said signals in a serial fashion.

117. The data acquisition and storage system of claim 116,

118. The data acquisition and storage system of claim 117, wherein said terminal means further comprises receiver means connected to receive said display output signals in addition to said control output signals for decoding each of said signals to direct said signals to their intended destination.

119. The data acquisition and storage system of claim 118, wherein

120. In a system for the acquisition and storage of data for retrieval for control purposes and for the control of at least one figure in an animated presentation, the combination comprising,

121. The data acquisition and control system of claim 120, further comprising,

122. The data acquisition and control system of claim 121, further comprising, means for controllably scanning said digital electrical signals for transmitting said signals in serial form.

123. The data acquisition and control system of claim 122, wherein

124. The data acquisition and control system of claim 120, wherein said control output signals are comprised of units of animation data, each of such units associated with destination units corresponding to a single one of the first or second output circuit means.

125. The data acquisition and control system of claim 124, wherein said selective supplying means comprises means connected to receive each of said data animation units for decoding said destination units and supplying the associated data units to the single one of said first and second output circuit means indicated by said decoded destination unit.

126. In the method of controlling an animated presentation consisting of acquiring and storing animation data and retrieving the data for control of the presentation in synchronism with a reproduced sound recording, the steps of

127. In the method of controlling an animated presentation consisting of acquiring and storing animation data and retrieving the data for control of the presentation in synchronism with a reproduced sound recording, the steps of

128. In the method of controlling an animated presentation consisting of acquiring and storing digital animation data and retrieving the data for control of the presentation in synchronism with a reproduced sound recording, the steps of

129. In a system of selectively retrieving portions of digital data, previously stored in storage devices, in synchronism with the content of a sensed audio signal, the combination comprising

130. The combination of claim 129, wherein said controlled means comprises

131. The combination of claim 130, wherein said selecting means comprises means for searching said previously stored data for those portions having associated units equal to said retrieval signals.

CROSS-REFERENCE TO RELATED APPLICATIONS

This specification contains disclosure in common with two applications filed on the same date. One, entitled "Monitor System For Sensing Discrete Points," filed on Jan. 11, 1971, assigned Ser. No. 105,560, discloses and claims the monitor system disclosed herein. The second application, entitled "Method of Indexing and Arranging Data In Storage," filed on Jan. 11, 1971 and assigned Ser. No. 105,455, discloses and claims the method of storing animation data disclosed herein.

BACKGROUND OF THE INVENTION

A. Field of the Invention

This invention relates generally to a system and methods for generating, storing and selectively reading out digital data. More particularly, the system and methods involve a data processing system for assembling stored data for use in controlling animated figures and associated devices such as lights, sound levels, curtain openings and so forth. Stored digital data is utilized in the invention herein to control such animated presentations or shows as are found at Disneyland, for the purposes of education, amusement and entertainment.

Broadly, in the practice of this invention, animation information, both analog and digital, is entered and stored in digital form and selectively read out to control animated figures and associated show functions. Animated figures may be of an extremely complex type such as a completely lifelike human model or a simpler type such as a cartoon character. In each type, however, the figure is moved and positioned in a realistic fashion under control of stored digital data. Frequently, the controlled motions, such as lip movement, are synchronized with recorded sound tracks. Associated show functions encompass such controllable items as electric lights, sound levels, stage movement and curtain openings and closings.

This invention also provides for the generation of such stored digital data. Animators enter information in both analog and digital form to a central computer via an animator's console. A programmed computer accepts the information, formats it properly and ultimately stores it in disc memories for later playback.

Also, this invention provides a system for monitoring correct operation of the entire system. Openings and closings of discrete devices (on-off devices) are monitored. Any detected off-normal condition controls the computer to refer to the proper one of a plurality of previously entered error routines.

Sub-programs are of two types in the preferred embodiment. In the first type, the computer causes an appropriate error message to be sent to the computer operator. In the second type, which may include the first, the computer attempts restoration of the detected off-normal condition.

It is through that a brief description of the type of animated presentation which is controllable by this invention would be helpful in understanding the field in which it may be employed. A "show" or "presentation" as the terms are used herein, refers to one or a plurality of animated figures and/or on-off devices. The figures may be copies of human, animal, cartoon character or fantasy beings. Examples of on-off devices are stage movements, lights, sound, curtain movements, figure eye blinks, water flow, and so forth. The show is generally accompanied by sound tracks, either musical scoring, spoken roles or both.

For example, one presentation with which this invention may be practised utilizes a figure of Abraham Lincoln. In that presentation, at present, the spectators are seated in an auditorium after which the main lights are dimmed and the stage curtains opened. A life size figure of Lincoln is seated on the stage. After a musical introduction, the figure rises and delivers a speech, accompanied with head, arm and body movements. The speaking part is synchronous with mouth and body movements. Following the speech, the figure is seated after which the lighting is changed and a musical score continued. Upon conclusion of the presentation, the curtains close, house lights turn on and auditorium doors open. The entire show sequence may be controlled automatically by this invention. Also, this invention is used to originally generate and store animation data for later retrieval to control the show.

A second type of show utilizes vehicles to transport the viewers. As each vehicle moves through the show, signals indicating vehicle position are sent to the show controlling system. Appropriate animation data is then routed to the general area of the vehicle. In this way, figures are animated in synchronism with the progress of vehicles through the presentation. Again, the entire presentation is controlled automatically by this invention.

B. Description of the Prior Art

Many prior art devices have been developed for causing a doll or marionette to move and otherwise imitate living or fanciful beings. Perhaps the earliest of such devices were the movable dolls used by puppeteers. Each puppet usually had a number of degrees of movement. Each degree of movement was controlled by hand by one or a number of puppeteers. Generally, the puppet was operated in syncrhonism with a spoken role or a musical score.

Obviously, the number of moving parts is limited by the skill of the puppeteers. The resultant realism and the repeatability of performances is quite limited.

Later, some automation was introduced by provision of movement control by moving cam surfaces. This type of animation control may be seen in U.S. Pat. Nos. 1,409,415 to Schimmel, 1,732,197 to Tadakuma, 2,615,282 to Veltschi and 3,024,551 to Oppenheim. In each, cam followers control, via linkage, movement of the automated figures. While many more movements may be simultaneously and repeatably controlled than in the prior manually operated puppets, many deficiencies still existed. For example, cams are difficult to produce. And, the resultant animated show is not easily changed. As with the manually controlled puppets, synchronism with spoken roles or music is not provided. Finally, it will be readily appreciated that a maximum number of controllable movements is rapidly approached in the practical sense as the complexity of a cam-controlled presentation is increased.

It was long recognized that animation of realistic human figures required life-like synchronized lip and mouth movement. Numerous patents have been issued for various methods for achieving such a result, usually via electrical control. Illustrative are U.S. Pat. Nos. 2,213,512 to Bailer, 2,247,329 to Deity and 2,890,535 to Kenwarthy. Typically, an electrical signal is derived which is proportional to the desired mouth movement. Actual movement is usually controlled by a solenoid. In many cases, the solenoid actuating signal is derived from the audio signal, thus assuring some synchronism of sound and movement. In at least one instance, that of U.S. Pat. No. 2,213,512 to Bailer, the solenoid actuation signals are derived from a track recorded synchronously with the sound track.

The electrical control approach has been extended to actuation of many animation movements in addition to mouth movement. For example, the systems disclosed in U.S. Pat. Nos. 2,700,250 to Williams, 2,867,049 to Brackensey, 3,131,497 to Rogers and 3,277,594 to Rogers et al utilize electrical control of a number of degrees of movement. The patents to Brackensey, Rogers and Rogers et al are presently assigned to the assignee herein.

Generally, in electrical control of animated figures wherein a plurality of degrees of movement are involved, a problem is soon encountered as to how to route animation signals to the proper movement actuator. In Brackensey and Rogers et al, signals are recorded in differing frequencies. All signals played back and then fed in parallel to a plurality of filters. This enables proper routing of the various animation signals only to the appropriate movement actuator. In Williams, the electrical connection is direct. That is, signals to control a given movement are only fed to the actuator for that movement. In all of these approaches, however, there is a maximum number of controllable movements. Also, the problem of audio-movement synchronism persists. The complexity and realism, therefore, of controlled animation shows or presentations is limited.

SUMMARY OF THE INVENTION

In accordance with this invention, provision is made for the generation of animation data in digital form from information entered in both analog and digital form through a control console. The console is provided with a plurality of variable electrical devices, each of which can be assigned to one of several hundred animation control circuits. Animation information entered at the console is converted to digital form and transferred to a programmed general purpose digital computer. The computer tags each unit of digital data with a number indicating the animation control circuit it is to control and transfers the data unit to storage.

It is therefore an object of this invention to accept animation information and store it in a form retrievable at will.

It is a further object of this invention to associate units of animation information with indicia which control routing of the information to the proper animation control devices.

It is another object of this invention to translate animation information to a form processable by a programmed digital computer.

As sequences of animation data units are entered, they may be assigned an identifying tag as a unitary sequence. This invention enables an animator to re-use such previously generated sequences by entering the identifying tag number. In this way, entire animated segments can be obtained by combining various ones of such sequences.

It is therefore an object of this invention to generate and store identifiable sequences of animation data units.

It is a further object of this invention to store such sequences in a fashion that they may be later recalled and re-used.

It is a still further object of this invention to copy, on command, such previously generated sequences into an animation sequence then being generated.

From the control console, an animator may enter, in accordance with this invention, animation information for one or more animation control circuits. Each unit of animation information entered is associated by the computer with a retrieval sequence tag. Under program control, the computer later merges all animation information in accordance with the sequence tags so that the stored animation data may be read out in the proper sequence.

It is, then, an object of this invention to associate each unit of animation information with a retrieval sequence tag so that the information may later be read out in the proper sequence.

It is another object of this invention to review all units of entered animation information and merge them in accordance with their associated time tags.

In many instances, an animator will desire to enter the limits of motion of a limb. Under program control, the computer automatically generates interpolated data values for the animation control circuit between the entered limits. As such data is generated, it is automatically assigned the proper time tags so that the interpolated data may later be read out in the proper sequence.

It is, therefore, an object of this invention to generate interpolated data values from intermediate data values entered by an animator.

It is another object of this invention to automatically associate such interpolated data values with proper time tags so that the interpolated data may be later read out in its proper sequence.

In addition to entering analog animation information, the control console is provided with a plurality of switches. Each switch may be assigned to any one of a plurality of discrete (on-off) output circuits. Data corresponding to the state of each switch is associated by the computer with time and output circuit tags. The discrete data may later be read out in the proper sequence determined by the associated time tag and routed to the proper output circuit determined by the associated circuit tag or number.

It is, then, an object of this invention to generate and store retrievable data corresponding to desired states of discrete devices.

It is a further object of this invention to associate such stored data with time and destination tags so that it may later be read to the proper discrete device at the proper time.

Data, both analog and discrete, entered via the animator's control console is tagged by the computer with proper time and controlled device tags and stored on magnetic disc devices. After each animation task, the animation data on disc is transferred to magnetic tape. Thereafter, the computer, under program control, reads the tape and removes certain of the units of animation data which undergo no change during a predetermined number of sequential units of time. The compressed data is then read out to a disc memory device.

It is, therefore, an object of this invention to remove certain portions of the redundant animation information stored via the animator's console.

It is another object of this invention to store the compressed information in a memory device from which it can later be retrieved.

Data stored in the disc memory is formatted in a special fashion by the computer, under program control. After the data is entered on disc by the computer, directory data is stored on disc to aid in later search and read-out of the stored data.

It is, then, an object of this invention to store digital animation data in a form and format to aid in efficient later location and readout of data.

After the data is entered, compressed and stored on disc, the disc may be used for control of an animated show. One or more discs containing animated data are connected to devices for searching and reading the stored data.

To initiate control of an animated presentation in accordance with this invention, a time reference number is provided the show control devices. Stored animation information is searched for data bearing an equal time reference number associated therewith. When matching time reference numbers are found, the stored animation data is read out to the devices which control the animated figures and associated show functions.

Time reference numbers may be supplied to the show control devices in ascending sequences so that the resultant data read out serves to properly sequence the animated show. To synchronize the animation with the audio track in this invention, a single device is used as the source of both the time reference numbers and audio signals.

It is, therefore, an object of this invention to search the data stored in a retrievable memory device and read selected data out to a selected controlled citcuit.

It is a further object of this invention to search stored data and select and read out data in accordance with a time reference number supplied by an external source.

It is another object of this invention to supply time reference numbers to data searching devices in synchronization with recorded audio tracks.

It is a still further object of this invention to supply animation data to controlled figures and discrete devices in time synchronization with recorded audio tracks.

Controlled devices which receive stored data in accordance with this invention are of two types. The first are analog devices which are controlled to proportionally position mechanical or other, such as light controller, devices in accordance with transmitted data. The second are discrete or on-off devices, for various show functions.

It is, then, an object of this invention to proportionally position mechanical devices in accordance with transmitted data.

It is another object of this invention to control animated figures in accordance with transmitted data.

It is a further object of this invention to control the state of discrete devices in accordance with transmitted data.

In the practice of this invention, data is read from disc memory units, to and from core memory and transmitted over relatively long distances. To ensure accurate animation, parity checks are made on data throughout the system. Each parity error signal operates a discrete device.

Similarly, other discrete devices are controlled to open or close during the control of an animated show. In order to provide a constant check on the operation of all discrete devices, including those operated by a parity error, a monitor system is a part of this invention.

Each monitored point is connected to a scanning unit. Under computer control, the scanning unit continually checks the status of each device. If any device is found to be off normal, the computer executes the proper sub-routine to either correct the condition or to notify an operator to take proper action, or both.

It is, therefore, an object of this invention to monitor operation of discrete devices.

It is a further object of this invention to take corrective or advisory action in the event of improper operation of a discrete device.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates the basic units of the invention.

FIGS. 2 and 3 illustrate the interrelationship of the major sub-systems herein.

FIG. 4 illustrates the format utilized herein in storage of indexing information on the disc directory track.

FIG. 5 illustrates the format used herein in storage of animation data on disc.

FIG. 6 is a block diagram of the input and control half of the Show Control Unit.

FIG. 7 is a block diagram of the output half of the Show Control Unit.

FIG. 8 is a block diagram of the Show Control Transmitter.

FIG. 9 is a diagram of a portion of a Buffer Concentrator.

FIG. 10 is a diagram of the remainder of a Buffer Concentrator.

FIGS. 11, 12 and 13 illustrate the coding waveform utilized herein on the timing track by the Time Code Generator.

FIGS. 14, 15 and 16 illustrate a Buffer Expander.

FIG. 17 is a block diagram of a Bi-Phase to Non-return-to-Zero converter and the initial portion of the Remote Terminal Unit.

FIG. 18 is a block diagram of the remainder of the Remote Terminal Unit.

FIG. 19 is a diagram of a proportional output control circuit.

FIG. 20 is a block diagram of the circuit for controlling discrete (on-off) output circuits.

FIG. 21 is a silicon-controlled rectifier version of a discrete output circuit.

FIG. 22 is a relay version of a discrete output circuit.

FIG. 23 is the control panel of the Animator's Console.

FIG. 24 is a block diagram of the Animator's Console, the computer and peripheral equipment utilized in this invention.

FIG. 25 is a block diagram of a Bi-Phase Transmitter.

FIG. 26 is a timing diagram of certain signals in the Bi-Phase Transmitter.

FIG. 27 is a block diagram of the Asynchronous Show Controller.

FIG. 28 is a block diagram of the Monitor System.

FIG. 29 is a block diagram of the Monitor Scanner of the Monitor System.

FIG. 30 is a block diagram of the Overhead portion of the Discrete Scanning Unit of the Monitor System.

FIG. 31 is a schematic diagram of a Scanning Circuit of the Monitor System.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

General Description of System

A generalized diagram of the system according to this invention is illustrated in FIG. 1. This invention operates in three principal modes, each of which can be broadly understood by reference to FIG. 1.

GENERATION AND STORAGE OF ANIMATION DATA

The first principal mode is generation and storage of animation data. Entry of such data into the system is performed by an animator using animator's console 1. Console 1 is provided with variable potentiometric devices, such as shown at 2, and discrete devices or switches, such as shown at 3. By operation of console control buttons, such as shown at 4 and 5, the animator can assign any single potentiometer to a single output proportional control circuit of animated figure 6. For purposes of this description, the animated figure illustrated in the drawing is that of Disney's Mickey Mouse. It is understood that this is illustrative only, as the animated device can take any desired form or forms.

Each proportional control circuit, to which a potentiometer 2 is assigned, controls one degree of movement of animated figure 6. For example, any single potentiometer may be assigned via the console controls to move the thumb of the animated figure's right hand by an amount proportional to the potentiometer displacement.

In actual practice, an animator may work with a single output circuit and potentiometer at a time or a plurality of each. Since the data entered is later merged on a time basis, the choice of number of output circuits to be animated at any one time is arbitrary.

Potentiometric devices 2 are illustrated in FIG. 1 as generally following the shape of animated figure 6. This is a matter of convenience as the devices are, in practice, arranged on console 1 in a variety of designs.

Similarly, switches 3 may be assigned to discrete output circuits by console control buttons 4, 5. For example, any one of the switches may be assigned to turn light 8 on or off.

Accordingly, analog data may be entered via potentiometric devices 2, discrete data via switches 3 and control data via buttons, such as 4, 5, on control panel 9. As data is entered, it is tagged with a time reference, termed a foot and frame number, which is utilized throughout the system. While this number will be defined in detail below, it is sufficient at this point to state that each different foot and frame number defines a frame time, or 42 milliseconds. (At normal film rates, one frame time is 41.66 milliseconds. The 42 millisecond figure used herein is an approximation.) The foot and frame number accompanying each unit of entered data determines the exact time and sequence that the unit of data will later be read out of storage to control animated figure 6 during a presentation or show.

By use of time tags, an animator may enter data for a single output control circuit at a time. If, for example, an animator tags a right thumb move entry with the same foot and frame number as an earlier entered left thumb move, the two units of data will be later read out of memory in the show control mode within the same frame time or 42 milisecond time span. The two thumbs would then move at virtually the same instant. In this way, an animator can construct a show wherein hundreds of changes are occurring at the same time.

Data entered via control console 1, along with the associated time tag, is converted to digital form and transmitted via line 9 to computer 10. The computer accepts each unit of data and adds to it a number indicating the identity or address of the output circuit to which the data unit is directed. For example, if the left thumb entry is received by computer 10, it adds a number to each unit of data which is the address of the circuit controlling the left thumb. Computer 10 then transfers the animation information and accompanying foot and frame number with the address number to disc storage 11. At the same time, the animation data and address number is routed by the computer via line 12, remote terminal unit 13 and line 14 to circuits which control movement of animated figure 6. If the address transmitted is that of the circuit controlling the figure's left thumb, the member is made to move to a position indicated by the entered data.

While generating data in the first mode, then, the figure moves in response to entered data. This is for the purpose of aiding the animator and is not necessary for the proper storage of animation data.

Similarly, operation of a switch 3 is communicated to computer 10 with an accompanying foot and frame number. The switch may be assigned via control buttons 4, 5 to open curtains 16, turn on light 8 or switch on audio speaker 20. As with animation data, computer 10 stores the discrete signal and accompanying foot and frame number with the address of the circuit to be controlled, as, for example, the curtain motor, on disc 11. At the same time, the discrete data is transmitted by computer 10 to the output circuit designated so that the animator may instantaneously see the results of the entry.

At the end of an animation task, disc 11 contains hundreds or thousands of units of animation data, each unit associated with a foot and frame number and an assigned address. Because data may have been entered at different times for the same output circuits during the animating task, data units with identical foot and frame numbers and addresses may be distributed throughout disc 11 in preassigned locations.

In response to a merge instruction entered via animator's console 1, computer 10 executes a program which effectively sorts the data on disc 11 by foot and frame number. The result, data sorted by ascending foot and frame number, is read onto tape 22.

Tape 22 then contains all animation data and associated foot and frame numbers and addresses entered during a single animating task. The tape may be removed from its transport and saved until the animation is to be continued at a later time.

When the animation is continued, the prior tape is merged onto a second tape (not shown) along with data entered during the next successive task. This data merge is repeated from disc to tape until animation data for a complete show is assembled on magnetic tape 22.

Standard input-output devices 24, such as a typewriter device, may be utilized to enter data and control signals to computer 10 in the usual manner. In addition, the input-output devices may print out messages to the operator.

A principal feature of this invention is the ability to call previously entered data sequences, termed macros herein. A macro may consist, for example, of hundreds of previously entered data units which would move the right arm of animated figure 6 in a certain fashion. Macros are called via input devices 24 or control buttons 21, 5 on animator's console 1.

When tape 22 has been finally loaded with animation data, the first principal mode is nearly complete. Via a command entered through input-output device 24, animation data and associated foot and frame numbers and addresses are loaded on disc 11. Under software control, a directory track for data indexing purposes is written on the disc. The disc is then ready to control an animated show via show control unit 25. In the practice of the second principal mode, the Show Control Mode, the loaded disc is transferred to the input of the show control unit 25. Thereafter, animation data is selectively retrieved to control an animated show or presentation.

In addition to loading a show control disc and writing a directory track therein, the final disc-load program also compresses the data and inserts updates every 30 frames.

Data compression involves stripping out channel data entries which remain constant. This is, of course, done to conserve disc space. In exception to the data compression, however, is the 30 frame update. This procedure inserts data units to ensure that every output circuit receives data (updated) at least every thirty frames. The purpose of the thirty frame update is to control the mechanical output devices to maintain their position where their data inputs are unchanged.

SHOW CONTROL MODE

Discs loaded with data during the disc load mode are physically removed from computer 10 and connected to show control unit 25. Essentially, show control unit 25 is a sub-system for retrieving data from discs 26 corresponding to externally supplied or internally generated timing signals and transmitting the retrieved data over lines 27.

The most common external source of timing signals is tape playback unit 28 which provides successive foot and frame numbers via output timing line 30. This unit plays a tape having a timing track and one or more audio tracks. Timing track signals, consisting of foot and frame numbers, are supplied to the show control unit via line 30. The audio signals, synchronized with the time signals, are routed to speaker 20 via line 31.

Show control unit 25 receives the line 30 foot and frame numbers, searches discs 26 for data having a corresponding number and outputs the data serially over lines 27. In this way, data is delivered to animated figure 6 in synchronism with the sound from speaker 20, regardless of minor speed variations in playback unit 28.

Foot and frame numbers may be received from sources other than tape playback unit 28. Other sources are represented diagrammatically by timing source 33. In a second timing mode, synchronizing signals are transmitted from the show area. This mode is utilized in those instances where viewers are carried through the show asynchronously and various segments of the total show must be played when viewers reach a predetermined position. The third timing mode utilizes an internal counter to supply sequential foot and frame numbers.

In each of the three timing modes, however, data is read from discs 26 in response to an externally supplied foot and frame number. This data is then transmitted via double redundant lines 27 to remote terminal unit 13. Unit 13 translates the data to parallel form and delivers it to animated figure 6 and the discrete devices. Data sequentially received in this fashion animates figure 6 and operates the various discrete devices, such as light 8 and curtains 16.

MONITOR SYSTEM MODE

Throughout this invention, digital data is read into and out of storage, transmitted over thousands of feet of wire and converted between serial and parallel forms. As is well known, it sometimes happens that data bits may be inadvertently dropped or added in such systems. Also, in complex electronic systems, component failure sometimes occurs. Finally, presentation of complete shows involves many ancillary effects, such as air conditioning, water level and pressure, and so forth.

To check proper operation of the discrete devices throughout the system, monitor system 35 is provided. The monitor mode operated during practice of the other two principal modes. Basically, the monitor system continually checks the status of discrete devices throughout the system. Deviations from normal, that is, changes of state, are communicated to computer 10. The computer, then, executes the indicated sub-routine. The sub-routine may control a restorative device to correct the off-normal input or may simply inform a computer operator via input-output device 24. It should be noted, however, that monitor system 35 automatically scans the entire system and only involves computer 10 in the event of an off-normal condition being detected.

Operation of each major sub-system in the invention is monitored: the show control unit via line 36; the control console via line 37; the remote terminal circuits via line 38; and, the show or presentation via line 39.

DESCRIPTION OF SYSTEM AND MAJOR HARDWARE COMPONENTS

Before describing the hardware and software components of this system in detail, it is thought that a broad discussion of the hardware system would be helpful in understanding the overall operation of the invention. This discussion will be made by reference to FIGS. 2 and 3.

Two points should be initially understood. First, two different operators of the system will be referred to. One is the usual computer operator and the second is the animator. The latter person actually enters animation data.

Secondly, throughout this specification, reference will be made to foot and frame numbers. While this will be explained in detail later, it should be understood at this point that such numbers are the basic time unit used throughout this system. They refer to 35 m.m. motion picture film rates and footage. A single frame is one picture in motion picture film. And, as in motion picture usage, there are herein, generally, 24 frames to the second and 16 frames to the foot. The 24 frames to the second may be varied, but such variance is not important at this point.

Referring to FIGS. 2 and 3, the hardware system of this invention is shown comprised of its major components. Of the three principal modes, the show control mode will be described first.

Referring to FIG. 2, two disc units 40 are shown connected to show control unit 41. As indicated by input lines 42, 43, up to four disc units may supply data to the show control unit. Discs 40 are standard memory devices manufactured, in the case of the practical embodiment, by Data Disc, Inc., of Palo Alto, California. Discs are of the Data Disc 7200 Series.

An animated show is started by controls on control panel 44 of show control unit 41. After a show is started, animation data is transmitted to the animated presentation from show control unit 41 in a sequence and at a rate determined by received timing signals.

In the most common timing mode, mode switch 45 connects audio synchronizer 46 to the show control unit. In the preferred embodiment, audio synchronizer 46 comprises a tape playback unit which senses a tape having at least two tracks recorded thereon. One track contains audio signals which are transmitted to the area of the show via line 47. The second recorded track contains sequentially recorded timing signals which are delivered to a time code translator. It is the function of the time code translator to generate successive foot and frame numbers at a rate determined by the received timing signals. The foot and frame numbers appear on line 48 and change, in the audio sync mode, every frame time, or 42 milliseconds (one twenty-fourth second). It should be noted at this point that FIGS. 2 and 3 are illustrative only. For example, many lines, such as line 48, transfer data in parallel-by-bit form. For simplicity at this point, however, single lines are shown.

As each new foot and frame number is delivered to the show control unit via mode switch 45, logic circuitry within the unit controls a search of animation data stored on discs 40 and outputs all animation data units having an associated foot and frame number equal to that of the number entered via switch 45.

It should be remembered that in the audio sync mode, a new foot and frame number is inputted via mode switch 45 every frame time, or 42 milliseconds. Due to the high speed of the data retrieval system utilized within the show control unit, hundreds of words of animation data may be located and read out by the show control unit long prior to the appearance of the next successive foot and frame number on mode switch 45.

If mode switch 45 is changed from the position shown in FIG. 2 to position 49, show control unit 41 operates from an automatically incrementing internal counter. In this internal mode, audio signals may or may not be sent to the show area. As before, show control unit 41 locates animation data on discs 40 corresponding to each internally generated foot and frame number. Animation data so located is outputted as will be described below.

External synchronizer 50 is utilized in the third timing mode. When mode switch 45 is rotated to contact 51, the show control unit's internal counter (containing a foot and frame number) is incremented by one count whenever a timing pulse is received from external synchronizer 50. Accordingly, the show control unit may be driven at its normal rate, 24 frames per second, or at any slower rate.

The fourth type time mode utilized herein involves asynchronous timer 55. In many types of animated shows, viewers of the show are transported therethrough in vehicles. Since it is impossible to control exactly the rate of loading and unloading of each vehicle, the segments which comprise the entire show must often be played at an asynchronous rate determined by the arrival of observers in a vehicle at a predetermined point. Asynchronous timer 55 provides for such operation. Up to twelve show vehicle position signals, indicated by lines 56, 57, originate in the show area to indicate progress of vehicles through the show. Upon receipt of a position signal from any one of the up to twelve show areas, asynchronous timer 55 begins to supply foot and frame numbers relating to data applicable to that area to show control unit 41. As will be explained below in connection with the detailed explanation of the show control unit, the asynchronous timer runs at a higher rate than does audio synchronizer 46 and controls fewer output circuits during each frame time.

Accordingly, in one of four timing modes, successive foot and frame numbers are supplied to show control unit 41 via mode switch 45. In response to each newly received foot and frame number, show control unit 41 causes animation data contained on discs 40 to be searched and outputted when that data is found to have an equal foot and frame number associated with it.

In the preferred embodiment of this invention, each presentation or show is divided into four subshows. Each subshow contains up to 250 proportional control circuits or up to 2,000 discrete control circuits, or a mixture of both. When animation data is recorded on discs 40, associated with each unit of such data is the address of an output circuit and an identifying bit designating to which of the four subshows the address and data units are to be sent.

When animation data is outputted from show control unit 41 then, it is supplied to one of up to four show control transmitters 60, 61. Although only two show control transmitters are shown in FIG. 2, it should be understood that any number, up to four, may be employed. It should also be understood at this point that there is no direct relationship between the number of discs 40 and the number of show control transmitters 60, 61. Four discs may be utilized to supply data through a single show control transmitter or a single disc may supply data to four show control transmitters. Further show control transmitter input lines 62 are illustrated in FIG. 2. The type of output of each show control transmitter would be the same as that shown for single transmitter 60.

The output of the show control transmitter contains animation data and associated addresses transmitted serially by bit. In each case throughout this system where digital data is to be transferred over a distance, it is first converted to a bi-phase code. The output of show control transmitter 60 is, therefore, passed through bi-phase transmitter 64. The animation data units and associated addresses are then routed to the show area over double redundant lines 65. In the practical embodiment, lines 65 are, in some instances, one mile in length.

In order to maintain circuit impedance matching, only one 600 ohm load is placed on a single line. Therefore, where it is necessary to apply subshow animation data to more than one load, buffer expanders are used. These are impedance matching and amplifying systems, such as expander 66, which accepts a single input from line 65 and provides three identical outputs 67, 68, 69. Each output would be routed to a similar output unit. For the purpose of simplicity, only the data route over output line 67 will be described. Animation data appearing on line 67 is applied to bi-phase receiver 68 (FIG. 3) via selector switch 69. The purpose of bi-phase receiver 68 is to convert the bi-phase encoded data to non-return-to-zero form for use by remote terminal unit 70.

Remote terminal unit 70 receives the transmitted units of animation data and associated addresses, converts both to parallel form and supplies them, serially by word and parallel by bit, to proportional output circuits 71 and/or discrete output circuits 72. A single remote terminal unit, such as 70, can supply animation data and associated addresses for up to 250 such circuits. Each of the discrete output circuits, such as 72, in turn may control as many as eight discrete devices.

The outputs of the up to 250 proportional output circuits 71 are supplied to animated presentation 75 via line 76. Each proportional output line 76 is connected to one proportional control device which, in turn, controls one degree of freedom of movement of an animated figure or other device within presentation 75. Output lines 77, on the other hand, control the state of discrete (on-off) devices throughout animated presentation 75. These discrete devices may control such items as lights, eye movements, curtain openings and closings, and so forth. Other pairs of proportional and discrete inputs from other remote terminal units are represented in FIG. 3 by input lines 78 and 79.

It will be recalled in connection with the discussion of FIG. 2 that, in one timing mode, audio signals are transmitted from the show control unit via line 47. These signals are connected to audio line 80 in FIG. 3 and reproduced by sound device 81. Accordingly, up to 1,000 addressable circuits may be made to operate animated presentation 75 in synchronism with sound from audio device 81.

Returning to FIG. 2, the mode for generation of animation data will be discussed. Two animators' consoles, 83, 84 are illustrated in FIG. 2. This number is shown for purposes of explanation as, in the practical embodiment, a plurality of such consoles may be used. The output of each console is supplied as an input to buffer concentrator 85. As will be explained below, the buffer concentrator acts to pass only a single input at a time. Like the buffer expander, the function of a concentrator is primarily that of impedance matching.

Each animator's console contains the units illustrated in block 84. Discrete inputs, consisting of discrete animation data or control inputs are entered via console switches, represented diagrammatically as block 88. Up to 256 such inputs are applied in parallel to discrete scanning unit 89. The details of unit 89 will be explained in connection with the monitor system. For the explanation at this point, it is sufficient to understand that discrete scanning unit 89 scans, under control of the computer, each of the up to 256 inputs sequentially and provides a serial output via line 90 of the status of each point.

Variable inputs from the potentiometer devices are represented diagrammatically by block 91. The position of each potentiometer device is applied in parallel via line 92 to analog to digital converter 93. Converter 93, which also serves as a multiplexer, converts each of the variable inputs to an eight bit binary number. Up to 32 potentiometers may be used in the preferred embodiment herein. Since each of the 32 inputs is encoded into eight bit digital bytes, the 256 outputs are supplied in parallel via line 94 to piggyback unit 95.

Piggyback unit 95 is a discrete scanning unit similar to unit 89. Like unit 89, it is controlled by the computer to sequentially scan all of its 256 input points and output them serially via line 90. In this way, all inputs, whether discrete or variable, are digitized and serially outputted over line 90.

It should be understood at this point that as each unit of animation data is entered via console 84, it has been, via the console controls, previously identified with an addressed output circuit. Part of the discrete inputs from block 88 contain this identification, termed herein an overlay, of data input devices and output circuits. This is, of course, continually received by the computer and recognized as such. In addition, the data is being continually associated in one of a variety of ways with foot and frame numbers. As the data is transferred from animator's console 84 to the computer, it is stored therein in association with the output address and the time-relating foot and frame number.

Buffer concentrator 85 is, in effect, the opposite of buffer expander 66. Its purpose is to accept up to three inputs and provide one balanced output via line 98. Data transmitted from discrete scanning unit 89 is bi-phase encoded. Accordingly, animation data appearing on line 98 is serially transmitted by bit in bi-phase code.

Referring now to FIG. 3, serially received animation data is passed via bi-phase transmitter receiver 99 to computer system interface 100. The computer utilized in this system is Model DDP-516 manufactured by Honeywell, Inc. As with all general purpose computers, some interfacing is necessary in order to adapt the data form supplied by receiver 99 and line 101 with the data form acceptable by computer 102. Interface 100 serves this purpose.

Received animation data is stored by computer 102 on disc 104. It is stored with the computer generated addresses and the computer generated or recognized foot and frame numbers. The animation data and the associated tags (addresses and foot and frame numbers) are serially recorded on disc 104 throughout a single animating task.

At the end of an animation task, data on disc 104 is, via software control, transferred to work tape 103. Tape 103 may be removed from its transport and saved until the following animation task. In the next task, data is entered in the identical fashion on disc 104. Therefore, at the end of the second task, later entered animation data exists on disc 104 and on the prior task's work tape 103. Under control of a merge program called by animator's console 84 (FIG. 2), computer 102 merges the data from disc 104 and tape 103 and stores it on new tape 106. The new tape is then saved and merged with animation data entered during the next animation task. This data entry, merging and transfer continues until the final tape contains, sorted by foot and frame number, all of the animation data and associated addresses necessary to fill an entire animation disc 104. Then, under control of a further program called by input-output device 105, data on tape 106 is processed to remove redundancies and transferred to disc 104 where it is written on successive tracks in ascending foot and frame numbers. At the end of this operation, a directory track is written, which, as will be explained, aids the show control unit in locating units of animation data.

The animator's control console is equipped with various readout lights. Some lights display the current foot and frame number, some inform the animator as to the next step he is expected to make, while others inform him as to the present mode of operation, and so forth. These lights are operated by computer 102 as any discrete output device. Each such output display has an address and may be supplied data in the normal fashion. Computer 102 transfers data for such displays via bi-phase transmitter 108, line 109 to, in FIG. 2, buffer expander 110. As before, buffer expander 110 provides at least 3 balanced outputs 111, 112, 113 from the single input on line 109. While only line 111 is shown connected to a load, it will be appreciated that, in the practical embodiment, lines 112 and 113 may be connected to other animator's consoles such as input line 114 of console 83. Bi-phase signals from computer 102 are applied via line 111 to bi-phase receiver 115. As before, the function of bi-phase receiver 115 is to convert the bi-phase encoded data to a non-return-to-zero format for use by remote terminal unit 117. In exactly the same fashion as described in connection with the show control mode, data units received from the computer by remote terminal unit 117 are associated with output addresses. The data may either be addressed to discrete scanning unit 89, commanding a scan of its input points, piggyback unit 95 commanding a similar scan, or contain display information for discrete output circuits 118. Generally, the discrete outputs on an animator's console take the form of on-off lights, denoted in FIG. 2 as discrete displays 119 or decimal outputs, denoted in FIG. 2 as binary-to-decimal unit 120.

Referring again to FIG. 3, it will be recalled that entered animation data is received by computer 102 over input line 101 via the interface. It is then associated with output addresses supplied by the animator and stored on disc 104. At the same time, computer 102 outputs the animation data and associated addresses via interface 100, line 125 and bi-phase transmitter 99 to line 128. The animation data appearing on line 128 is applied to bi-phase receiver 68 through the usual buffer expander 130. It should be noted that bi-phase receiver 68 is the same receiver utilized to receive data from the show control unit during system operation in that mode. Mode switch 69 may be connected to the output line 131 of buffer expander 130 to allow the animated figure to be controlled via the computer from the animator's console. It should be appreciated that in most instances, mode switch 69 would not be used. The animated presentation is either run in the animation mode or in the show control mode. It often occurs, however, that an existing show must be updated or changed in some fashion. Accordingly, the preferred embodiment does provide for an input to each animated presentation 75 from either the show control unit or the animator's console, the latter to be used for data modification. Data received from line 131 is inputted to remote terminal unit 70 and transferred to presentation 75 in the same fashion as is data received from the show control unit. The purpose of transferring animator's console data to the animated presentation is so that the animator can see the effect of each data entry. This aids greatly in the creation of animation data.

The monitor system of this invention provides a system for continually monitoring the correct operation of any function which can be expressed as a state of a discrete device. For example, water level and flow, temperature, parity check circuits, and so forth, may be monitored by the system disclosed herein. It will be noted that a feature of the monitor system according to this invention is that the monitoring continues without computer interruption or involvement so long as no off-normal conditions are found. When an off-normal condition is found, the computer is so advised and restorative action is attempted under its control.

Referring to FIG. 3, monitor scanner 135 is connected to computer 102 via lines 136, 137. When, from peripheral devices such as input-output devices 105, a computer operator calls the monitor program, control line 136 initiates monitor scanner 135 to begin the monitoring sequence. Thereafter, monitor scanner 135 generates a succession of interrogation words and outputs them on line 140. Each interrogation word includes the address of one of a plurality of discrete scanning units. This is the same type of discrete scanning unit that is utilized in the animator's console discussed in connection with FIG. 2.

Interrogation words are supplied to monitor transmitter 141, where they are bi-phase encoded and sent to remote terminal unit 143 via the standard buffer expander 142. As in the show control and animation data generation modes, remote terminal unit 143 accepts the bi-phase data and converts it to non-return-to-zero parallel form.

Each interrogation word is connected in parallel to a plurality of monitor output circuits 155 and discrete scanning units, represented in FIG. 3 by unit 145 and piggyback unit 146. Each scanning unit and piggyback unit is connected to up to 256 discrete points. Each point consists of a pair of normally closed contacts. As the addressed discrete scanning unit recognizes its interrogation word, it first replies with a word on output line 150 dependent upon whether or not a piggyback unit is connected to it and upon whether or not all scanned points are normal (that is, closed) or any scanned point is off-normal. If the discrete scanning unit finds that all scanned points are normal, no further reply is sent. If, on the other hand, it finds that any one of its 256 connected scanned points are off normal, that is, open, it individually scans each point and reports the status of each to monitor scanner 135 via buffer concentrator 151 and monitor receiver 152. Scanner 135, if it receives an initial status word indicating that one or more contacts were off-normal, generates a computer interrupt via line 137. It thereafter checks the returned status word and scanning data from the discrete scanning unit and supplies the data, if acceptable, to computer 102. The computer then proceeds to examine the status of each of the up to 256 discrete points.

When an off-normal state is found, the computer refers to a previously loaded set of error subroutines. The subroutine may control the computer to output an error message to the computer operator via input-output device 105. Or, it may return restorative data to monitor scanner 135. In the latter case, monitor scanner 135 outputs the restorative data via line 140 in the same format as interrogation words. That is, each data unit is associated with the address of one of a plurality of monitor output circuits 155. The restorative data and accompanying address is received by remote terminal unit 143 and applied to all monitor output circuits and discrete scanning units in parallel. However, only the selected monitor output circuit will recognize its address and will be controlled to attempt to restore the condition causing the off-normal report.

Individual monitor output circuits 155 are identical to the discrete output circuits 72 of FIG. 3. They may be used, for example, to turn on a motor or a water valve, and so forth.

The above discussion of FIGS. 2 and 3 involve all of the major hardware components of this invention. In addition, it explains some of the functions performed by the hardware in response to software control. In the sections that follow, the detailed operation of each of the hardware components as well as an explanation of the software involved will be given.

DATA FORMAT ON DISC

Animation data for use by the show control unit in this invention is stored, in the preferred embodiment, on magnetic disc units. While a number of different discs may be utilized, applicants use a Model 7206 disc manufactured by Data Disc, Incorporated.

From one to four discs may be used as data sources for the show control unit. The number of discs is determined by the total amount of data to be stored. As explained elsewhere herein, the show control unit transmits data to output circuits via one to four show control transmitters. It should be noted that there is no direct correspondence between the number of show transmitters and the number of discs. One disc may supply data to four transmitters or four discs to one transmitter.

When connected to the show control unit, the disc memories perform only a search and read operation. To change disc data in any way, the disc must be accessed by the central computer via a computer-connected disc controller.

Each of the discs utilized by applicants contains 64 tracks upon which data may be written. One track is utilized for a special purpose, as will be described. Since up to four discs may be used, up to 255 tracks are available for storage of animation data.

A word timing track and bit sync track are built into each disc for generation of timing signals so that external logic can be properly synchronized with outputted data.

The basic time reference used in this system is the foot and frame number. This is a number derived by reference to standard 35 m.m. motion picture film rates. One frame is a unit of time of one twenty-fourth second, or 42 milliseconds, in duration. 16 frames constitute one foot of 35 m.m. film and one foot in the time reference herein. For example, a certain word of animation data may be intended for transmission to a channel circuit during the fourth foot and eleventh frame time (or 75th frame time.) This indicates that the data word is to be removed from disc and transmitted to an output circuit at any point during a 42 millisecond time span beginning about 3.08 seconds after the start of data transmission, assuming that data transmission started immediately and the show control unit is operating at the rate of 24 frames per second. However, since other frame rates than 24 frames per second may be utilized in the show control unit, there is no equivalence between foot and frame members and seconds or minutes which remains constant, except that one frame is generally considered to be 42 milliseconds, or one twenty-fourth second, in duration.

In the preferred embodiment, one show control unit may provide data for a maximum of 1,000 addressable output circuits or channels. The total number of channels defines a show. Data is transmitted to the output circuits over one to four show control transmitters. Output circuits controlled by any one show control transmitter constitute a sub-show. Therefore, a sub-show may include a maximum of 250 addressable channels and a show a maximum of four sub-shows, or 1,000 addressable channels. More channels may be controlled by this invention, of course, by operating two or more show control units from the same audio tape.

Within each sub-show, each output circuit is assigned a unique address or channel number. Accordingly, each unit of animation data stored on disc must be referenced by three numbers: the foot and frame number; the channel number or address; and, the show control transmitter number. By checking these three numbers, show control unit logic circuitry controls the transmission of one animation data word to a single channel circuit.

The initial track of the first disc is termed a directory track. It contains pointer information to aid in the location of animation data stored on other tracks and discs. All other tracks on all other discs may contain animation data.

All animation data stored on disc is located by an initial search of the directory track. The format of the directory track is shown in FIG. 4. Referring to that Figure, the directory track contains up to 255 sequentially recorded foot and frame numbers 160, 161, 162, 163. Each foot and frame number comprises 18 bits, 16 bits of data and two parity bits.

First foot and frame number 160 is the lowest foot and frame number associated with animation data on the first data track. Similarly, second number 161 is the lowest foot and frame number associated with animation data on the second data track. Each sequential directory track foot and frame number, then, references a foot and frame number on the correspondingly numbered track. Last word 163 references the last, or 255th, disc track.

It should be noted that there will only be as many foot and frame numbers on the directory track as there are disc tracks utilized. If only one disc is used, 63 foot and frame number will appear on the directory track if the disc is fully utilized.

The directory track is divided into sixteen 256 word sectors. The entire directory track information is written in each of the 16 sectors of the directory track. Reading of the entire directory track, therefore, can be accomplished in only one-sixteenth of a revolution of the disc after an initial foot and frame number passes a reading head.

FIG. 5 illustrates the format of a block of animation data for a single show control transmitter in a single frame time. There are so many data words or units of animation data in a block as there are output circuits which will receive data in a sub-show during that frame time.

Each data block is preceeded on disc by three overhead words 165, 166, 167. Initial overhead word 165 is comprised of two eight bit bytes 170, 171, followed by parity bits 172, 173. Byte 170 contains a code number, 03 in the preferred embodiment, which indicates to the show control unit that second byte 171 contains a bit designating the show control transmitter to which the data following in the block as to be routed. Parity bits 172, 173 are for the usual purposes and are associated with the eight bit bytes immediately preceeding.

Byte 171, in the preferred embodiment, contains a single bit, the position of which indicates which show transmitter is to receive the data following in the block of FIG. 5. It will be recalled that there are, in the preferred embodiment, one to four show transmitters. Each transmitter passes data to one sub-show, a maximum of 250 output circuits.

Second overhead word 166, like the first, is comprised of two eight bit bytes 175, 176, each followed by parity bits 177, 178. Byte 175 contains a binary number, 01 in the preferred embodiment, which identifies the number in second byte 176. Byte 176 contains the most significant half of the foot and frame number corresponding to the data following the three overhead words.

Third overhead word 167 is also comprised of two eight bit bytes 180, 181, followed by parity bits 182, 183. Byte 180 contains a number, 02 in the preferred embodiment, which identifies byte 181 to the show control unit as containing the least significant half of the foot and frame number referencing the data following. Bytes 176 and 181 then, together contain a sixteen bit foot and frame number.

Following the three overhead words are up to 125 eighteen bit data words such as shown at 185, 186. The format of each data word is identical. An initial eight bit byte 188 contains an address corresponding to the number of the output circuit which is to receive the data in second eight bit byte 189. Each byte 188, 189 is followed by a parity bit 190, 191.

Byte 188 may contain any number, in the preferred embodiment, between 06 and 256. Numbers 01 through 03 are utilized in the overhead words. Number 04 and 05 are reserved control codes having a significance which will be explained in connection with the show control unit. In addition, a byte consisting of all zeroes are not useable. There may be, therefore, up to 250 unique addresses contained in byte 188. The 125 data word limitation in the data block is created by the limitation of core in the show control unit as will be explained below, as well as the limitation imposed by the show control transmitter bit rate.

Data byte 189 may contain any number from all zeros to 255 (decimal). If the output circuit which is to receive the data is an analog (proportional) circuit, the eight bits will be converted to a single analog level. If the output circuit is discrete (on-off), each of the eight bits may be used to turn on or off a discrete device such as a light switch or electric motor.

Each data block, then, is comprised of a maximum of 128 18 bit words. The initial three are always overhead words. Following the overhead words, from one to 125 data words appear.

A single data track contains serially written data blocks. Although the track is generally written in ascending order of foot and frame numbers, this need not be the case. All that is necessary is that the equivalently numbered foot and frame number of the directory track be the lowest number found on that track.

Each eight bit data byte, therefore, is referenced by three numbers. The first is the address preceeding it in the data word. The second is the foot and frame number contained in the second and third overhead words. And, the third is the show transmitter bit contained in the first overhead word. By reading these three reference numbers, logic circuitry directs each unit of data and its associated address to its proper channel circuit.

SHOW CONTROL UNIT

Animation signals, including control signals and animation data, for operating shows are delivered from the show control unit, illustrated diagrammatically in FIGS. 6 and 7. It is the function of the show control unit to receive a foot and frame number from one of a plurality of sources and transmit animation data corresponding to the entered foot and frame number from disc storage to the proper output circuits. Transmitted animation data is delivered to remote terminal units where it is used to position animated figures and operate discrete devices.

There are four modes of timing operation of the show control unit. Each mode differs only in the manner in which a foot and frame number is supplied to the unit. As discussed above, a foot and frame number is the basic timing unit utilized in this invention.

In the 16 bit binary foot and frame number utilized herein, both the total frame number and the foot and frame numbers appear. The total frame number may be obtained by considering the entire 16 bits. Foot numbers are obtained by considering only the 12 most significant bits. Frame numbers within feet are obtained by considering the four least significant bits.

Of the four modes of operation of the show control unit, the audio synchronization mode is most often used. Therein, a timing track is sensed from an audio tape which also carries the sound recordings for the show. The timing track, recorded in synchronism with the sound recording, is decoded by a time code translator to foot and frame numbers.

In the second, or internal, mode, a binary counter is incremented 24 times a second by a clock. The foot and frame number changes at the clock rate.

The third mode is the external mode. A 16 stage binary counter is incremented from an external source at any rate from zero to 24 times per second. The external source may be simply a manually operated button for test purposes.

In the fourth mode, an asynchronous timing signal is used. For example, in those shows where viewers are transported through in vehicles at an asynchronous rate, segments of a show may not be started until the transporting vehicle trips a switch in passing a certain point. A signal from the switch is sent to the show control unit which causes a counter in the asynchronous timer to begin to supply the proper foot and frame numbers for that segment. As will be explained in detail below, this mode may be used in combination with certain operational codes on disc which control either a pause until the next signal is received and a resetting of the asynchronous timer counter to zero. If the latter, the animation sequences are thereby repeated as each vehicle trips the switch. In the preferred embodiment, up to twelve show segments may be used.

The most common mode, the audio synchronization mode, will be discussed first. Signals, both audio and timing, are obtained from a multi-track audio tape by playback equipment. On the multi-track tape, all tracks but one contain sound recordings. In the animation of a band, for example, each audio track carries the sound recording for each instrument or group of instruments. The single non-audio tape track carries timing signals which are utilized as the synchronizing source by the show control unit. As will be explained in connection with the core storage unit, it is necessary that the timing signals be recorded on the audio tape one frame time, or one twenty-fourth second, ahead of the corresponding audio signals. This signal delay is provided for in the recording of the audio tape.

Timing signals recorded on the audio tape are amplitude modulated on a 4.8 kilohertz carrier wave. Binary bits are recorded on eight cycle sections of the carrier as shown in FIGS. 11, 12 and 13. In each of the three figures, eight cycles of the carrier wave 200 are shown. FIG. 11 illustrates the method of encoding a binary zero on the timing track. Two cycles 201 of the carrier wave are increased in amplitude to a constant value. Encoding of a binary one, as shown in FIG. 12 is accomplished by increasing the amplitude of the first four cycles 202 of an eight cycle section.

Timing data recorded on the audio track includes foot and frame numbers. A new number appears every frame time or one twenty-fourth second at the proper tape speed. To indicate the appearance of a new number, a marker signal is recorded on the timing track. Encoding of the marker signal, as shown in FIG. 13, is accomplished by increasing the amplitude of the first six cycles 203 of an eight cycle section of carrier.

Accordingly, every frame time, the timing track has recorded a marker signal comprised of six amplitude increased cycles in an initial eight cycle section of carrier. Thereafter, coded ones and zeroes follow in eight cycle sections until a new marker signal is recorded, one twenty-fourth second later.

Timing information encoded according to the above format consists of a foot and frame number and a show number every frame time. A new foot and frame number, then, is recorded every single frame time. Each foot number is encoded with sixteen binary bits with a maximum footage of approximately 4,095. Since there are sixteen frames per foot, the first four bits may be interpreted as frame numbers. At the audio tape speed used, maximum tape footage yields a show of approximately 45 minutes in length.

As stated above, each foot and frame member on the timing track is followed by a show number which is the same throughout the tape. Each show number consists of eight bits which are, of course, unique to each show. In addition to aiding programmers and animators in the preparation of the tape, the show number is displayed on the show control unit control panel.

Referring to FIG. 6, as timing track signals are read by playback unit 205, sound signals are also sensed and sent to the show area over audio line 206. While a single audio line is illustrated, it is understood that a plurality of lines may connect playback unit 205 to the remotely located animated presentation.

Successive units, then, of the timing track on the audio tape consist of an initial eight-cycle synchronizing byte encoded as explained above. The synchronizing byte, which occurs every one twenty-fourth second, or every 42 milliseconds, indicates to time code translator 207 that a new foot and frame number is following. Following the foot and frame number is the show number which is routed to show control unit panel 208 and displayed.

As may be readily appreciated, the marker byte, foot and frame number and show number occupy all of the 42 millisecond unit of the timing track. The marker byte utilizes eight cycles, the foot and frame number 128 cycles and the show number 64 cycles. Since this sequence repeats 24 times per second, 4,800 cycles of carrier are fully occupied with coding each second.

Time code translator 207 receives a marker or synchronizing pulse and foot and frame numbers serially from playback unit 205 over lines 210. Translator 207 may receive serial time codes in either a forward or reverse direction. The forward direction is the mode of operation with the show control unit. The reverse direction is used when the time code translation is operating in conjunction with the computer. The reverse operation will be explained below.

Serially received timing data from line 210 is shifted into the forward shift register in the time code translator. When the shift register is completely filled, its contents are transferred to the translator output register. From the output register of translator 207, the foot and frame number is supplied to frame counter 211, frame error comparator 212 over parallel lines 213 and to display lights located on the translator control panel (not shown).

When operating in the internal mode, frame counter 211 is incremented by pulses from 24 p.p.s. clock 215. The clock generates timing pulses at frame rate, or every 42 milliseconds. To initiate operation in the second mode, switch 216 is turned from the position shown in FIG. 6 to output terminal 218 of clock 215. With each successive pulse from clock 215, the foot and frame number contained in counter 211 is automatically incremented by one count.

Operation in the external mode is initiated by changing the position of switch 216 from the position shown in the Figure to terminal 220. With each pulse received from external source 221, counter 211 increments by a single frame.

The fourth timing mode utilizes asynchronous timer 600. In many animated presentations, it is necessary that the presentation be divided into segments, with each segment operated at an asynchronous rate. For example, in some presentations, viewers are transported therethrough in vehicles. So each vehicle enters the area in which a show segment can be viewed, a switch is depressed, triggering the show control unit to output animation data for that segment.

Asynchronous timer 600 will be explained in detail in Section VI-N, herein. For the explanation at this point, it is sufficient to understand that starting signals are transmitted to timer 600 over up to twelve lines 601, 602. Each such line starts a preset counter. Each counter output is scanned and outputted over parallel lines 603.

Lines 603 are connected to lines 213 in place of time code translator 207 via a connector (not shown) when the asynchronous mode is used.

A timing pulse of 96 p.p.s., rather than the usual 24 p.p.s., is generated within timer 600 and outputted over line 604. As will be explained, the timing pulse determines the rate at which data is loaded into core and removed from core.

As will be explained below, entry of a new foot and frame number in frame counter 211 initiates a sequence in the show control unit which ends with transmission of data to a remote show area in most cases. In the most common mode of operation, successive foot and frame numbers are obtained via time code translator 207. In this mode, frame counter 211 increments its count by one each frame time or 42 miliseconds under control of an internal 24 p.p.s. counter. Contents of the output register of counter 211 are applied to one side of fram error comparator 212 over parallel lines 225. At the same time, the output of translator 207 is applied to the opposite side of frame error comparator 212 over lines 213.

Receipt of the marker pulse (24 p.p.s. pulse) from line 227 by bypass logic 231 controls a comparison of the two foot and frame numbers entered in comparator 212. An "equal to" comparison indicates that the foot and frame number generated within frame counter 211 is accurate and the foot and frame number is usable. Occurrence of this condition turns line 228 on forming one input to an AND gate for enabling the output of counter 211. The foot and frame number contained in the counter is then passed to frame shift register 230 over parallel lines 229.

Absence of an "equal to" comparison by comparator 212 indicates an error in the foot and frame input or in the number generated within counter 211. Bypass logic 231 counts the number of consecutive unequal comparisons and, upon reaching four, controls counter 211 via line 234 to be sideloaded over lines 213 with the next foot and frame number received from translator 207. Thereafter, the comparison sequence resumes in the manner described above.

For purposes to be described, the frame synchronizing pulse (24 p.p.s. or 96 p.p.s., the latter when in the asynchronous mode) is utilized throughout the show control unit. The pulse is outputted from bypass logic 231 over line 238. In the time code translator (audio synchronization) mode, switch 216 is in contact with line 238 at terminal 240 and makes the synchronizing pulse available throughout the show control unit over line 241. In the asynchronous mode, switch 216 is in contact with line 604 at terminal 605, also making the pulse available throughout the unit over line 241.

Line 244, turned on by ganged switch 245 in the time code translator mode, enables bypass logic 231. In other modes, line 244 is off and bypass logic 231 thereby inoperative. In those modes, bypass logic 231 does not operate to side load frame counter 211.

Assuming an "equal to" comparison by comparator 212, frame counter 211 outputs its foot and frame number upon receipt of the synchronizing pulse over line 246. Line 246 and line 228 are AND'ed to enable the output of counter 211. Valid foot and frame numbers are controlled thereby to be transferred to frame shift register 230 over parallel lines 229. Register 230 is essentially a side-loading parallel to serial converter. Its function is to serially feed foot and frame numbers to comparator 250 for comparison with foot and frame numbers on the disc directory track and the disc data tracks as will be described.

Receipt of a new foot and frame number is indicated to the show control unit logic by the synchronizing (24 p.p.s. or 96 p.p.s.) pulse which appears on line 251. Receipt of this pulse controls show control unit logic 256 to initiate a search of the directory track on the first disc. The purpose is to locate data recorded in the discs referenced by the same foot and frame number received from frame counter 211.

As explained in connection with the discussion of the disc data format, the disc directory track contains, written sequentially, the lowest foot and frame number of the correspondingly numbered data track. For example, the 53rd directory track number contains the lowest foot and frame number contained in the 53rd data track.

In order to minimize the time required to read the directory track, identical directory track information is written in 16 identical segments. Each segment contains information relating to one of 255 data tracks. There are, therefore, 256 words in each directory track segment. The purpose of the extra word will be explained below. Each track of the disc memory used in the preferred embodiment of this invention is capable of storing 4,096 18 bit words. Since the directory track consists of 16 identical segments, all directory track information may be read in one-sixteenth of a revolution of the disc.

Each directory track segment is preceeded with a timing pulse or segment mark. Upon receipt of the line 251 synchronizing pulse, the show control unit disc controller switches to the directory track, the first track of the first disc. Thereafter, the controller waits for a segment mark. When the mark is sensed, indicating that initial directory track data follows, the first bits are fed serially over data line 255 to comparator 250.

Data line 255 carries, in serial bit form, all data read from disc by the show control unit. The track data is also fed to output register 259 and parity detector 257. In a manner to be explained below, the directory data is not automatically passed to the output from register 256.

Disc parity detector 257 continually checks disc data for proper parity. If an error is found, detector 257 turns on line 258. Line 258 is connected to the input of a discrete scanning unit in the monitor system as will be later described. Additionally, in the preferred embodiment, line 258 turns on a light on control panel 208 to indicate the disc parity error.

As explained in connection with the explanation of the disc data format, each data word on disc is made up of 18 bits. The ninth and 18th bits are utilized as parity bits. Parity is checked at two points in the show control unit, disc output and core output. In the event of a parity error in data transferred out of disc, the fact is simply indicated. As will be explained below, however, if a parity error is detected in data outputted from core, the data is not transmitted further. In the preferred embodiment of this invention, odd parity is utilized. That is, the number of bits in a byte, including the parity bit, will always be odd.

During comparison of foot and frame numbers by comparator 250, track counter 260 counts the number of foot and frame numbers read from disc to comparator 250 over line 255. With each "less than" or "equal to" comparison, counter 260 is controlled to increment by one count. Since the sequential position of the directory track foot and frame numbers are the same as the number of the disc track they reference, track counter 260 holds the number of the track immediately before the track of the foot and frame number being compared in comparator 250. Accordingly, when a "greater than" comparison is reached, track counter 260 holds the number of the disc track wherein the data corresponding to lesser foot and frame numbers is located.

Comparator 250 continues to comapre directory track foot and frame numbers with the foot and frame number supplied by counter 211 until it is determined that the number from the directory track is greater. Comparator 250 then turns on "greater than" output line 262. At that point, track counter 260, having been incremented after the prior comparison step, holds the number of the disc track (up to 255) in which data corresponding to the foot and frame number entered from frame counter 211 appears.

The directory track contains 256 words for referencing the 255 available disc tracks. The last word consits of all ones and is reserved for those instances when data is located on the 255th disc track. It is, in effect, a forcing number utilized when the desired data is located on the last disc track.

Each foot and frame number on the directory track in contained in an 18 bit word. The first half of the number is in the first eight bits followed by a parity bit; the second half is in the second eight bits followed by the 18th bit, also a parity bit.

There are two additional tracks on disc which are recorded thereon by the manufacturer. The first contains the bit clock and the second a word length track. The disc outputs two marks for each data word, denoting the beginning and the end of the word. To allow sensing time for the word mark pair, a ten bit gap exists on disc between each data word. In effect, then, a single word stored on disc is comprised of 28 bits with 18 bits of data and 10 bits of gap.

In the worst case, then, the directory track search must read out and compare all 256 directory track numbers, or 4,608 bits. At the standard disc read rate of 3 million bits per second, this longest comparison and search requires approximately 2.15 milliseconds of the 42 millisecond frame time.

Throughout the discussion of the show control unit, it will be stated that comparator 250 makes comparisons of various foot and frame numbers. In each case, the final decision as to identity is made during the last bit time, that is, during the time the last parity bit is being read from disc.

When "greater than" line 262 is pulsed, show control unit logic 256, via the disc controller, begins to read data from the track number indicated by track counter 260. As explained in connection with the explanation of the disc data format, each block of data corresponding to a given foot and frame number is preceded by three overhead words.

As each word is read from one of the discs 265, it is supplied, serially by bit, to detector 257, comparator 250 and register 259, a serial to parallel converter. Upon being filled by an eighteen bit word from disc, it outputs the word via parallel lines to 18 bit register 270 (FIG. 7) and instruction decoder 271.

Referring to FIG. 7, the function of instruction decoder 271 is to check each word delivered from disc for special operational codes. Three codes, 01, 02 and 03 in the preferred embodiment, are reserved for the initial overhead words, as explained in connection with Section VI-C, herein. A fourth operational code, 04 in the preferred embodiment, controls a halt if it is read from disc. An external signal from external update logic 221 (FIG. 6) is required to restart the show control unit. The fifth operational code, 05 in the preferred embodiment, also halts the show control unit. In addition, however, it causes frame counter 211 to be reset to zero. Again, an external pulse must be received to restart the unit.

Either code may be utilized in the external mode. Data is outputted from disc until one of the operational codes is encountered which controls a halt. Thereafter, the show control unit may be restarted by another signal from the show area or any pulse source. Whether it restarts at the next sequential position or resets to zero and repeats the data depends upon the code used.

In addition, the last operational code may be recorded on disc to end a show. Receipt of this code in any mode controls a halt of the show control unit and a resetting of counter 211 to zero.

Since the operational codes appear in the first half or address half of each data word, the numbers assigned to them may not be assigned to output channels. As will be seen in connection with the description of remote terminal units, the address portion determines the output circuit to which data in the second half of the word is delivered. Accordingly, the eight bit address portion may address 256 (2 ⁸ ) outputs less the five reserved operational code numbers. The size limitation of core utilized in the preferred embodiment, however, sets a maximum of 250 output channels per show control transmitter. Since this core limitation decreases the number of possible output channels by only six, the effect of the core limitation is negligible.

After a search of the directory track locates a directory track foot and frame number greater than the number inputted from counter 211, "greater than" line 262 is turned on. This causes show control unit logic circuit 256 (FIG. 6) to begin to read data from the track indicated by track counter 260.

The initial data word supplied serially on line 255 is an overhead word. Decoder 271 (FIG. 7) recognizes the unique code, 03 in the preferred embodiment, as the overhead word containing code in the second half indicating to which show control transmitter data following is to be supplied.

There are a maximum of four show control transmitters. Since the initial overhead word determines which of the four will receive data and any unit of data may be routed to one of 250 addresses, the show control unit can direct data to a maximum of 1,000 addresses.

It must be noted that, although there is a maximum of four discs and show transmitters, there is no other relationship between them. Any one disc may transmit data to any show transmitter. Similarly, all four discs may transmit data to a single transmitter.

Referring to FIG. 7, when the initial overhead word is received, decoder 271 turns line 273 on, controlling comparator 250 (FIG. 6) to not compare that word. At the same time, core address lines 275, 276 inform load address counter 280 which of the four core memory sections is to receive the data following. Since each of the four sections may unload data to a single show control transmitter, it is at this point that the sub-show to receive data is identified.

Core memory utilized in the show control unit in the preferred embodiment is a Series FI-3 manufactured by Ferroxcube Corporation of Englewood, Colorado. In the system of this invention, it is divided into four sections of 256 words each, with a total capacity of 1,024 words. Each section is in turn halved to 128 18 bit word halves. At any one frame time, one half unloads data to a shown control transmitter. Since the three overhead words are transmitted, only 125 data words may be outputted. This is the source of the 250 words per subshow limitation.

It was explained in connection with the explanation of disc data format (Section VI-C) that each set of overhead words containing a foot and frame number is followed by a maximum of 125 data words. This number, as stated above, is a result of core limitation in the particular model used. Therefore, it is possible only to update 125 channels during any one frame time per show control transmitter.

Each core section (two halves, 256 words) supplies data to a single show transmitter. The first overhead word, then, determines which of four transmitters will be supplied data by controlling load address counter 280 to address the proper core section via lines 281.

The halves of each core section are alternately loaded and unloaded during each frame time. Therefore, while decoder 271 determines which secton of core 290 is to receive data, load address counter 280 determines which half of the section will be loaded. Core addressing, then is controlled by both instruction decoder 271 and load address counter 280.

It will be recalled that each half section of core has a 128 word capacity while only 125 words of storage is needed for data. This is because the three overhead words are transmitted as data in order to save the hardware necessary to delete them. Remote terminal units which receive the overhead words as data treat them as such. However, since numbers in the first, or address, portions of the overhead words are not assigned as addresses to output circuits, the overhead words are ignored at the receiving end.

Since each section half may receive data while the other section half transmits, a change is made every frame time. Core half control 285 receives the frame synchronizing pulse over line 286. Control 285 determines, via control line 287, which half section of core will be addressed by counter 280.

It is at this point that the one frame delay in data occurs, as data read into core in any one frame time is not transmitted until the next frame time. It will be recalled that this delay is compensated for by recording timing signals on the audio tape one frame time ahead of the corresponding sound track recording.

Returning to the point in time when the first overhead word is read from disc, it is fed to parallel output register 259 (FIG. 6). Bits enter register 259 at the disc bit rate of 3 million bits per second. Since an 18 bit word is supplied before it is read out of register 259, however, the word rate from register 259 to core 290 (FIG. 7) is one-eighteenth disc rate.

After the first half of the initial overhead word is supplied to register 259 (FIG. 6), the eight bits are outputted to decoder 271 (FIG. 7) via parallel lines 268. During ninth-bit time, decoder 271 recognizes the first overhead word and disables comparator 250 via line 273 from comparing the next nine bits. This is done because the bit position of the second half of the overhead word might be mistaken for half of a foot and frame number by comparator 250 were it not disabled. Decoder 271 then receives the second half of the initial word. In response to the second half, control lines 275, 276 select a core section, as described above, for the data following, should it be transmitted.

When the second overhead word is read from disc, it is routed to comparator 250 (FIG. 6), detector 257 and register 259. Upon receipt of the first eight bits, decoder 271 (FIG. 7) recognizes the operational code and enables comparator 250 via line 273 (FIG. 6) to compare the second half of the second overhead word with the most significant half of the foot and frame number entered from counter 211. If the comparison is equal, line 292 is turned on, informing show control unit logic circuits 256. Receipt of the second overhead word also causes the first to be stepped from register 259 into register 270 (FIG. 7).

Similarly, the third overhead word is received by register 259 (FIG. 6) and causes decoder 271 to control a comparison of its second half with the least significant half of the foot and frame number entered from counter 211. Also, the third overhead word causes the first word to be stepped into register 294 via lines 295 and the second word to register 270. At this point, all three overhead words are held in the three parallel registers 259, 270, 294.

If the two comparisons were not equal, line 292 is held off, indicating that the overhead words contained a foot and frame number not equal to the foot and frame number entered by counter 211. The following data words are read in the sequence described above. The first half of each is checked for operational codes and the word stepped through the parallel registers. Nothing is inputted to core, however, because address counter 280 (FIG. 7) has not been so instructed by memory control 297. Each word, therefore, is lost at the output 303 of register 294.

This search and compare process continues until comparator 250 locates a foot and frame number in the overhead words on disc equal to the number entered from counter 211. When this occurs, "equal to" line 292 (FIG. 6) is held on. At this point, register 294 (FIG. 7) contains the first overhead word. Memory control 297 is enabled via line 298 by show control unit logic circuits 256. Control 297 then enables address counter 280 via line 299 to address the core section determined by decoder 271 and the section half determined by core half control 285. The data read from disc is then loaded into core via lines 303.

The function, then, of parallel registers 259, 270, 294 is to retain overhead words read from disc until it is determined whether the data following should be loaded into core.

It is recalled that a foot and frame number is loaded from counter 211 each frame time and held in register 230. While only 125 data words may follow a single set of overhead words, a new set of overhead words may follow the first set and contain the identical foot and frame number but a different show transmitter bit. If this occurs, equal line 292 is held on as the second set of overhead words is read from disc. Decoder 271 (FIG. 7), however, controls address counter 280 to load the following data in a different section of core. The second data block will then be sent to a different show control transmitter within the same frame time.

In this way, while a single show control transmitter can update only half, of 125, of its output channels in a single frame time, all four transmitters can update a maximum of 500 channels in a single frame time.

Following the first "equal to" comparison, data continues to be read from disc into core as long as equal line 292 is held on. When a following set of overhead words is read containing a new foot and frame number, equal line 292 goes off and the data, though shifted through parallel registers 259, 270, 294, is not entered into core.

It should be noted that while foot and frame numbers are ordinarily recorded on disc sequentially, this does not have to be the case. Within each frame time, an entire disc track is read searching for equal foot and frame numbers.

The above sequence is repeated each time a new foot and frame number is entered from counter 211, that is, 24 or 96 times each second. It should be noted that for some entered foot and frame numbers, no disc data will be located. This is because of the casting out of redundant data under software control during the preparation of the data discs, as will be explained below in connection with the discussion of generation of animation data. No data will appear for a given channel when there is no current update, that is, a change in data. In the preferred embodiment, however, every channel is updated at least every 30 frames. This occurs even though the updating data for a given channel is unchanged from the last sent. The purpose of the thirty frame automatic update is to restore digital data and to return any hydraulic output which may have moved from its proper position.

SHOW CONTROL TRANSMITTER

Animation data and associated addresses outputted from core is supplied to one of up to four show transmitters. Each transmitter supplies data for up to 250 channels or addresses. It is the function of the show control transmitters to receive data words parallel by bit at core rate and translate them to serial data at the data transmission rate. In addition, the transmitters generate three timing signals for use by other units of the system.

As exlained in connection with FIG. 7, animation data is loaded into core 290 under control of three logic circuits. Load address counter 280 is incremented by a signal derived from a timing pulse to load data into adjacent core addresses.

Similarly, unload address counter 300 is advanced sequentially. Its advancing pulse is derived from the core timing pulse. Accordingly, the load and unload address counters operate asynchronously with respect to each other. In addition, unload address counter 300 is controlled by core half control 285 via line 301 and memory control 297 via line 302.

Data transferred out of core appears on parallel lines 304. Core parity detector 305 checks the outputted data for proper parity. When parity is found to be proper, AND gate 306 is enabled via control line 308 to pass the data to one of the show transmitters. If a parity error is found, line 310 switches on a control panel light and also closes a relay which serves as an input to the monitor system. Also, detection of a parity error holds control line 308 off, which serves to stop the data word at AND gate 306. In this way, words with improper parity are not transferred to the show control transmitters.

As will be explained in detail below, unload counter 300 is controlled to address and read out a data word when so requested by one of the up to four show transmitters. When a word is requested by a transmitter, the core unload sequence is initiated by memory control 297.

Each section of core supplies animation data to a single one of a maximum of four identical show control transmitters. Each show transmitter in turn, supplies data to a maximum of 250 output circuits, or addresses. It will be recalled that each section of core can output a maximum of 128 words. Three of the words are the disc overhead words. Since the most significant halves of each of these words contain numbers not corresponding to any channel address, they are lost in the remote terminal units. Therefore, each section of core outputs a maximum of 125 words of animation data. Two core sections supply data to a single transmitter, supplying thereby the 250 words maximum. FIG. 8 illustrates one of the show control transmitters utilized in this invention.

Referring to FIG. 8, transmitter timing is controlled by clock 315. Information bits are transmitted by the show transmitters to remote terminal units at a rate of 70 kilohertz. This rate is set by clock 315 which generates shift pulses of that frequency. The shift pulses are applied as stepping signals to shift register 318 via line 319.

Register 318 side loads from lines 320, as will be explained below. Contents or register 318 are constantly stepped out serially over line 333, whether or not register 318 contains animation data. In those instances where no animation data has been loaded into register 318, all zeros are transmitted to the remote terminal units. The show control transmitters, therefore, are constantly outputting to the remote terminal units.

Clock 315 also supplies the 70 kilohertz signal to bit counter 325 over line 326. Counter 325 counts the incoming pulses and turns on line 322 during the eighteenth, or last, bit time.

Register control logic 327 receives the pulse signifying occurrence of the eighteenth bit from counter 325 and interprets the ending of that bit as an indication that shift register 318 is empty at that point. This occurs since the prior bits had been shifted out by control line 319. It is this occurrence which initiates the data unloading sequence from core.

Immediately after eighteenth bit time, register control logic 327 turns on lines 328 and 330 for a half-bit time. Line 330 causes the contents of buffer register 331 to be side loaded into shift register 318. The next eighteen shift pulses on line 319 then step the contents of register 318 serially out via line 333 as explained above. This sequence repeats whether or not buffer register 331 contained animation data.

Lines 328 are four input control lines, one from each transmitter, which is connected to load-unload control 297 (FIG. 7). The short pulse on that line indicates to control 297 that the sending transmitter will accept data. Thereby, the memory unload cycle is initiated.

It will be recalled that, during any one frame time, data for more than one show control transmitter may be read from disc. In this case, the only difference in the three overhead words which head each transmitter's data is in the bit position in the least significant half of the first word. Since the foot and frame numbers of the second and third overhead words are identical and equal to the number in counter 211 (FIG. 6), the data is loaded in core. In this way, up to 125 animation data words may be loaded in each of four core sections for each of the four transmitters in one frame time.

Referring again to FIG. 8, clock 315 determines the transmitter bit rate and, thereby, the timing of the request to core via line 328 for data. Each time any one of the transmitters requests a data word from core, memory control 297 (FIG. 7) causes each of the four core sections to be cycled sequentially. If a second transmitter requests a data word during this core cycling via its request line (line 328 in FIG. 8), the request is ignored since memory control 297 will furnish a word to that transmitter automatically.

Any one of the up to four transmitters may start the core cycling. Regardless of the one to start the cycling, each of the others receives its word from core. It should be noted that the word from core may not be animation data. In those instances where not all four transmitters are to receive data, which are the majority, the words received by the transmitters from core comprises all zeroes.

Unload address counter 300 (FIG. 7) generates, sequentially, addresses of data words contained in core. At the same time the unload counter is controlled to read out the requested data words via line 302, data load line 335 (FIGS. 7 and 8) is turned on. Line 335 is one of four outputs from control 297. Each output is connected to one of four show transmitters. Line 335, or any of the three other lines, is turned on to indicate to the register control logic in one of the show control transmitters that a data word is available from core.

Upon occurrence of a pulse on line 335, register control logic 327 generates a buffer register load signal by turning on line 337. Buffer register 331 then accepts and stores the data word outputted from core.

Register 331 is utilized for the usual time buffering purpose. Data is read out of core at rates much greater than the 70 kilohertz bit rate of the show control transmitter. Register 331 holds the data word until it can be accepted by shift register 318.

The above sequence is repeated every transmitter word time, that is, upon the occurrence of each eighteenth bit generated by clock 315. It should be apparent that for each data word transmitted to the remote terminal units, many thousands of dataless words, or zeros, may be transmitted. During those times in which data is requested by a transmitter, data unload cycles are given precedence over data load cycles by load-unload control 297 (FIG. 7). Due to the speed of core cycling compared with the parallel word rate from disc, a word may be read out of core without interrupting the flow of data from disc to core in the show control units.

Data serially stepped from shift register 318 is transmitted to parity detector-generator 340. Upon the occurrence of the ninth and 18th bit, bit counter 325 controls a parity check by parity detector 340 via line 341. In the event of an improper parity count, detector 340 turns line 343 on. Line 343, in turn, turns on a parity error light on the show control transmitter control panel (not shown) and also closes a relay for communication of the fact of the parity error to the monitoring system.

Data is stepped out of detector 340 and through output gating circuits 346. No use is made of gating circuit 346 in this position within the system. As will be explained below, circuit 346 is utilized in the system of this invention at other locations. Its function will be described in connection with the description of the locations where it is utilized.

Serial data, then, is delivered by the show control transmitter over data line 350. The show control transmitter also generates three signals which are utilized in the next block in the system, the bi-phase transmitters. The first of these signals is a bit sync which appears on line 351. The bit sync is a 70 kilohertz signal. The second signal, word sync, appears on line 352. Word sync transmits a signal which appears as a pulse at the end of each eighteen bits or every word time. The final signal, which appears on line 353, is a 700 kilohertz clock signal. These signals are utilized in the bi-phase transmitters.

BUFFER EXPANDER

Throughout the data processing system according to this invention, it is necessary at various points to expand the numbers of data and timing lines. In each case, expansion is required to supply identical data and timing information to a plurality of remote terminal unit overheads without losing impedance matches. Power drop considerations require that the various remote terminal units not be simply connected in parallel. It is the function, then, of a buffer expander to accept a single input and provide three outputs, each at a power level with an output impedance equal to the input.

A single show transmitter may provide animation data for 250 output circuits or addresses. It sometimes occurs, however, that the circuits occupying the various channels are widely separated. Since the chance of inacurately transmitting data increases with the distance of transmission, it is desirable to split the data while biphase modulated rather than use lengthy lines connecting a single remote terminal unit with its widely separated output circuits. Also, as explained in connection with the discussion of FIG. 2, a single set of lines transmits data from the central computer to a plurality of animator's consoles. Since each console has a remote terminal unit, the incoming data line must be accordingly expanded.

Referring to FIG. 14, 15 and 16, the schematic of a buffer expander is shown. Phase modulated data signals are applied via line 360 to the input of amplifier 361 via transformer coupler 362. The amplifier is designed to have an accurate response at the 70 kilohertz carrier frequency. The output of amplifier 361 is applied to the primary windings of three identical transformers 364, 365, 366. Outputs of the three transformers are three data lines, each having data identical to the input and at the input power level and impedance of the input.

Similarly, bit sync and word sync lines 368, 369 are amplified to form three identical outputs, 370, 371, 372 and 373, 374, 375, respectively.

BI-PHASE RECEIVER

Data is transmitted over distances greater than several feet in this invention by a type of bi-phase coding. Quasi sine-wave signals are constructed in the phase modulation transmitter for transmission of data, bit sync and word sync information over three separate wire pairs. Bi-phase receivers, located throughout the system, accept the bi-phase data, word sync and bit sync signals and translate the three inputs to a non-return-to-zero digital code compatible with the data output circuits. Waveforms helpful in understanding the bi-phase receiver are disclosed in FIG. 26 and discussed in Section VI-O.

As is well known, non-return-to-zero digital codes use full symbol length pulses. For example, a sequential plurality of binary ones is transmitted as a constant voltage level. The bit sync signal is required in this type of transmission to mark the beginning and end of bits in the constant level data signals.

Data is transmitted over distance in this invention on double redundant lines. Two sets of lines, therefore, carry identical data and synchronizing signals (word sync and bit sync) from each show transmitter to each remote terminal unit overhead. As shown in FIG. 17, each of the two data lines 380, 381 are connected to identical bi-phase receivers 383, 384. Bi-phase receiver block 383, described herein, is identical to hose utilized throughout this system.

Referring to FIG. 17, phase modulated data, word sync and bit sync signals are applied to the primaries of transformers 386, 387, 388 over wire pairs 390, 391, 392. Wire pairs, rather than single wire lines, are utilized in the preferred embodiment to provide ground loop isolation. This is necessary since the distance in the preferred embodiment between a show transmitter and its remote terminal unit may be as much as 5,000 feet. Ground levels at two points at that distance may be several volts apart. A single line, grounded at each end, would not, therefore, transmit data reliably.

Transformer coupling is used in the preferred embodiment to provide impedance matching, d.c. isolation and transient protection. Transient conditions most often encountered in data transmission lines such as are utilized herein are caused by lightning.

Capacitances and inductances of the coupling transformers are such that they will not readily pass high voltage lightning transients. While transformers do not, of course, provide complete protection, they are effective in reducing many unwanted transients.

Phase modulated data and sync signals are applied to identical signal conditioner circuits 394, 395, 396. The conditioner circuits are amplifier squaring devices. Outputs of each are generally unipolar digital signals.

Data and word sync signals are applied to two identical conversion circuits 398, 399. The output of bit sync signal conditioner 396 is properly formatted and is used as the bit sync by the remainder of the terminal circuitry. The bit sync is a return-to-zero code so that the bit periods of the data line may be determined.

Bi-phase receiver 383 then, provides three outputs, data, word sync and bit sync, the first two in a non-return-to-zero format, over output lines 404, 405, 406. Similarly, receiver 384 provides three outputs, data, word sync and bit sync, over output lines 410, 411, 412. Since these outputs are generated from redundant inputs, they are identical except in those instances of inaccurate transmission in one of the lines.

REMOTE TERMINAL UNIT

Remote terminal units are located in the area of the animated presentation in the preferred embodiment. Their function is to receive serial animation data and associated addresses from the computer or the show control unit, convert the data to parallel form and distribute the data to output circuits in accordance with the address which accompanies each data word. In addition, the unit performs a parity check on the received data.

Animation data is received from the central computer as it is being entered at a console by an animator. From the console it is routed to the central computer where it is formatted for use by a channel circuit. Thereafter, it is transmitted to the proper channel circuit via a remote terminal unit.

As described in connection with the discussion of the show control unit, animation data is sent therefrom to a remote terminal unit during the usual operation of a show.

Each remote terminal unit initially receives data, word sync and bit sync information from a pair of redundant inputs. Both inputs are supplied to the remote terminal unit overhead. Referring to FIG. 17, the overhead is supplied redundant inputs over lines 404, 405, 406 and 410, 411, 412.

Each set of the redundant inputs is applied to one side of two sets of AND gates 415, 416, 417 and 418, 419, 420. Each trio of AND gates is enabled by either line 422 or line 423, in turn controlled by flip-flop 425. The function of the AND gates and flip-flop circuit is to pass only a selected one of the two redundant inputs. As is readily understood, lines 422 and 423 are turned on mutually exclusively. The method of controlling flip-flop 425 to select one input path over the other will be explained in connection with FIG. 18. For the description at this point, it will be assumed that line 422 is on the line 423 is off. Data input 380 is therefore gated through AND gates 415, 416, 417 on lines 428, 429, 430.

Each trio of AND gates are connected to three OR gates 432, 433, 434. The function of the OR gates is to provide a single set of lines 437, 438, 439 upon which the selected inputs will appear. Under the assumption stated above, information from data line 380 is gated out to lines 437, 438, 439.

Referring to FIG. 18, non-return-to-zero data on line 437 is inputted to eighteen bit shift register 440. Register 440 is a standard end-load and side-unload serial-to-parallel converter. Bit sync pulses, appearing on line 439, are also supplied to register 440 via line 442 and cause the data input to be stepped through the register counter stages.

Register 440 loads in normal fashion. Unloading to the various output circuits is accomplished through parallel gate 443. This gate is enabled under control of bit-per-word counter 444.

Counter 444 samples the data shifted into register 440 and enables gate 443 only if certain criteria have been met by each word. Flip-flop 448 is controlled by the word sync on line 438 and the bit snyc on line 439. Counter 444 is initialized to start counting bits inputted on line 449 by the output of flip-flop 448 on line 450.

Counter 444 counts the incoming bits from line 449. Twice during each word time, during bit 9 and 18 time (parity bits), counter 444 turns on line 460, controlling a parity check by parity check circuit 458. Line 451 is turned on during bit 18 time, enabling gate 443. This passes the data from register 440 over eighteen parallel lines 453 through gate 443. The output of gate 443 is connected to two parallel busses 455, 456. Bus 455 is connected in parallel to the data registers of a maximum of 250 output circuits to which data may be transferred. Similarly, bus 456 is connected in parallel to the address registers of the same 250 output circuits.

It should be noted at this point that enabling of gate 443 by bit per word counter 444 does not ensure that the contents of register 440 will be passed to the address output circuit. A parity check is performed by check circuit 458. The output of parity circuit 458 forms part of a data strobe signal which is AND'ed in the output circuits. For those data words having improper parity, no data strobe signal will be generated.

Parity check circuit 458 receives parity information from register 440 over line 461. Output 463 is off except when parity check circuit 458 detects a parity error in the data word inputted to register 440. The output of parity check circuit 458 is utilized for two purposes. It forms part of the data strobe signal and also, as will be explained, is used in the selection of one of the redundant data input lines.

The output of parity check circuit 458 is applied to inverter 465 over line 466. The output of inverter 465 appears on line 467 and is turned on as long as no parity error is found. The no-parity-error signal on line 467 is applied as one input to data strobe AND gate 469.

The second input to AND gate 469 is the word sync signal on line 470. Gate 469 develops an output data strobe signal, then, upon the coincidence of word sync time and no parity error. As will be explained in connection with the output circuits, the data strobe is AND'ed with the output of the selected circuit's address register to gate into the circuit the eight bits of data. The word sync signal is on for one bit time during the first bit of each 18 bit word.

Output line 463 of parity check circuit 458 also applies the parity error signal to parity error counter 472. Counter 472 is a four stage binary counter that turns on line 474 when four parity errors have been sensed. Line 463 also supplies the parity error signal to monitor input line 475. The purpose of this line is to uniform the computer, via the monitor system, that a parity error has occurred in the remote terminal unit. The monitor system is discussed in detail in Section VI-P, herein.

Counter 472 turns on line 474 when four parity errors have been counted. The output is applied to one input of OR circuit 480.

Referring to FIG. 17, the output of the OR circuit is connected to flip-flop 425 via line 481. As explained in connection with that FIGURE, flip-flop 425 determines which of the two redundant data input lines is selected. Following from the assumption stated above that data was initially being received from data line 380, flip-flop 425 would turn that data line off by disabling AND gates 415, 416, 417 when line 481 is turned on. At the same time, AND gates 418, 419, 420 are enabled via line 423, connecting data line 381 to OR gates 432, 433, 434 via lines 483, 484, 845. The redundant data input lines are switched, then, when four successive parity errors are detected by the remote terminal unit in the data received from the enabled data line.

An additional control over which of the redundant data inputs is utilized, referring to FIG. 18, is made in AND gates 487, 488. These gates check the proper relationship between bit eighteen time and the word sync pulse, which is on during bit one time.

Line 490 is on during 18th bit time for each data word shifted into register 440. Line 490 is applied as one input to AND gate 487. The second input to AND gate 487 is the inverse of the word sync signal or, in logic terms, not-word-sync. This signal is obtained from line 491 and inverter 492 which has its input connected to word sync line 438.

AND gate 487, then, will turn output line 494 on if there is a time coincidence of the 18th bit of a data word and no word sync. This is, of course, an error condition.

Similarly, AND gate 488 is supplied the inverse of bit 18, or, in logic terms, not-bit-18, from inverter 495. The second gate input is the word sync signal on line 496. AND gate 488 turns its output line 498 on if no bit 18 signal appears during word sync time.

OR gate 499, then, turns on its output 500 whenever either AND gate 487 or AND gate 488 develops an output. Line 500 is supplied as the second input to OR gate 480.

Line 481, therefore, controls flip-flop 425, FIG. 17, to switch whenever four parity errors are sensed or when any bit 18 fails to occur during a word sync time. Each time flip-flop 425 switches, input data is taken from the opposite redundant input line.

Monitor input line 502 (FIG. 17) is utilized to inform the computer, via the monitor system, of a switch of input lines. The monitor system will be explained below.

The outputs of the remote terminal unit, then, are two parallel nine channel buses and the data strobe. Each bus is connected in parallel to either the data register inputs or the address register inputs of up to 250 output circuits.

ANIMATION OUTPUT CIRCUITS

Introduction

Each show control unit (FIGS. 6 and 7) may supply data to a maximum of four show transmitters (FIG. 8). Each transmitter may be connected to as many remote terminal units (FIGS. 17 and 18) as desired. All remote terminal units connected to a single transmitter, however, may supply data to a maximum of 250 animation output circuits.

Output circuits are of two basic types: proportional (analog) control circuits and discrete control circuits. The first type provides analog voltages for proportional control of figure movements. An example of this is an analog voltage which positions a figure's arm. The second circuit type are those which operate on-off (discrete) devices such as lights, curtain motors, and so forth.

The bit frequency utilized by the data transmission devices of the preferred embodiment of this invention is 70 Kilohertz. It therefore requires 257 microseconds to transmit each 18 bit data word to each remote terminal unit. Since there are 42 milliseconds in a single frame time, a maximum of 163 words could be transmitted. In the preferred embodiment, however, only a maximum of 125 output circuit per show transmitter are updated in a single frame time. If all 125 channels in a given frame time are updated, as much as 32 milliseconds can pass between the first channel update and the last. It has been found, however, that this time delay is not noticeably removed from the audio synchronization. It has been found that audio-visual resolution of one-twelfth second is acceptable.

PROPORTIONAL CONTROL CIRCUITS

Referring to FIG. 19, a schematic diagram of a proportional control circuit is illustrated. Up to 250 such unique circuits may be connected in parallel with the data and address busses 455, 456 and data strobe 505 of FIG. 18. As many circuits as desired may be connected in parallel to receive the same data. The function of each circuit is to accept digital information, translate it to an analog voltage level and position a mechanical part of a movable figure in accordance with that level. In the preferred embodiment of this invention, the analog voltage controls a figure via a hydraulic-electric closed loop. As will be appreciated by any person skilled in the art, however, a number of different positioning devices or systems could be substituted therefor.

Since each show control unit can supply a maximum of four show transmitters, and each transmitter can address a maximum of 250 output circuits, a complete show in the preferred embodiment may contain a maximum of 1,000 proportional control circuits. Each circuit controls one degree of movement of an animated figure. If more than 1,000 addressable circuits are required, a plurality of show control units tied to the same timing source may be utilized. For example, a single tape playback unit may supply two or more time code translators.

Within the proportional control circuits controlled by a single show transmitter, no differences are found except in the address registers. Each circuit has its unique address wired into its address register. A single proportional control circuit is selected, therefore, for each address appearing on address bus 456. If the entire 1,000 channels controlled by the four show control transmitters are occupied by proportional control circuits, there would be four circuits, one connected to each transmitter, having each of the 250 possible addresses. It will be recalled that the initial overhead word on disc contained a bit which determined which of the show transmitters would receive the associated data. A single proportional control circuit, then, is selected by the initial overhead word and eight bits of address transmitted with the data.

Referring to FIG. 19, data bus 455 consists of eight parallel lines upon which data is transmitted serially by word and parallel by bit. Each word of data outputted from parallel gate 443 of the remote terminal unit (FIG. 18) is entered in storage register 506 over lines such as 507 of the connected output circuits.

Register 506 is comprised of eight parallel flip-flops which are controlled by the eight input data lines 507 and gating line 510.

At the same time that data is supplied to data register 506 from the data bus, address bus 456 supplies the channel address to address decoder input lines 512. Address register 515 functions as a hard wired AND gate. Decoder output line 516 is turned on only when the address inputted from address bus 456 is the address of the connected proportional control circuit.

Output line 516 is AND'ed in gate 517 with data strobe 505. It will be recalled that the data strobe is only generated during a word sync time combined with no parity error.

Coincidence of the data strobe and decoder line 516 turning on causes line 510 to turn on, enabling the loading of data register 506.

Diode and resistor matrix 520 is a well known type of digital to analog converter. As is known, resistors 521 are binarily weighted. The total current through circuit node 522 is an analog value proportional to the digital value entered in register 506.

The current appearing at node 522 serves as an input to closed loop circuit 524. Operation of such a closed loop is well known so will not be discussed in detail. Amplifier 526 and inverter 527 develop a d.c. voltage and current proportional to the current through circuit node 522. This current passes through hydraulic valve coil 528 and positions it proportionately.

Hydraulic valve 530, shown diagrammatically in FIG. 19, is connected to a source of hydraulic pressure via line 531 and a hydraulic return 532. When coil 528 conducts a value of current requiring a change in position of the controlled figure, valve 530 is positioned in the correct direction. Hydraulic cylinder 535, connected to valve 530 by lines 536, 537, is controlled to move piston 538 in the proper direction and by the proper amount. Piston 538 is attached to the portion of the animated figure which the addressed circuit is to move.

Pickoff device 541 is a linear variable differential transformer manufactured by Pickering, Inc. It is excited from source 542 and amplifier 543. Pickoff piston 545 is connected mechanically to the same portion of the animated figure positioned by hydraulic piston 538. Pickoff device 541, then, develops an output on line 546 proportional to the movement of hydraulic piston 538.

Pickoff device 541 generates an a.c. output. Since it is to be used as a nulling signal to the input of a d.c. amplifier, conversion to a d.c. level is necessary. Transformer 550, converter 551 and filter 552 serve this purpose. Inverter 554 is utilized to obtain the proper polarity for the null signal on line 555.

Amplifier feedback circuit 556 is the usual oscillation damping branch. As is well known, null seeking circuits tend to oscillate without an integrating feedback.

Stroke resistor 557 sets the limits within which the figure will travel given an input voltage level.

DISCRETE CONTROL CIRCUIT

In addition to the proportional control required in the animation of a figure, discrete (on-off) circuits are also used. On-off circuits are used for such items as turning lights on and off, operating stage curtains, controlling a figure's eye to blink, and so forth.

The discrete control circuits used in the preferred embodiment of this invention are shown in FIGS. 20, 21 and 22. Referring to FIG. 20, data and address registers 570, 571 receive the parallel data and address signals over busses 455, 456. As explained in connection with the proportional control circuit discussed above, data is gated out of data register 570 when the proper address is found by register 571. AND gate 573 enables the outputs of register 570 upon the coincidence of the data strobe on line 505 and the proper address output on line 575.

Each flip-flop of the single stage data register 570 controls one of eight output circuits 577. Accordingly, the eight data bits in a single data word may control eight on-off functions of the eight output circuits.

Since a single show control unit may control up to 1,000 channels, a maximum of 8,000 discrete circuits may be controlled. In an actual animated show, of course, it is the general case that the total number of output channels is a mixture of proportional control circuits and discrete output circuits.

Operation of one of the discrete devices controlled by the circuit of FIG. 20 is controlled by entering a binary one from data bus 455.

One type of output circuit utilizing silicon controlled rectifiers is shown in FIG. 21. Transistor 580 is normally biased on by high level 581. Entry of a zero on input 582 biases transistor 580 to the off state. Entry of a one on input 582 turns on transistor 580, operating relay 584 and closing contacts 585.

Closure of contacts 585 causes the silicon controlled rectifiers to switch, completing the circuit across terminals 587, 588. Use of the two silicon control recitifers ensures that the circuit will close at the zero axis crossing of any connected a.c. source. The circuit of FIG. 21 is used when large currents must be switched.

The output circuit of FIG. 22 is used in the preferred embodiment when smaller currents are switched. As in the discussion above, entry of a binary one on the proper line turns transistor 590 on and pulses coil 591. Contacts 593 are thereby closed, completing the circuit between output terminals 594, 595.

PREPARATION OF AUDIO-SYNCHRONIZATION TAPES

In the principal mode of operation of the show control unit, units of animation data are transmitted to the controlled output circuits in synchronism with audio signals.

It will be recalled that the source of timing signals for this synchronization is the same tape on which the audio track or tracks are recorded. The tape is prepared by recording a timing track in any time code. The only requirement is that the code be capable of encoding a new foot and frame number every 42 milliseconds.

Thereafter, audio signals are recorded on other tracks on the tape. No effort is usually made to synchronize the audio signals with the pre-recorded timing track; they are simply recorded in parallel.

Audio signals recorded on the tape may be either spoken roles, music or both. The method of animating figures in synchronism with recorded spoken roles will be discussed first.

As an example, it will be assumed that a voice recording of Lincoln's Gettysburg Address has been placed on a tape having a previously recorded time track. The animator, in this example, will then animate a figure of Lincoln speaking the Address.

There are two methods of synchronizing which may be used. By supplying the audio signals to a speaker and the timing signals to a time code translator (FIG. 24, element 827), the foot and frame numbers may be displayed on the animator's console as the audio tape is played. This method is referred to as "on-the-fly" animating.

To begin this method, the animator, having defined the program, channel set and overlay numbers, depresses the AUDIO SYNC button (733, FIG. 23) on the animator's console. This causes the foot and frame numbers to be displayed on the console.

Obviously, with the foot and frame numbers changing at the rate of 24 numbers per second, it is difficult for the animator to enter some types of animation data. For example, it would be difficult to accurately enter data for mouth movement in the on-the-fly method. However, data relating to body, arm and head movements may be easily entered in this way.

As the animator listens to the replayed Address, then, he moves the data input devices (potentiometers and switches) to correspond to the spoken words. The computer stores the entered data in association with the foot and frame numbers read from the time code translator. At the same time, the computer moves the figure in accordance with the entered data. In this way, the animator can watch the figure of Lincoln move as he listens to the replayed Address.

Generally, a different method is utilized when animating detailed movement such as mouth and lip movement. Continuing with the example above, it is necessary that the figure's mouth be moved in synchronism with each syllable of the introductory phrase "Fourscore and seven years ago . . . ".

After the audio tape is prepared, the animator inserts the tape in a controllable playback device, such as a Moviola film editing device. By playing the tape backwards and forwards at various speeds, the animator can determine the exact foot and frame count beginning and ending each syllable. For example, he would record the foot and frame counts for the s, v and n sounds in the word "seven" on a written script of the speech. This would continue until the entire speech was similarly annotated.

Thereafter, by entering foot and frame numbers via the console corresponding to each syllable's beginning and ending, synchronized animation data may easily be entered.

Synchronism with recorded music scores may be obtained in the same manner. That is, the music may simply be recorded on audio tape upon which a previously recorded time track has been placed. Then, the various beats may be annotated by corresponding foot and frame numbers.

Since music is played, however, at a variable but defined rate, the annotation task may be simplified by playing the musical score at a precise rate. Thereafter, only the initial beat foot and frame number need be located. Successive numbers can be calculated by use of the known music rate.

Audio-synchronization tapes are obtained in the fashion described above. After data is entered in synchronism with recorded data, the same audio tape is used as a timing source to recall the stored data.

ANIMATOR'S CONTROL CONSOLE PANEL

All animation data entered into this system originates at the animator's control console. The console control panel includes a plurality of potentiometers and switches for data entry. Analog data is entered by the manual positioning of a potentiometer. Similarly, switches are used to enter discrete data. As described elsewhere herein, analog data is utilized for the proportional positioning of movable members of an animated figure. Discrete data is utilized to control operation of any on-off device, such as lights, curtain motors, door openings and closings, and so forth.

Also, as will be appreciated by those skilled in the art, data may be entered from other devices, such as the joystick and animating harness shown in U.S. Pat. No. 3,277,594 to Rogers et al.

In addition to the data entry devices, the console control panel includes control switches for communicating with the computer. The control switches are used to initiate computer sub-routines, control various sequences, inform the computer as to the significance of entered data and inform the animator as to steps next required in an animating sequence.

All input devices on the console panel, whether analog and digital animation inputs or control inputs, are repetitively scanned. The results of each scan are transmitted to the computer, where the data entries are augmented and properly formatted and stored on disc.

Scanning is performed by a discrete scanning unit and connected piggyback unit in each animator's console. Each unit is identical to that utilized in the monitor system. Since the scanning and piggyback units are described in connection with the monitor system, they will not be described here, except in terms of input and output.

Each discrete switch input, whether animation data or control information, is connected directly to a discrete scanning unit. The unit generates a serial output dependent upon the state of each switch.

Each potentiometer device is connected to a multiplexing analog to digital converter. Each potentiometer setting is digitized, supplied to a discrete scanning unit and transmitted to the computer for processing and storage.

Information is also sent from the computer to each of the animator's consoles. In an animating sequence, for example, lights are turned on or off on the console panel by the computer to inform the animator as to the next step he should take. Information of this type is transmitted from the computer to a remote terminal unit in the console. In addition to the data, the computer transmits address information for routing data to the proper console panel device.

Referring to FIG. 23, a console panel which may be utilized in this invention is illustrated. The panel is comprised of two sections, function panel 700 and control panel 701.

Function panel 700 is provided with a plurality of switches, such as 702, and a plurality of potentiometers, such as 703. The numbers of each shown in FIG. 23 are for convenience in illustrating only. In one version of the panel used by applicants, there are 16 switches and 32 potentiometers arranged in rows and columns. In a second version, the potentiometers are arranged in a pattern representing the figure being animated (as shown in FIG. 1). As will be appreciated, the particular arrangement used is arbitrary and one of convenience only.

Under each switch and potentiometer on function panel 700 is a switch, such as 705, and a light, such as 706. The purpose of switch 705 is to enable the associated switch or potentiometer. Since the discrete scanning unit constantly scans all discrete inputs, each device constantly generates an output from the console. The computer, however, only processes data from those switches or potentiometers having their associated switches depressed. This function is accomplished by software.

Via the remote terminal unit, the computer turns on each light 706 when it will process data from the associated device. The animator, then, may define a plurality of channels and input devices via control panel 701 for use at any one time. By operation of enabling switches 705, however, as few channels as desired may be animated at a single time.

Control panel 701 consists of a plurality of switches and lights, each of which will be described separately. Fault section 708 consists of lights which are turned on under computer control. As with all lights on the console panel, each is turned on by the computer by addressing a discrete channel circuit controlling the light (described in connection with FIGS. 21 and 22) via a remote terminal unit. Light 709, termed WAIT, is turned on by the computer when no further entry may be made via the console because the computer is processing the prior entry. Its period of illumination will, of course, depend upon the complexity of the previously entered command. The animator may proceed when the light is extinguished. INPUT ERROR light 710 is turned on by the computer when an entry by the animator is not acceptable. For example, during the animating sequence the computer will inform the animator of the type of data to be entered next. If the new data is not entered correctly, input error light 710 is switched on.

FOOTAGE-DISPLAY lights 711 are computer-controlled decimal read outs. Lights 711 are comprised of four stages 612. Each stage provides a decimal numeric display in well known fashion.

Significance of the decimal number appearing adjacent lights 711 depends upon the mode of operation of the console. When channels [output circuits] are identified during the definition mode, lights 712 display the address entered via keyboard 725. During actual animation phases, display 712 contains the current foot count of the foot and frame number.

FRAME-DISPLAY lights 713 are also computer controlled to display a decimal number. Lights 713 consist of two stages 714. The significance of the two stage decimal number depends upon the mode of console operation. During the channel (output circuit) definition mode, the number of the potentiometer 703 or switch 702 being associated with the channel number (address) appearing in lights 712 is displayed by lights 714 under software control. During the animation modes (absolute or relative) the frame count of the current foot and frame number is displayed.

DEFINITION section 718 is comprised of six illuminated pushbuttons 719-724. Each button controls a mutually exclusive task for the console. When a button is depressed, its indicator light turns on. The console remains in that task until a different task is selected by depression of another button or until RESET button 724 is depressed.

A program definition task is started by PROGRAM DEFINITION button 719. In this task, the animator defines all the parameters necessary for beginning an animation program. The animator specifies, via the numeric entry, the portion of a sub-show for which animation data is to be entered. This is accomplished by entering the starting and ending frame counts (of the foot and frame number) and the number of a previously defined channel set (to be defined below). The purpose of the foot and frame entries is to allow the computer to allocate the proper amount of disc space for the animation data to be entered.

OVERLAY DEFINITION 720 places the console in the overlay definition mode. In this mode, the animator, by entering potentiometer and switch numbers and output circuit addresses associates designated input devices with designated output circuits. The association is defined herein as an overlay.

In the OVERLAY DEFINITION task, the animator enters a set of successive sets of output circuit addresses, input device numbers and identifying data. Each set begins with a three digit number specifying the output circuit address. Numbers from 006 to 255 are allowed in the preferred embodiment. This is followed by one digit which specifies either an interpolation-type for the potentiometer or a subchannel number for the switches. As will be explained below, the interpolation type determines the type of curve defined by the computer between two entered analog values. As was explained below in connection with FIG. 20, each addressable discrete output circuit controls up to eight discrete devices or subchannels. If the input device to be associated with the specified output circuit is a switch, the one digit identifying data (1 to 8) will specify the subchannel. Finally, two digits are entered [01 through 48] to identify the input device.

Sets of such entries are continued until all input devices have been included or until the STOP button is depressed. The computer then automatically assigns an overlay number to the entered data and displays the number via lights 712. The display continues until a new command is received.

It should be noted that the animator may define as few associations in the overlay definition as desired. In many cases, because of the complexity of the animating task, the animator will define a single input device -output circuit association. Also, it should be remembered that any input device on function panel 700 can be associated with any output circuit of the same type.

CHANNEL DEFINITION button 721 allows the animator to define a set of up to 125 channel numbers in the range of 006 to 255. After input of a sequence of 125 numbers or depression of STOP button 729, the channel set definition ends. Thereafter, the computer assigns a number to the channel set as defined and displays the number via decimal read out lights 712. The channel set may be later recalled by supplying only the computer-assigned number.

Before beginning an animation task, an animator must enter the above three definitions. He first enters the parameters for the program definition followed by an overlay definition. Each of the entered definitions is assigned a number by the computer. Later, the animator may enter a previously defined number in lieu of the various detailed entries itemized above.

As will be explained, as the computer displays each number in display lights 712, the corresponding display indicator will be turned on in display group 750. For example, after an overlay has been defined, the computer displays the overlay number via lights 712. At the same time, OVERLAY light 754 is switched on to inform the animator of the significance of the numeric display.

MACRO DEFINITION button 722 is used to define a set of animation data points which may later be recalled and used in a different animation sequence. For example, a macro may be generated and stored which controls a figure to move its left arm in a particular way. If a later animating task requires the same type of arm movement, the previously entered macro can be recalled and inserted in the later task.

Another use for a macro is in instances where more than one figure is to be animated in the same way. The sequence may be entered for one figure and defined as a macro. Then, to animate the remaining figure or figures, it is only necessary to call the macro in the later task.

After depressing MACRO DEFINITION button 722, three identifiers must be entered. Via numeric keyboard 725 and ENTER button 763, the animator must enter the show number, channel set number and beginning and ending foot and frame numbers. The computer then assigns a permanent number to the macro and displays it via lights 712. At the same time, MACRO light 752 is turned on to identify the display.

When a macro is being defined, the animator enters animation data in the usual way. The macro identifiers (show number, channel set number, beginning and ending foot and frame numbers) are entered on the system's program disc and permanently stored. The animation data is entered on the data disc in the usual manner. Later, the animation data on disc, including the sequence which was designated a macro, is transferred from the disc to tape.

Accordingly, if an animator later wishes to use a previously defined macro, the tape containing the data is first loaded onto a tape transport. By then depressing MACRO CALL button 738 and entering the macro number via keyboard 725, the macro data is copied from the tape onto the data disc. This does not, of course, remove the data on the tape, so the macro may be recalled as often as desired. Also, it should be understood that data can be transferred from a first to a second position on disc using the macro technique.

Macros are an important feature of this invention. By use of the macro library, the animator can copy and insert previously defined sequences to produce a composite sequence. Macros can be combined in different combinations to create numerous animated sequences.

FRAME RATE DEF. button 723 allows the animator to select the frame rate. This defines the rate at which the foot and frame number is incremented. Within the embodiment described herein, allowable rates are 24 frames per second or any factor of 24. After FRAME RATE DEF. button 723 is depressed, the number corresponding to the rate is entered via numeric keyboard 725. At the same time, the rate in increments per second is displayed by lights 712 and FRAME RATE light 757 is turned on.

RESET button 724 allows the animator to remove any previously selected definition mode. This works in the usual way to cancel all definition entries made immediately prior.

Mode section 725 is comprised of three illuminated buttons 726, 727, 728. Each button is illuminated when depressed. ABSOLUTE button 726 controls the analog to digital converter to supply numbers equal to the absolute position of the entering potentiometer. This mode is utilized in virtually all animation sequences.

RELATIVE button 727 causes the computer to store the difference between the current potentiometer setting and the prior setting. It is used for certain animation sequences at the option of the animator. The absolute value is still entered by the console. The difference is calculated under software control.

NO INPUT button 728 defines a neutral mode used mainly for animation playback. In this mode, the potentiometer and switch inputs on function panel 700 are disconnected and cannot be used to enter data.

ACTION section 730 contains 20 illuminated pushbuttons which serve as control inputs to the computer. Each button is illuminated as it is depressed.

Generally, during animation, a merge must be performed on the entered data before a new program definition can be entered or before a finish command can be entered. CLEAR PROGRAM button 731 allows a new program definition without merging the existing disc program into the working tape.

START INTERPOL. button 732 defines the current frame data as the starting point for the purpose of interpolation. By entering an animating value or coordinate and pressing button 732, the computer calculates further data values according to the type of interpolation designated. For example, the animator may control the computer to generate and store animation data corresponding to a linear movement between two entered data coordinates.

AUDIO SYNC. button 733 controls the computer to obtain foot and frame numbers from a time code translator and display them via lights 712, 714. Prior to use of this command, an audio tape is prepared by recording audio tracks thereon with a timing track. As the tape replay equipment is operated, the timing signals from the timing track are connected to the computer's time code translator. They are then displayed on the console and used internally. The foot and frame numbers are incremented at the standard 24 p.p.s. rate.

By entering animation data via discrete devices 702 and potentiometer devices 703, the animator can generate audio-syncrhonized animated data "on the fly." The computer accepts the entered animation data and assoiates it with foot and frame numbers from the time code translator.

This animation method is one way of obtaining audio synchronization. If greater synchronizing accuracy is required, the method described below and in detail in Section VI-J may be utilized.

FRAME button 734 allows the animator to enter a foot and frame number via numeric entry 725. After entry of the number and depression of ENTER button 763, the number is displayed by lights 712, 714. This allows the animator to specify exactly the foot and frame number to be entered along with animation data. By use of this command, the animator can obtain exact synchronization between audio track foot and frame numbers and entered data.

UPDATE button 735 causes all channels currently defined in the channel set and connected with an overlay to be updated for the currently indicated frame. The update is performed whether or not the entered data is changed.

It will be recalled that all animation data is entered by the computer onto disc. At the end of the first animating task, the data is taken from the disc and loaded onto tape in a merge operation. At the end of the second animating task on the same sub-show, data exists both on the disc and on tape from the prior task. A second merge is performed which sorts the two sources of data together by foot and frame number and loads a second tape. That tape is then used as the source of prior data at the end of the third animating task when the merge is repeated.

The above sequence is controlled by MERGE button 736. The merge operation is repeated following successive animation tasks until a final tape contains a complete sub-show.

MID. INTERPOL. button 737 controls the computer to save the current data as a mid-point for interpolation purposes. It, along with the START and STOP INTERPOLATION buttons, determines the exact interpolation sequence.

MACRO CALL button 738 enables the animator to insert a previously defined macro into his program. In addition to depression of button 738, the animator must specify the previously assigned macro number, the beginning and ending foot and frame numbers into which the macro is to be copied, and the number of the previously defined channel set.

REV. FRAME and FORWARD FRAME buttons 739, 740 cause the frame counter to be decremented and incremented, respectively, by one frame count. These commands may be used in connection with the FRAME command discussed above to obtain precise audio-animation data synchronization.

PLAYBACK button 741 controls the entire sub-show under console control to be used for control of the animated show. No data modification is possible during this period. The animator uses this command to view the show under control of the animation data entered during the current task. This is, of course, of considerable assistance in animating.

STOP INTERPOL. button 742 defines the stopping point for the interpolated data points generated by the computer.

PROGRAM PAUSE button 743 controls the computer to insert a pause command in the current data. As will be explained in connection with the discussion of the show control unit, the pause command halts the outputting of animation data to the show. Data transmission is resumed upon the receipt by show control unit of an external timing signal. This signal may originate, for example, within the show area in order to synchronize show segments with the transportation of viewers through the show.

REV. FOOT SKIP and FORWARD FOOT SKIP buttons 744, 745 cause the foot counter to be decremented and incremented, respectively, by one foot (16 frames).

FINISH button 746 releases the console and effectively removes it from the computer input. This command is utilized by an animator to sign off the console.

OVERLAY CALL button 747 causes the designated overlay, as defined previously, to be called. It will be recalled that a number was assigned by the computer to the previously defined overlay. This number is entered via keyboard 725 to call the overlay.

STOP button 729, as previously explained, causes the frame counter increments to stop. It effectively locks in the then-current foot and frame number in display lights 712, 714 and transmits the data for the current foot and frame number.

REVERSE and FORWARD buttons 748, 749 control the foot and frame counter to be decreased and increased, respectively, at the previously selected frame rate.

DISPLAY indicators 750 are illuminated by the computer via the console remote terminal unit. They are used to inform the operator as to the information to be next entered or the significance of any numbers displayed by the computer.

PROGRAM, MACRO, CHANNEL SET and OVERLAY indicators 751-754 request that those numbers be entered via numeric keyboard 725. CHANNEL indicator 755 requests an output circuit number (address) and also the interpolation type to be entered via the keyboard. INPUT indicator 756 requests entry of an input number (potentiometer or switch).

FRAME RATE indicator 757 requests entry of a frame rate. If no entry is provided, the computer software uses the film standard frame rate of 25 frames per second.

FRAME, START FRAME and END FRAME indicators 758, 759, 760 request foot and frame numbers.

NUMERIC ENTRY section 725 consists of CLEAR button 762, ENTER button 763 and decimal input buttons, such as 764, 765. The decimal buttons enter decimal numbers for the various functions described above. CLEAR button 762 causes the program to clear the last-entered value. This allows the animator to then re-enter the parameter. ENTER button 763 controls the value just entered to be transferred to the computer and used.

ANIMATOR'S CONTROL CONSOLE TO COMPUTER HARDWARE

Introduction

Elsewhere in this specification, it has been described how data entered at the animator's console is transferred to the computer. There, under software control, the entered data is formatted and stored with associated time and address tags. At the same time, the computer controls operation of the animated presentation in accordance with the entered data.

The computer utilized in applicant's embodiment is a Model DDP-516, manufactured by Honeywell, Inc. Any Honeywell 16 bit computer could be used for the system described herein. Similarly, any appropriate computer could be substituted for the DDP-516 if accompanied by software and interface changes which would be obvious to those skilled in the art.

FIG. 24 illustrates, via block diagrams, the hardware components of the animator's control console and the computer system. Each will be discussed separately.

ANNIMATOR'S CONTROL CONSOLE

Referring to FIG. 24, a block diagram of animator's control console 770 is illustrated. The console accepts three kinds of animator inputs: discrete controls 771; discrete data 772; and, variable or analog data 773.

Discrete control inputs 771 are entered via switches 775. Examples of such inputs are, referring to FIG. 23, PROGRAM DEF. button 719 and each button of NUMERIC ENTRY 725.

Discrete data inputs 772 are also entered via switches 776. These switches are the discrete inputs shown in FIG. 23 as switches 702.

Both types of discrete inputs are connected to be scanned by discrete scanning unit 777. Unit 777 is the same as that used in the monitor system and is described in detail in connection with that system. For the explanation at this point, it is sufficient to understand that unit 777 is controlled by the computer to test each connected discrete input at a predetermined scanning rate and output bits serially on output line 778. Each bit is set to a binary one or zero dependent upon the status of the scanned input.

As will be explained in connection with the description of the monitor system, each scanning unit 777 includes a bi-phase transmitter at its output. Accordingly, the output of each discrete scanning unit, represented in FIG. 24 by line 778, is comprised of the bi-phase encoded data, word sync and bit sync lines as described elsewhere herein.

Output 778 is applied to buffer concentrator 780, along with lines 781, 782, which may be connected to further animator's consoles. Output 784 of concentrator 780 is connected to receiver input line 785 and transfers data therethrough to computer 786.

Variable inputs 773 are entered via potentiometers 788, constructed in a well-known fashion. Each of the potentiometers are applied in parallel to the input connector of multiplexing analog to digital converter 790. Converter 790 is a purchased item. Applicants have successfully utilized an ASTROVERTER brand converter manufactured by Astrodata, Inc. and a MINIVERTER brand converter manufactured by Raytheon, Inc.

Under control of a scan counter in the piggyback scanning unit 791 via line 792, converter 790 sequentially scans each of the potentiometers 788. The voltage level on each potentiometer is digitized to eight bit binary form. Each bit position is supplied over parallel lines 793 after which the binary words are outputted over output line 778.

As described in connection with the monitor system, piggyback unit 791 is substantially identical to discrete scanning unit 777, differing only by its address. Further, as also described in connection with that system, scanned words are outputted via line 778 composed of two eight bit bytes, each followed by a parity bit.

Animator's console 770 also receives inputs from computer 786 via line 795. Computer outputs are bi-phase encoded by transmitter 796 and passed to buffer expander 797 via line 798. Expander 797 provides three balanced outputs 795, 798, 799, each of which may be connected to an animator's console.

Remote terminal unit 800 within the console receives all inputs and converts the bi-phase encoded serial data to non-return-to-zero parallel form. Each received data unit and associated address unit is passed in parallel to the scanning units 777, 791 via lines 801 and to discrete output circuits 802 via lines 803. Data strobe signals are also connected to each block via strobe lines 805, 806.

Discrete output circuits 802 take the form, on the animator's console panel, of the various output lights and digital displays.

COMPUTER AND PERIPHERAL DEVICES

Animation data entered from console 770 is received by bi-phase receiver 810 from line 785, converted to non-return-to-zero form and passed to computer interface 811 via line 812.

Interface 811 contains a plurality of logic circuits designed to make system data compatible with the input and output requirements of computer 786. The interface used, of course, will vary as various computers are utilized.

Interfaced data is supplied to computer 786 via line 815 and D.M.C. 816. The D.M.C. is a Honeywell device for inputting and outputting data to its computers. In the actual computer, a plurality of D.M.C.'s are available.

Under control of software stored on program disc 818, received data is formatted and stored on animation data disc 820. At the same time, the animation data is outputted on line 822 via transmitter 823. It is then received by the animated presentation which operates pursuant to the received data. This is, as previously stated, an aid to the animator entering data via the console.

Both program disc 818 and animation data disc 820 is accessed under control of disc controller 825.

In the audio synchronization mode of the animator's console, time code translator 827 supplies foot and frame numbers to the computer and the console via line 828 in either an ascending or descending order. Operation in the audio sync mode is explained in connection with Section VI-K, herein, entitled Animator's Control Console Panel.

When operating in the monitor mode, monitor scanner 830 controls scanning by connected discrete scanning units via lines 831, 832. When an off-normal condition is located, the computer is so notified via an interrupt on line 834.

At the end of an animating task, a large amount of animation data is stored on data disc 820. By a merge subroutine called from console 770, the data is transferred to tape 836. Following the next animating task for the same show, data on tape 836 and disc 820 is merged by foot and frame numbers and recorded on tape 837. Such merge operations continue until all data is contained on a single tape.

Tape transports 836, 837 are controlled by tape controller 840. Tape transports may be any 9-level transports, such as Hewlett-Packard 2020 model transports.

Following completion of animation for a sub-show, a disc load routine is called via typewriter terminal device 843. This causes the disc data to be compressed (redundant data removed) and loaded on disc 820. The disc is thereupon removed and may be connected to a show control unit for control of an animated show

BUFFER CONCENTRATOR

At various points throughout this invention, it is necessary to combine several data lines to a single line. As with most digital data transmission systems, data is transmitted herein over balanced wire pairs. Accordingly, provision must be made for impedance matching between the multiple lines and the resultant single line. This is the function of the buffer concentrator.

Buffer concentrators are used herein at various points throughout this system. For example, a plurality of animator's consoles may supply animation to the computer input line through a buffer concentrator (FIG. 2). Or, in the monitor system, a plurality of discrete scanning units may transmit data to the monitor receiver via a buffer concentrator (FIG. 3).

As explained in the sections of this specification describing the bi-phase transmitter and receiver, data transmission over distance in the system herein is in a type of Manchester, or bi-phase, coding. Data is transmitted over balanced wire pairs. Paralleling each data line is a word sync wire pair and a bit sync wire pair. The word sync is on for the first bit time in each word time, defining the beginning of that interval. Bit sync defines the bit periods.

In the system herein, data is always bi-phase encoded when supplied to either a buffer expander or buffer concentrator.

Each buffer concentrator may accept one to three inputs and supply a single output. Each input and the single output includes data, word sync and bit sync lines.

Referring to FIG. 10, the diagram of the input and output portions of a buffer concentrator is shown. There are three similar sections 850, 851, 852. Section 850 accepts three bit sync singals 853, 854, 855; section 851 three word sync signals 857, 858, 859; and, section 852 three data signals 860, 861, 862. In each section, the three inputs are selectively connected to three output lines: bit sync 865, word sync 866 and data 867.

Since sections 850 and 851, bit sync and word sync sections, are substantially similar, only section 850 will be described. Each of the bit sync inputs are coupled via transformers 869, 870, 871 to shaper amplifiers 872, 873, 874. Single outputs 875, 876, 877 of the shapers are formed. In FIG. 10, the outputs are also referred to BS1, BS2 and BS3.

Three additional signals 880, 881, 882 are also formed in section 850. Again, in the FIGURE, these signals are referred to as BS1*, BS2* and BS3*. The difference between the shaped signals 875, 876, 877 (BS1, BS2, BS3) and the non-shaped signals 880, 881, 882 (BS1*, BS2*, BS3*) are found in both amplitude and waveform. The shaped signals are the standard logic level 0 to 5 volts square waves while the non-shaped signals are 1 volt r.m.s. sine waves. They are, of course, phased identically.

Non-shaped signals 880, 881, 882 are supplied to the input electrodes of field-effect transistors 883, 884, 885. While any proper gate devices could be used, field effect transistors are desired because of their high input impedance (transformer output impedance is high) and high isolation.

Each transistor 883, 884, 885 is turned on or off by control lines 887, 888, 889. Control lines 887, 888, 889 (ALLOW 1, ALLOW 2, ALLOW 3) are switched by the control logic shown in block diagram form in FIG. 9. Their function is to pass a single one of the inputs to output line 865. Also, as will be explained in connection with FIG. 9, the ALLOW signals switch section 852 to indicate to a receiving unit down line if two inputs attempt to operate at the same time.

Data signals received on the three input lines 860, 861, 862 are connected to the input electrodes of field-effect transistors 890, 891, 892 by transformers. Conduction of each field-effect transistor 890, 891, 892 is controlled by ALLOW signals on lines 894, 895, 896. Logic circuitry shown in FIG. 9 switches the field-effect transistors on and off.

As will be explained in connection with the ALLOW logic circuitry of FIG. 9, it is the function of the buffer concentrator to block all transmissions if more than one input becomes active. In that event, one of the word sync signals is supplied to the single output data line to indicate to any receiving data units that the data inputs have been switched off.

For that purpose, un-shaped word sync signals 898, 899 are connected to the input electrodes 900, 901 of field-effect transistors 902, 903. Conduction of the transistor is controlled by logic lines 904, 905. As will be readily appreciated, if any two of the three inputs are active at the same time, either line 900 or line 901 will be active. That line is then switched to output lines 867. If the two active inputs on simultaneously have word sync signals 900, 901, then signal 900 is passed to output 867.

Referring to FIG. 9, the logic circuitry for generating the ALLOW switching signals is shown. The three word sync signals (from lines 857, 858, 859, FIG. 10) are inputted via lins 910, 911, 912 to three bi-phase receivers 914, 915, 916. In each, the bi-phase word sync signal is converted to non-return-to-zero digital codes outputted on lines 918, 919, 920. The word sync signals appearing on these lines are applied to switch selection logic 921 and to multiple transmission detector 922 via lines 923, 924, 925.

Detector 922 turns on output lines 927, 928 and 929 if any two of the three word sync inputs are active at the same time. Line 927 turns on multiple transmission indicator 930, a light on the indicator panel of the buffer concentrator. Line 928 is an input to the monitor system. As explained elsewhere herein, the monitor system will recognize that line 928 turns on and so notifies the computer.

Upon the occurrence of a multiple transmission, selection logic 921 is enabled via line 929. Thereafter, the output ALLOW lines 933-939 are turned on pursuant to the following table.

INPUT ACTIVE OUTPUTS ON (WORD NO.) (ALLOW SIGNAL NO.) 1 1,4 2 2,5 3 3 1,2 1,6 1,3 1,6 2,3 2,7 1,2,3 1,6

in the case of single data inputs, only the proper data line is passed. In the event of multiple transmission, however, one of the word sync signals is passed to the output data line.

BI-PHASE TRANSMITTER

Throughout the discussion of the system according to this invention, it has been explained that data transmitted over substantial distances is bi-phase encoded. The bi-phase encoding utilized as part of the preferred embodiment is an adaptation of the well known Manchester scheme of data encoding.

Bi-phase transmission of digital data herein entails conversion of the usual binary codes to phased sine waves. Sine waves are preferred over square waves for data transmission as they may be transformer coupled and the various transmission devices may be designed to operate over much narrower frequency bands.

The function, then, of a bi-phase transmitter is to accept a non-return-to-zero digital data code and convert it to phase modulated sine waves. Also, the transmitter generates word and bit sync signals for use in recovering the transmitted data. Finally, each of the three outputs, data, bit sync and word sync, are transmitted on double redundant lines.

FIG. 25 illustrates, via a block diagram, a bi-phase transmitter. Waveforms of assistance in understanding operation of the transmitter are illustrated in FIG. 26.

Referring to FIG. 25, a bi-phase transmitter is shown connected to parallel input lines 1150. Lines 1150 pass data to the transmitter from a variety of sources, such as the computer, discrete scanning units, show control transmitters, and so forth. When the transmitter receives data from the computer, interface logic 1151 is superimposed between computer output lines 1152 and transmitter input lines 1150. Interface 1151 converts the computer data to a form utilized by the system. Except for use in converting data when the transmitter is connected to the computer, interface block 1151 is not utilized.

Before beginning an explanation of the operation of the transmitter, it should be recognized that three signals are provided for use by the transmitter. The three, all oscillator derived, are the bit sync signal (BS) on line 1153, the shifted bit sync signal (BS-90°) on line 1154 and the 700 Kilohertz signal [10 × (BS-90°)] on line 1155. Each of the three is a square wave signal. The bit sync and shifted bit sync signals are shown as waveforms 1156, 1157, respectively, in FIG. 26. As is readily apparent, they are identical except for a 90° phase difference.

Referring again to FIG. 25, the bi-phase transmitter is started when line 1160 turns on. This causes lines 1161, 1162 to also turn on, controlling a check of status of buffer register control logic 1163 and shift register control logic 1164. Each logic block 1163, 1164 is set when its associated register (buffer register 1162, shift register 1166) contains data.

If buffer register 1165 is empty, logic block 1163 turns line 1168 on. Similarly, if shift register 1166 is empty, logic 1164 turns line 1170 on. When both lines 1168, 1170 are on, DMC request logic 1172 turns line 1171 on, causing a data interrupt on line 1174. The computer (or other data supplying device) passes data to lines 1152 and turns on line 1175. The latter causes line 1177 to turn on, controlling request logic 1172 to turn line 1171 off, thereby removing its request for data. At the same time, the data word is passed in parallel form to lines 1150.

Via line 1161, request logic 1172 causes control logic 1163 to control register 1165 to side load the data word which appears on lines 1150. The purpose of register 1165 is for the usual buffering purpose to provide for the transmission rate changes in the parallel to serial conversion that takes place in register 1166. The data word is held in buffer register 1165 until it can be accepted by shift register 1166.

Since the bit sync signals are being constantly generated, the shifted bit sync signal is constantly applied to bit counter 1180 via line 1181. Following the eighteenth counted shifted bit, counter 1180 turns line 1182 on. This, in turn, causes control logic 1164 to enable shift register 1166 to side load the data word contained in buffer register 1165 via lines 1187.

The purpose of counting eighteen shifted bits prior to transferring the data word from buffer register 1165 to shift register 1166 is to allow time for the prior word to be stepped out of register 1166. Since the same shifted bit sync signal controls the stepping, the register will be empty following the 18th bit.

As soon as the data word is loaded into shift register 1166, a shifted bit sync signal on line 1184 causes the word to be stepped serially out onto line 1186. This clears buffer register 1165 and shift register 1166 so that the next data word may be loaded.

Serial data bits on line 1186 are passed as one of the two inputs to data and parity mixer block 1187. The second input is obtained via line 1188 from parity generator 1189. The purpose of mixer 1187 is to insert parity bits, when called for, during the ninth and 18th bit times of each word.

Since data is stepped out of shift register 1166 by the shift bit sync signal (on line 1184), data bits are in phase with the shifted bit sync. Bit counter 1180, then, turns on line 1190 during the ninth and eighteenth bit times. Parity control logic 1191 then turns on lines 1192, 1193. The former (line 1192) causes mixer 1187 to accept the next bit from parity input line 1188 instead of data line 1186. Line 1193 enables parity generator 1189 to pass a parity bit, if appropriate, to mixer 1187 via line 1188.

Odd parity is utilized throughout this system. The total number of binary ones, therefore, in each half word is odd. Parity generator 1189 counts the one's appearing on line 1186 and determines whether or not a parity bit is required.

Referring to FIG. 26, a typical waveform of an output from mixer 1187 (FIG. 25) is shown at 1195. As is readily apparent, the example of binary code illustrated (01111000010) is in a non-return-to-zero format.

Referring again to FIG. 25, the mixer output signal is phase encoded by encoder 1196. Encoder 1196 receives the shifted bit sync signal (BS-90°) on line 1197 and tests the mixer output at the initial rise time of each shifted bit. When the mixer output is up at that point, the encoder output is up; when the mixer output is down at that point, the encoder output is down. The result is a rectangular output wave, consisting of cycles identical to the shifted bit sync except that where the mixer output undergoes a transition, the encoder level stays constant for a double length of time. Referring to FIG. 26, an example of the encoder output is shown by waveform 1198. It may be seen that waveform 1198 indicates only transition points in the mixer output signal 1195.

Referring again to FIG. 25, phase encoded outputs are supplied to square to sine converter 1200 via line 1199. Converter 1200 converts the phase encoded rectangular waveform to a similarly encoded sine wave signal. Referring to FIG. 26, the phase encoded sine wave signal 1201 is illustrated.

Referring again to FIG. 25, the phase encoded sine wave signal on line 1202 is passed to redundant data lines 1203, 1204 via line driver 1205 and line coupler 1206. Driver 1205 amplifies the data signal to the level necessary and coupler 1206 matches the impedance. Double redundant data signals appear, then, on output lines 1203, 1204.

It will be recalled that in the discussion of FIG. 17, the bi-phase receiver uses the bit sync signal to sample the bi-phase encoded data signal. Resultant waveform 1206 is illustrated in FIG. 26. It is seen that it is identical to the original non-return-to-zero input except for a 90 degree (of a bit period) phase shift.

Double redundant bit sync signals are transmitted on lines 1210, 1211 (FIG. 25). The signals are derived from line driver 1212 and line coupler 1213, as explained above, from square to sine converter 1214. The input for converter 1214 is the bit sync signal on line 1215.

As stated above, the word sync signal is on for the first bit time of each eighteen bit word. Via line 1216, bit counter 1180 turns on word sync control logic 1217 during the first bit time. The resultant pulses are phase encoded by encoder 1218 and outputted on double redundant lines 1222, 1223. Converter 1219, driver 1220 and coupler 1221 operate as explained above.

Accordingly, the bi-phase transmitter provides double redundant data, bit sync and word sync signals. Except for an interface circuit, the transmitter is identical throughout the system.

ASYNCHRONOUS TIMER

As explained in connection with the discussion of FIGS. 6 and 7 concerning the show control unit, one mode of operation of the unit involves controlling segments of the complete animated presentation at various asynchronous times. Usually, this requirement is encountered in a presentation through which viewers are transported. Since varying lengths of time are involved for loading and unloading vehicles, the various segments of the presentation cannot be started until the arrival of the viewers at a predetermined point within the show area.

For example, one type of presentation with which this invention will be used involves transporting viewers in boats along a simulated jungle river. The presentation is divided into twelve segments, each segment being started when a boat reaches a predetermined point. Switches are closed at each point, causing the show control unit to begin to output animation data for the proper segment.

In this example, numerous boats are scattered throughout the presentation at any one instant. Consequently, not only must each segment be started at the proper time, many or all of the segments must be controlled at the same time.

The asynchronous timer, illustrated in block diagram form in FIG. 27, supplies foot and frame numbers for up to 12 segments on demand. Each segment is started by a control pulse from the area of the presentation.

Referring to FIG. 27, the asynchronous timer is shown with four input lines 1230, 1231, 1232, 1233 from the show area. While four such lines are shown, the preferred embodiment provides twelve. Each line is connected to a trip switch located so as to start a segment of the complete presentation when actuated.

The timer operates in two modes, straight count and repeated count. The mode of operation is selected for each of the counter stages by switch 1235. The straight count mode will be discussed first. When switch 1235 is in the position shown in FIG. 27, the timer operates in the straight count mode and each input line 1230-1233 is directly connected to one of the frame counters 1236-1239.

Four frame counters are illustrated. It should be understood that as many counters are employed as there are show segments. The maximum number of each is 12 in the preferred embodiment.

Each counter 1236--1239 is a presetable sixteen bit parallel output binary counter. Each may be set to begin and end counting on a designated foot and frame number.

Each counter begins to count when its input line is turned on from the show area. Timing logic 1240 generates strobes pulses on up to twelve lines, represented in FIG. 27 by single line 1241. Each single strobe line is pulsed every one-eighth second. The lines are sequentially pulsed, so that each counter is strobed eight times each second and all counters 96 times each second.

As each counter receives the eight p.p.s. strobing pulse, it outputs its foot and frame number over parallel lines 1242-1245 to counter output gating circuit 1246. If, however, the highest foot and frame number for any single counter has been reached and no restart pulse has been received on its input line 1230-1233, the counter resets to its lowest count and the count continues to be outputted upon receipt of each strobe, but is not incremented.

If all frame counters, then, have been started, each is passing a new foot and frame number to gating circuit 1246 eight times each second. As each number is received by gating circuit 1246, it is outputted over parallel lines 1250. As explained in connection with the discussion of FIG. 6, lines 1250 are connected to lines 213 of that Figure. Therefore, the show control unit functions as explained in connection with FIG. 6, except for timing.

Timing is controlled by the 96 p.p.s. timing signal generated by circuit 1240 and outputted on line 1252. This signal is connected to line 227 of FIG. 6.

Accordingly, when all twelve frame counters are used, lines 1250 output a new foot and frame number 96 times each second. In order to control the comparison and search sequences within the show control unit, line 1252 outputs a 96 p.p.s. frame synchronizing pulse.

In the second mode, switch 1235 is moved to its second position. This mode is used in those cases where the animation in any given segment can be made up of up to four identical parts. It should be understood that each counter is separably controllable, both as to whether it is to repeat or not and, if so, the number of repeats.

When one of the input lines 1230-1233 goes on in the second (repeat count) mode, the associated frame counter begins its count as before. When the highest count is reached, however, one of return lines 1253 goes on, causing the connected count repeater 1254 to pulse its frame counter via switch 1235. This causes the foot and frame count to begin again and the identical animation data outputted.

The number of such repeat counts can be preset in the preferred embodiment to a maximum of four. The result of the repeat count mode is that disc space is conserved.

In order to reduce the disc access time when operating at the higher speed, each track contains eight identical sequences of data. Including the three overhead words, a maximum of 32 words of animation data can be outputted during a single frame time (42 milliseconds).

MONITOR SYSTEM

Introduction

In the presentation of a complete show in accordance with this invention, the state of thousands of discrete events may be controlled. For example, lights may be on or off, curtains opened or closed, figures moved or not, sound tracks switched on or off, and so forth. Similarly, correct operation of many types of devices may be indicated by a discrete output. Examples are outputs of parity check circuits, temperature controllers, water height controllers, and so forth. In each case, the monitor system, which is part of this invention, communicates the status of each discrete event to the central computer if the discrete event is off-normal. The computer then determines whether corrective action should be taken.

Corrective action may take two forms. In the first, the computer may simply output an error message to the system operator via standard output equipment. In the second, the computer may control restoration of the normal condition. In some cases, both responses may occur.

An example in the preferred embodiment of the first response is found in the occurrence of a parity error. A parity check circuit opens a pair of contacts following detection of a parity error. The monitor system communicates this off-normal condition to the computer which outputs a message to the computer operator, informing him of the parity error and its location.

An example of the second response is found in the output of a water height sensor. If the water level falls below a desired point, the level sensor opens a pair of contacts. This off-normal condition is communicated to the computer which, in turn, may control restorative action by turning on a water valve. In addition, the sequence may be reported to the computer operator by an error message.

The monitor system of this invention is essentially a closed loop. It is capable of scanning up to 65,536 contacts in groups of 256 or, in case of an off-normal condition, one set of contacts at a time within a group. It is believed that this is an important feature of this monitor system. It is capable of determining if any point in each 256 point group is off-normal. If so, it can then determine which of the 256 scanned points is off-normal.

In addition, the monitor system of this invention only utilizes the computer when off-normal conditions are encountered. This feature is important since it frees the computer for other work. When an off-normal condition is found by the system, an interrupt to the computer is generated. The computer is programmed to then service the interrupt on a time share basis with other inputs, as, for example, from an animator's console.

While the monitor system disclosed herein is described in connection with an animation system, it is obvious that it may be employed in many other environments. Any application in which it is advantageous to utilize monitoring of the operation of discrete points may use this monitor system.

GENERALIZED SYSTEM

Referring to FIG. 28, a general block diagram of the monitor system is shown. Via standard input device 945, the computer operator enters a command causing the monitor program to be entered into the core of computer 946. This activates the monotor program and system. Thereafter, the monitoring sequence is initiated under control of the monitor program and continued automatically.

After the monitor program is loaded, computer 946 initializes monitor scanner 947 via control line 948. The monitor scanner then automatically begins and continues the monitoring sequence without computer intervention so long as no off-normal conditions are located. At the end of the scan or when an off-normal point is found, the monitor scanner generates an interrupt to computer 946 via line 949. The interrupt, having been assigned a priority by the computer executive program, causes the computer to process the information delivered to it by the scanner when the priority level is reached.

As will be explained in connection with the explanation of the scanning circuit, "normal conditions" are defined herein as closed contacts. So long as the monitor scanner, then, finds all scanned contacts closed, no computer interrupt is generated. "Off-normal" is defined as open contacts. When this condition is found, the monitor scanner so advises the computer and also supplies it with the identity of the open contacts. The computer then checks a catalog of subroutines to determine what action is to be taken in response to the off-normal condition.

As will be readily appreciated, the monitor system of this invention is not limited to the sensing of closed contacts. Closure of normally open contacts may be readily sensed by inclusion of a small relay between the scanned points and the scanning circuit.

Scanned points (contact pairs) are connected to scanning circuits which, in turn, are grouped within discrete scanning unit modules. Each scanning circuit may sense the state of up to 16 scanned points. Up to 16 scanning circuits may be grouped in a single module termed a discrete scanning unit. Each scanning unit, then, may serve up to 256 discrete points. For purposes of addressing, each discrete scanning unit is considered a single unit.

Scanner 947 contains a counter which generates the address of the discrete scanning unit to be interrogated. In response to the initialization pulse on line 948, the scanner counter is set to 001 and the sequential interrogation begins.

Scanner 947 generates an 18 bit word, including two bits, the ninth and 18th, of parity. The first eight address bits of the interrogation word always consists of all ones. This initial byte is recognized as a flag by all discrete scanning units. The second eight address bits (bits nine through 17 ) contain a unique address generated by the scanner counter.

Each interrogation word is supplied to all discrete scanning units (DSU) in parallel. The initial eight bits (all ones) is recognized by all discrete scanning units. The second eight address bits is unique to one discrete scanning unit.

The 18 bit interrogation word is supplied in parallel to monitor scanner transmitter 950 via parallel lines 951. Transmitter 950 consists of a parallel to serial converter and a bi-phase transmitter. The transmitter is identical to the transmitter circuits used throughout this invention.

Transmitter 950 generates a double redundant output, consisting of serial data (address words here), bit sync and word sync lines. The transmitter is controlled to pass out the contents of the parallel to serial converter by control line 952.

The monitor scanner and its transmitters and receivers are preferably located adjacent the computer in a central control area. Serial lines 953, then, serially transmit the scanner interrogation words over substantial distances.

There may be in the monitor system of this invention a maximum of 128 remote terminal units (RTU). Each unit is served by a single input line for impedance matching purposes. In order to maintain the 600 ohm balanced loads where a plurality of remote terminal units are used, line 953 is inputted to buffer expander 955. The expander is explained in detail in connection with the discussion of FIGS. 14, 15 and 16. Its function is to accept a single input consisting of data, bit sync and work sync and supply three identical outputs of each. FIG. 28 illustrates expander 955 as having three outputs 957, 958, 959. It is understood that a single line supplies a single remote terminal unit and, therefore, as many expanders are used as necessary.

For simplicity, only output 958 is shown connected to a remote terminal unit. Serial lines 958 supply the interrogation words to the overhead circuits of remote terminal unit 960. As explained in detail in connection with the discussion of FIGS. 17 and 18, remote terminal unit overhead 960 serves a number of functions. It converts received data to non-return-to-zero form and tests it for parity, word sync and bit sync accuracy. Upon the occurrence of a predetermined number of errors, overhead 960 automatically switches to the opposite input of the two redundant input lines. The monitor system is advised of such a switch via line 961.

Overhead circuit 960 then converts the serial interrogation word input to parallel form. The parallel interrogation word is outputted via lines 963 along with a data strobe signal on line 964.

Accordingly, output circuits 966 and discrete scanning unit overhead circuits 965 are supplied with two interrogation words in parallel form. The most significant half of each such word is comprised of all ones and is recognized by all discrete scanning units. The least significant half of the word is unique to each discrete scanning unit 965.

There are a maximum of 128 remote terminal units (such as 960) and directly connected discrete scanning units (such as 965) according to this invention. Accordingly, the directly connected discrete scanning unit can be uniquely addressed by the least significant seven of the eight address bits (that is, 2 ⁷ = 128). The eighth, or most significant bit, however, is reserved for use in addressing a discrete scanning unit, such as 968, connected in parallel to directly connected unit 965. The second unit, which may or may not be used, is termed the piggyback discrete scanning unit. The address for each discrete scanning unit and its piggyback unit is identical except for the eighth, or most significant, bit. The directly connected scanning unit address always has a zero in the most significant position. A piggyback unit, where present, always has a one in that position of its address.

The first interrogation word transmitted by scanner 947 then, consists of two portions. The first half contains eight ones and a parity bit. The second half contains seven zeroes and a one in the least significant bit position, followed by a parity bit. This is recognized by discrete scanning unit 965 as its address.

Scanning unit 965 contains overhead circuits and up to 16 scanning circuits, such as shown in FIG. 31. Each such scanning circuit is connected to 16 discrete scanned points. The normal condition for each such point is in the closed state. A single scanned open point is detected by overhead circuit 965 as an off-normal condition.

Scanning unit 965 generates one of four outputs in response to receipt of its interrogation word. The output is a function of whether or not all scanned points (up to 256) are normal and whether or not a scanning unit piggyback is connected. Each of the four outputs will be described.

In response to each interrogation word, an eighteen bit status word is generated and outputted by the addressed scanning unit over lines 970. The first, or most significant, half (eight bits and parity) of the status word always consists of the address of the answering scanning unit. The output addressing scheme is identical to the input addressing scheme.

The second half of the status word (eight bits and parity) has one of four values, dependent upon whether or not all contacts are normal and whether or not a piggyback unit is connected.

If the status word indicates all contacts closed and no piggyback scanning unit, the address counter in monitor scanner 947 is incremented by one count in response to the output generated by unit 965. A new interrogation word is then transmitted via transmitter 950. Following the first interrogation word of the example herein, the next interrogation word would address discrete scanning unit number 002.

In the practical embodiment of this invention, the monitor scanner, once started, interrogates a new discrete scanning unit (256 scanned points) approximately every 500 microseconds. This scanning sequence and rate is continued until an off-normal condition is encountered.

If, in response to the first interrogation word, the status word returned by overhead unit 20 indicated all contacts normal but a connected piggyback scanning unit, the least significant seven bits of the address counter in scanner 947 are held unchanged and the most significant bit (bit 8) changed to a one. Thus, a new address is generated and forms the second half of a new interrogation word transmitted via transmitter 950. The address of each piggyback unit then, is identical to that of its associated directly connected unit, except for the value of the most significant bit.

The second interrogation word is again applied to all discrete scanning units. It is recognized and responded to, however, only by piggyback unit 968.

Unit 968 replies with a status word consisting, as above, of two parts. The first half contains the address of the piggyback unit. The second half contains one of two messages, depending upon whether all scanned points were normal or at least one was off-normal. Only one of two messages rather than one of four is sent because there can be no further piggyback units. If the reply indicates all scanned points normal, the scanner counter increments its least significant seven bits by one count and changes the most significant (eight) bit to a zero. Thereafter, the next successive interrogation word is transmitted.

In response to each interrogation word, the addressed discrete scanning unit scans all of its scanned points in parallel. The resultant status word indicates only whether all points are normal or whether any one or more are off-normal.

If the initial parallel scan indicates that any scanned points are off-normal, a second scan routine is automatically initiated by the addressed scanning unit. One at a time, the 16 scanned points of each of the up to 16 scanning circuits are checked. At the end of each circuit scan, the unit generates an 18 bit word. The first eight bits correspond to the status of the first eight scanned points. Bits 10 through 17 correspond to the status of the second eight scanned points. In each case, a one at any bit position indicates that the correspondingly numbered scanned point is off-normal. As before, bits 9 and 18 are parity bits.

Accordingly, any interrogated discrete scanning unit having one or more off-normal scanned points generates a seventeen word reply. The first word, the status word, contains the unit address and the status of the unit, that is, whether all points are normal or whether any are off-normal, and whether there is a piggyback unit. Following are 16 words, each data bit of which corresponds to the status of one of the up to 256 scanned points.

The 17 words are received serially by scanner receiver 972, converted to parallel form and supplied to scanner 947.

Logic circuitry in scanner 947 first compares the status word address to the address in the interrogation addresss counter to insure that the proper scanning unit is responding.

Upon decoding the second half of the status word, logic circuitry within monitor scanner 947 recognizes whether an off-normal condition was found and, thereby whether sixteen further words will be following. If an off-normal condition was found, monitor scanner 947 immediately signals the computer via line 949. Computer 946 responds by opening a DMC channel, a Honeywell circuit for transferring data between input-output devices and core. Thereafter, the seventeen words are transferred into the core of computer 946 via parallel lines 975. Upon completion of the seventeen word transfer, monitor scanner 947 generates a computer interrupt via line 949. Thereafter, the monitor information is processed by computer 946 in the order dictated by its assigned priority.

Computer 946 is programmed to examine the 16 words relating to scanned point status bit-by-bit. As a bit denoting off-normal status is located, the computer is controlled by software to refer to a previously stored table of error subroutines. The subroutine may direct the printout of an appropriate error message via output device 945. Or, the subroutine may control restorative action to be taken.

If the subroutine controls the latter, the proper eighteen bit words are read out of memory of computer 946 via parallel lines 977. The word format is identical to that described in connection with the show control unit. The first half of each word contains an address (other than all ones) and the second half contains restorative data.

Restorative data is transmitted by transmitter 950 in the normal manner. Remote terminal unit 960 receives the data and, as explained above, outputs it in parallel form over line 963. As explained in connection with the control of an animated show (FIGS. 19 and 20), output circuits 966 take the form of discrete devices. In either case, data transferred from computer 946 may control the devices via output circuits 966 to correct the off-normal condition.

Referring to FIG. 28, discrete scanning unit 965 is shown with a single output line 970. Within unit 965 is a bi-phase transmitter circuit which forms the double redundant data, bit sync and word sync outputs used throughout this invention for transmission of data over distances. In FIG. 28, this bi-phase transmitter output is represented by line 970. Data is, as with all bi-phase transmitters, outputted serially by bit.

As explained elsewhere, data is transferred herein over 600 ohm balanced lines. Where more than one input is involved, therefore, the inputs must be multiplexed through a buffer concentrator. Since the monitor system of this invention may comprise up to 128 directly connected discrete scanning units, each with its own output, a plurality of buffer concentrators may be necessary. Each combines and multiplexes three inputs to a single output.

Buffer concentrator 980 accepts three input lines 970, 981, 982 and outputs a single parallel line 983. Details of the buffer concentrator may be found in the specification in connection with the discussion of FIGS. 9 and 10.

Scanner receiver 972 includes the identical bi-phase receiver circuit shown in FIG. 17. It converts the received bi-phase data to non-return-to-zero coding and applies the data coding to a serial-to-parallel converter. The output of the converter is transferred to monitor scanner 947 over parallel lines 984. When the converter is fully loaded and ready to transfer, line 986 is turned on, controlling acceptance of the transferred word.

Following each processing of off-normal data, the computer controls, via line 948, the monitor scanner to begin its scanning sequence. In each case, the scanner returns to its last scanned discrete unit address, increments the interrogation counter by one count, and continues from that point. After the last (highest address) discrete scanning unit is interrogated, the sequence begins as before with the first (lowest address) scanning unit.

As will be explained in connection with the discussion of FIG. 29, the scanner may be controlled, via a radix control, to scan only up to a certain address before repeating. Further, via software control, the computer keeps a record of each reported off-normal condition and only executes the error subroutines in the case of changes. In this way, an error message is only outputted once in response to an off-normal condition.

The monitor system of this invention, then, provides the ability to check the status of up to 65,536 discrete points. In groups of up to 256, the points are scanned sequentially in parallel. If an off-normal condition is located in any one group, each point in that group is sequentially scanned and the status communicated to a computer. Computer time is only utilized when off-normal conditions are located and during control periods.

MONITOR SCANNER

In connection with the above discussion of FIG. 28, the operation of monitor scanner 947 was disclosed in connection with the monitor system. Referring to FIG. 29, a detailed diagram of the monitor scanner is illustrated along with details of the scanner receiver and scanner transmitter.

As described above, when the computer operator calls up the monitor program, the monitor circuit is initialized via computer control line 948. Control logic 990, via control line 991, causes discrete scanning unit address generator 992 to reset to the initial scanning unit address, or 001. Generator 992, consisting of a controllable counter, outputs the scanning unit address over parallel lines 993 to one input of parallel to serial converter 995.

It will be recalled that interrogation words are eighteen bits in length and consist of two halves. The most significant half contains eight ones which serve as a flag recognized by all discrete scanning units. The second half contains eight bits indicating the interrogated scanning unit address. Each half is followed by a single parity bit.

The flag address half is inputted to converter 995 via parallel lines 996. The first half of each interrogation word, then, is obtained by converter 995 from input lines 993. The second half, or scanning unit address, is obtained by the converter from input line 996.

Converter 995 is a side loading counter. It is cycled out serially by control of logic 990 via control line 997. Its serial output is supplied to bi-phase transmitter 998 via line 999.

Transmitter 998 is disclosed in detail in FIG. 25. For the description here, it is sufficient to understand that it provides double redundant outputs of interrogation data, bit sync and word sync over serial lines 953.

As described in connection with FIG. 28, data transmitted over line 953 is supplied in parallel to all directly connected scanning units and output circuits. Depending upon the status of the scanned points connected to each of the units, each interrogated unit returns either a single 18 bit status word or the status word and 16 words each 18 bits in length. After passing through one or more buffer concentrators, the scanning unit return is received serially by bi-phase receiver 1000, over serial lines 983.

Receiver 1000 is identical to the receivers utilized throughout this invention and is disclosed in detail in FIG. 17. Its function is to accept the bi-phase encoded data, bit sync and word sync codes and output the data in non-return-to-zero form on line 1001.

Serial to parallel converter 1002 receives the serial data on line 1001 and end loads a series of shift registers. When converter 1002 is filled, the 18 bits of the status word are available to buffer register 1004 via parallel lines 1005, available to the three stage detector unit 1006 via lines 1007 and to addresss comparator 1008 via lines 1009.

Address comparator 1008 is provided with two inputs, the returned scanning unit address from lines 1009 and the transmitted scanning unit address from lines 1010. Its function is to insure that the addressed scanning unit was the unit that responded. If comparator 1008 finds that the addresses match, it turns on line 1011, so advising control logic 900. Via control lines 1012 and 1013 logic 990 causes detector unit 1006 to diagnose the received status word.

Detector unit 1006 consists of three stages 1014, 1015, 1016, each for checking the status of aspects of the received status word.

Status detector 1014 serves a number of functions. It determines whether two or more scanning units tried to transmit at one time, whether the entire scan has been received, that is, whether one of seventeen words have been received, whether a parity error occurred, and whether no response was received within a predetermined time limit. To indicate each of these conditions, a number of control lines are connected to logic 990. For simplicity, these lines are represented by line 1018.

Status detector 1015 checks the last half of the received status word to determine whether all scanned points were found to be normal or whether any were off normal. If all were normal, logic 990 is advised by line 1019 and, in turn, controls generator 992 via line 991 to generate a new interrogation address in accordance with the second address control via line 1020, as will be discussed.

If any off-normal scanned points were located, logic 990 indicates this to the computer via line 949. In such a case, sixteen additional words are in the process of being transmitted via input line 983. In addition to signaling the computer, logic 990 also cycles buffer register 104 via line 1022 to accept and pass the status word, and all 16 words following, to the computer via input lines 975.

In the event of off-normal conditions, control logic 990 generates a second status word containing the results of the testing by detector units 1006. This new status word is passed to the computer via parallel lines 1025 and 975.

Detector 1016 checks the last half of the status word to determine whether a piggyback unit is connected to the transmitting scanning units. If so, line 1020 is turned on to set a flip-flop in generator 992 to supply a binary one in the most significant bit position for the next scan.

The received words continue to be passed to the computer input register via buffer register 1004 until detector 1014 determines that the transmission has ended. Line 1022 thereafter ceases to cycle register 1004. If all points were found to be normal, address generator 992 transmits a new interrogation word and the above sequence is repeated. If points were found to be off-normal, the monitor scanner waits until it is controlled to resume scanning by computer control line 948.

In response to an off-normal scan, the computer, as previously explained may output restorative data via lines 977. This data, as in the case of the show control unit, would consist of eighteen bit words. The first half would contain the address of the restoring output circuit and the second half would contain the restoring data.

Restorative information is passed via the computer output to buffer register 1028. When full, the contents of register 1028 are emptied via line 1029 to parallel to serial converter 995. Thereafter, the restorative information is transmitted to the proper output circuits (996, FIG. 28).

Upon the completion of the error processing sequence by the computer, logic 990 is controlled via line 948 to begin the scanning process anew. Generator 992 is then controlled via line 991 to generate the next address and scan the next scanning unit.

Radix control 1030 is provided with two inputs. One is the address provided by address generator 992 via lines 1031 and the second is the manually entered maximum address. The latter is entered via binary switches (not shown). Radix control compares the two inputs and resets generator 992 via line 1033 when the inputs are equal. In this way, the scanning range of the monitor system may be determined.

DISCRETE SCANNING UNIT OVERHEAD

Each discrete scanning unit (DSU), whether directly connected to a remote terminal unit or converted as a piggyback unit, is assigned a unique address. When properly addressed, each unit can scan the status of up to 256 contacts. Closed contacts are considered to be in a normal condition. If all contacts are closed, the unit is in its normal condition. If one or more of the contacts are open, an off-normal condition exists. It is the function of the discrete scanning unit to advise the monitor scanner, when interrogated, whether all contacts are normal and, if not, which contacts are off-normal.

Each discrete scanning unit contains up to 16 scanning circuits, which will be described in the following section. Each scanning circuit, in turn, is connected to up to 16 scanned points or pairs of contacts.

In addition to the scanning circuits, each unit contains circuitry for decoding received interrogation words, controlling the scans and generation of reply codes. These functions are performed in the overhead circuits of each scanning unit.

Referring to FIG. 30, a block diagram of the overhead circuit of a discrete scanning unit is illustrated. 18 bit interrogation words are received by each discrete scanning unit overhead over parallel lines 1040. Flag and address detector 1041 checks each received interrogation word for the address byte common to all discrete scanning units (all one's) and the address byte unique to that unit. The common flag byte is used because of the presence of the output circuits (966, FIG. 28) which also receive the interrogation words and restorative data words. Since the initial portion of a restorative data word contains an address byte, this same format must be followed for the discrete scanning units.

It will be recalled that a two part status word is always returned from an interrogated discrete scanning unit. The first half consists of the address of the replying unit and the second half is set by four conditions: whether or not a piggyback unit is connected and whether or not all scanned points are normal.

Referring again to FIG. 30, as soon as flag and address detector 1041 recognizes the received interrogation word as its address, the second half of the interrogation word (the d.s.u. address) is made available to status scanner gates 1042 over parallel lines 1043. Line 1044 is controlled to be on by detector 1041 if a piggyback unit is connected. The presence or absence of a piggyback unit is indicated by a wired pin within detector 1041.

Parallel lines 1043, then contain the information necessary for the first half of the status word to be returned.

Detector 1041 also turns on or holds off line 1045 depending upon whether the received interrogation word contained an address of a directly connected or piggyback unit. This is determined by whether the most significant bit is a one or zero. It will be recalled that the seven least significant bits in the addresses of both units are identical. The difference is found in the most significant (eight) bit. In a piggyback unit, that bit is a one.

Line 1045 is connected to bit sensor 1047 to control whether sensor 1047 accepts serial input 1049 or 1050. The purpose of this control will be discussed below. Line 1045 also supplies the same information to status scanner gates 1042, that is, whether a directly connected or piggyback unit was addressed.

As will be explained below, prior to reception of the interrogation word, bit sensor 1047 was supplied with the information as to whether or not all contacts were normal or if any were off-normal. In response to this, the state of line 1051 is controlled. If, then, prior to receipt of the interrogation words, all scanned points were normal, line 1051 is off; if any scanned points were off-normal, line 1051 is on.

Accordingly, status scanner gates 1042 is supplied with all the information necessary for the status word to be returned as soon as the interrogation word is received by the overhead circuitry. The initial half, the unit address, is contained on parallel lines 1043. Information for the second half is found on control lines 1044, 1045 and 1051.

Returning to the point in time when flag and address detector recognizes its address, it then turns on line 1053. This controls the overhead to set a flip-flop in status scan control 1054 and start the scanning count which will cause return of the status word.

When the flip-flop in status scan control 1054 is set, lines 1055 and 1056 are turned on. As will be explained below, when line 1055 is turned on, the "all points" scanning lines are turned off and a scanning count begins on lines 1058. When line 1056 turns on, status scanner gates 1042 uses the scanning count pulses on parallel lines 1058 to scan parallel lines 1043 for the first half of the status word and scan logic gates set by the information inputs to gates 1042 for the second half.

The scanned status word is outputted serially on line 1060 to return-to-zero (RZ) to non-return-to-zero (NRZ) converter 1061. Converter 1061 is used to convert the scan status word to the code format used throughout the invention.

Thereafter, the status word is supplied to bi-phase transmitter 1063 via line 1064 and returned to the monitor scanner receiver (947, FIG. 28) via line 1065.

The above sequence for the status word return is performed in response to every decoded interrogation word, whether or not all points were normal. If all were normal, no further transmission is made.

Before explaining operation of the circuit in the event of points being found off-normal, a description of the constant monitoring feature will be given.

It will be recalled that the status of up to 256 scanned points is monitored by a single unit. As will be explained in connection with FIG. 31, each point, or all points, may be selected by proper pulsing of matrix lines. When all matrix lines are on, the outputs of all scanning circuits are paralleled. The paralleled output has a state determined by whether all points are normal or if one, or more, are off-normal. This will be explained in greater detail in connection with the discussion of that FIGURE.

The matrix scanning lines are connected to each of the up to 16 scanning circuits from scanner gates 1068 and piggyback scanner gates 1069 (if used). In each the status of the matrix lines is controlled by scan bit counter 1070 via lines 1071, 1072.

When the scanning unit is quiescent, that is, when it has not been interrogated, line 1055 is off and all matrix scanning lines ("all lines") are on. This causes the status of the scanned points to control the state of scanning circuit output lines 1049, 1050. For example, if all scanned points scanned by gates 1068 are normal during a quiescent period, line 1049 is up; if any are off-normal, the line is down.

Logic in bit sensor 1047 is set dependent upon the state of scanning circuit output lines 1049, 1050. When flag and address detector 1041 decodes an interrogation word, line 1045 is turned on, locking the status of the scanning circuit input lines in bit sensor 1047. Thereafter, the status of the lines is made available for the status word on line 1051, as explained above.

If bit sensor 1047 was controlled from a normal set of scanning circuits, line 1075 is held off. If, however, any points are found off-normal, line 1075 is turned on. As will be explained this is used to help control a point scan.

After scan bit counter 1070 completes the scan for the status word, it turns on line 1071 to status scan control 1072. The latter then turns on line 1073.

If lines 1075 and 1073 are both on, bit sensor 1047 had sensed an off-normal condition. The two lines then control data scan control 1077 to turn on line 1078. Line 1078 serves two purposes: it starts the scanned point scan by scan bit counter 1070 and controls converter 1061 to accept inputs from line 1079 rather than 1060.

When line 1078 turns on, scan bit counter 1070 begins to sequentially pulse scanning circuit matrix lines 1071, 1072. As will be explained below, sequential scanning causes a serial read-out of status bits from the scanning circuits via output lines 1049 or 1050.

Bit sensor 1047 accepts whichever scanning circuit input it had been previously controlled by line 1045 to accept and passes the status bits to converter 1061 and parity generator 1080 via line 1079. Generator 1080, via line 1082, adds the proper odd-parity bits to the bit stream. The 16 18 bit words are then returned to the monitor receiver via line 1065.

Clock generator 1085, connected to scan bit counter 1070 via line 1087, to converter 1061 via line 1088 and bi-phase transmitter 1063 via line 1089, supplies the proper scan rates and bit transmission rates.

DISCRETE SCANNING CIRCUITS

Each overhead circuit controls the scanning of up to 16 scanning circuits with 16 scanned points on each circuit. The schematic diagram of a single scanning circuit is illustrated in FIG. 31. Since the operation of the circuit is readily apparent to a person skilled in the art, only a brief description will be given.

A scanning circuit consists of eight substantially identical sections. FIG. 31 shows three 1090, 1091, 1092 of the eight sections. Each section is connected to a pair of contacts. For example, section 1090 contains contact pairs 1093, 1094, section 1092, 1095, 1096, and so forth.

Each section is divided into upper and lower, identical, halves. Each half contains one set of scanned points or contact pairs. Each half is comprised of a five-input AND gate. Four of the five are scanning inputs and the fifth is the scanned point input. The AND gate is of familiar design.

All of the halves are outputted onto common line 1097 from half lines 1098, 1099. Ourput line 1097 forms the input to the bit sensor (line 1049 or 1050, FIG. 27).

There are two levels of scan lines. The major level consists of four lines 1100, 1101, 1102, 1103 and the minor level consists of eight lines of which three 1105, 1106, 1107 are shown.

During quiescent periods, all scanning lines are up. If one scanned point is off-normal, line 1097 is up. For example, if contacts 1093 are open, a raised level is caused on line 1110 and, therefore, on line 1097. Any open contact, then, causes line 1097 to be up.

Major lines are scanned to select halves of scanning circuits. Scanning line 1103 selects half of the discrete scanning unit. Line 1100 selects one scanning circuit within the half. Lines 1101, 1102 select the upper or lower halves of the cards.

If, then, line 1105 is pulsed after the upper half of all cards have been selected, contacts 1093 are monitored. By continuing such a scan, the status of each of the 16 scanned points is outputted over line 1097.

SOFTWARE

The computer utilized by applicants in this invention is a Model DDP-516, manufactured by Honeywell, Inc. Accordingly, the programs written for the practice of this invention are in a language suitable for that computer.

As readily apparent to any person skilled in the art, other programmable general purpose computers of similar capability may be substituted for the DDP-516. Also, other languages may be used in such other machines for the programs.

The programs set forth herein are in a basic assembly language, termed DAP-16 by Honeywell. This is a Honeywell language utilized for all of their 16 bit computers.

There are, basically, five types of programs utilized by applicants in the practice of this invention. These are the Executive System, Diagnostics, Utilities, Monitor System and Animation System. In addition, various types of programs were supplied by Honeywell with the purchased hardware. These latter programs are readily available and will not be described herein.

Executive System programs provide, as is well known, various routines for supervising the sequencing of other programs by the computer. In addition, the System handles routine input and output tasks, assignment of priorities, and so forth.

Diagnostic programs, as the name implies, are hardware test programs. Their function is to exercise the various hardware devices for test purposes. Such programs provide information useful in locating and correcting hardware malfunctions.

Utility programs used herein involve routines for such tasks as tape-to-tape copying, tape comparison, paper tape loading, and so forth.

As would be appreciated by any person skilled in the art of real time programming, programs for the above tasks may be easily written in obvious terms. Accordingly, no further description will be set out herein.

Two major software packages remain: The Animation and Monitor System. The Animation System involves animation data acquisition, disc data preparation and show control. The Monitor System includes all routines for operation of the monitor hardware as it was described herein.

Monitor System routines are listed in source form in the application entitled Monitor System and filed concurrently herewith.

Animation System routines are set forth below. The listing is from source cards. In order to use the program, it is only necessary that the following codes be assembled. ##SPC1## ##SPC2## ##SPC3## ##SPC4## ##SPC5## ##SPC6## ##SPC7## ##SPC8## ##SPC9## ##SPC10## ##SPC11## ##SPC12## ##SPC13## ##SPC14## ##SPC15## ##SPC16## ##SPC17## ##SPC18## ##SPC19## ##SPC20## ##SPC21## ##SPC22## ##SPC23## ##SPC24## ##SPC25## ##SPC26## ##SPC27## ##SPC28## ##SPC29## ##SPC30## ##SPC31## ##SPC32## ##SPC33## ##SPC34## ##SPC35## ##SPC36## ##SPC37## ##SPC38## ##SPC39## ##SPC40## ##SPC41## ##SPC42## ##SPC43## ##SPC44## ##SPC45## ##SPC46## ##SPC47## ##SPC48## ##SPC49## ##SPC50## ##SPC51## ##SPC52## ##SPC53## ##SPC54## ##SPC55## ##SPC56## ##SPC57## ##SPC58## ##SPC59## ##SPC60## ##SPC61## ##SPC62## ##SPC63## ##SPC64## ##SPC65## ##SPC66## ##SPC67## ##SPC68## ##SPC69## ##SPC70## ##SPC71## ##SPC72## ##SPC73## ##SPC74## ##SPC75## ##SPC76## ##SPC77## ##SPC78## ##SPC79## ##SPC80## ##SPC81## ##SPC82## ##SPC83## ##SPC84## ##SPC85## ##SPC86## ##SPC87## ##SPC88## ##SPC89## ##SPC90## ##SPC91## ##SPC92## ##SPC93## ##SPC94## ##SPC95## ##SPC96## ##SPC97## ##SPC98## ##SPC99## ##SPC100## ##SPC101## ##SPC102## ##SPC103## ##SPC104## ##SPC105## ##SPC106## ##SPC107## ##SPC108## ##SPC109## ##SPC110## ##SPC111## ##SPC112## ##SPC113## ##SPC114## ##SPC115## ##SPC116## ##SPC117## ##SPC118## ##SPC119## ##SPC120## ##SPC121## ##SPC122## ##SPC123## ##SPC124## ##SPC125## ##SPC126## ##SPC127## ##SPC128## ##SPC129## ##SPC130## ##SPC131## ##SPC132## ##SPC133## ##SPC134## ##SPC135## ##SPC136## ##SPC137## ##SPC138## ##SPC139## ##SPC140## ##SPC141## ##SPC142## ##SPC143## ##SPC144## ##SPC145## ##SPC146## ##SPC147## ##SPC148## ##SPC149## ##SPC150## ##SPC151## ##SPC152## ##SPC153## ##SPC154## ##SPC155## ##SPC156## ##SPC157## ##SPC158## ##SPC159## ##SPC160## ##SPC161## ##SPC162## ##SPC163## ##SPC164## ##SPC165## ##SPC166## ##SPC167## ##SPC168## ##SPC169## ##SPC170## ##SPC171## ##SPC172## ##SPC173## ##SPC174## ##SPC175## ##SPC176## ##SPC177## ##SPC178## ##SPC179## ##SPC180## ##SPC181## ##SPC182## ##SPC183## ##SPC184## ##SPC185## ##SPC186## ##SPC187## ##SPC188## ##SPC189## ##SPC190## ##SPC191## ##SPC192## ##SPC193## ##SPC194## ##SPC195## ##SPC196## ##SPC197## ##SPC198## ##SPC199## ##SPC200## ##SPC201## ##SPC202## ##SPC203## ##SPC204## ##SPC205## ##SPC206## ##SPC207## ##SPC208## ##SPC209## ##SPC210## ##SPC211## ##SPC212## ##SPC213## ##SPC214## ##SPC215## ##SPC216## ##SPC217## ##SPC218## ##SPC219## ##SPC220## ##SPC221## ##SPC222## ##SPC223## ##SPC224## ##SPC225## ##SPC226## ##SPC227## ##SPC228## ##SPC229## ##SPC230## ##SPC231## ##SPC232## ##SPC233## ##SPC234## ##SPC235## ##SPC236## ##SPC237## ##SPC238## ##SPC239## ##SPC240## ##SPC241## ##SPC242## ##SPC243## ##SPC244## ##SPC245## ##SPC246## ##SPC247## ##SPC248##

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