Description:
BACKGROUND OF THE INVENTION
1. Field of the invention
The present invention is concerned with a sustain keyer circuit for use in an electronic musical instrument, and more particularly, it relates to an improvement in sustain keyer circuits employing field effect transistors (herein-after referred to simply as FET's), the keyed characteristics of which keyer being represented by its being free of discrepancy in the gate cutoff voltages of the FET's employed.
2. Description of the prior art
Among the sustain keyer circuits using FET's which have been developed of late for use in electronic musical instruments, there is the known arrangement as shown in FIG. 1, which comprises first and second FET's Q 1 and Q 2 , which are connected in series to each other from both DC and AC viewpoints. The first FET Q 1 has its source electrode grounded, with the gate electrode being adapted to receive a tone signal through an input terminal T 1 , while the drain electrode is connected to the source electrode of the second FET Q 2 . This second FET Q 2 is connected, on the one hand, to a voltage source -Vd via a load resistance element R L , and, on the other hand, to an output terminal T 2 through a capacitor C, thus forming an electronic switch which functions as a keyer. For the sake of keying, a series circuit consisting of a resistance element R o and a key-operated switch S o is provided between the voltage source -Vd and the gate of the second FET Q 2 to thereby switch a keying voltage to be applied to the gate electrode of the second FET Q 2 by the operation of the key-operated switch S o . The above-mentioned series circuit further includes a capacitor C o connected in parallel therewith, that is, between the gate electrode of the second FET Q 2 and the ground point from AC viewpoint (herein, it is -Vd), thus forming a keying circuit having a time constant determining function, so that the above-mentioned tone signal applied to the FET Q 1 may be derived at the output terminal T 2 upon keying of the key-operated switch S o . To the gate electrode of said second FET Q 2 is connected a third FET Q 3 at its drain electrode which serves as a sustain time control circuit. The source electrode of the FET Q 3 is grounded and the gate electrode thereof is connected to a slidably movable contact r a of a variable resistor R a such as a potentiometer which is interposed between the ground and a variable DC potential source, i.e., the voltage source -Vd.
The above-mentioned sustain keyer circuit and the FET Q 3 constituting a sustain time control circuit are installed in, for example, a console of an electronic musical instrument in number corresponding to a large number, 90-100, of tone generators installed in accordance with the number of the keys of the electronic musical instruments. On the other hand, there is employed only one variable resistor R a which is assigned to adjust the gate potential of the whole FET's Q 3 to determine the value of resistance between the drain electrode and the source electrode of each of these FET's. By the operation of the variable resistor R a , the sustain time, namely, the decay time of tone output signals at the whole keyer circuits after the keying-off of the corresponding number of key-operated switches S o may be adjusted simultaneously to the desired period of time by way of the FET's Q 3 .
In the aforesaid arrangement, it will be noted that the drain-source resistance of each FET Q 3 will increase as, for example, the position of the slidable contact r a of the variable resistor R a is brought closer to the ground side thereof, and that, therefore, the transient time of charging of the capacitor C o , namely, the sustain time in the electronic musical instrument, will vary in accordance with the potential at the gate of each FET Q 3 , in other words, in accordance with the position of the slidable contact r a of the resistor R a .
In detail, the operation of such prior art arrangement will hereunder be explained.
The resistances of resistors R a and R o and the DC potential of the power source -Vd are set so that the FET's Q 1 and Q 2 are simultaneously rendered conductive or non-conductive, namely, "on" or "cut-off" in accordance with the opened or closed state of the switch S o . Along with this, whenever the key-operated switch S o is closed, the transient characteristic (response) in the course of the beginning of conduction of the FET Q 1 and the FET Q 2 is determined by the time constant which, in turn, is determined by the capacitance of the capacitor C o and the resistance of the resistor R o to thereby determine the build-up characteristic of the tone signal derived from the output terminal T 2 , while whenever the key-operated switch S o is opened, the transient characteristic (response) in the course of the ending of conduction of both the FET Q 1 and the FET Q 2 is determined by the time constant which, in turn, is determined by both of the value of capacitance of the capacitor C o and the value of resistance produced between the drain electrode and the source electrode of the FET Q 3 to thereby obtain the desired decay characteristic of the thus developed tone output signal, which can be termed "sustain time."
In such prior art keyer circuit arrangement, however, there arises inconsistency in the decay times of the tone signals as the output of the keyer circuit following a key-cutoff due to the fact that FET's generally develop various gate cutoff voltages. In addition, the decay amplitude characteristic of the output tone signal does not become exponential and fails to provide a natural sound thereby. This will be well understood by the following explanation with reference to FIGS. 2 a through d. FIG. 2 a shows the gate-source voltage Vgs to drain-source current I characteristic of a P channel enhancement mode MOS type FET as the FET Q 2 , where Vth represents the gate cutoff voltage thereof. Accordingly, when a gate voltage Vg as shown in FIG. 2 b is applied to the gate of the FET Q 2 of the type described above, a rectangular waveform input signal applied to the gate of the FET Q 1 is derived at the output terminal T 2 in the form of a signal having an envelope curve as shown in FIG. 2 c. However, since the gate cutoff voltages of FET's are different from one FET to another by about ±50 percent, the decay times will be likewise inconsistent as shown by, for example, the broken lines X or Y in FIG. 2 c in accordance with inconsistency in gate cutoff voltages of the FET's which are employed. The foregoing decay characteristic becomes substantially linear in amplitude, and will assume an upwardly curved pattern as shown by the envelope curve in logarithmic scale (dB) in FIG. 2 d. The tone decay having such a decay characteristic in an electronic musical instrument is not desirable because of the lack of naturalness in the decaying pattern.
Furthermore, no consideration has been made in the prior art keyer circuit as described above with respect to the problem of signal leakage which develops unavoidably in case of employment of FET's through which tone signals are keyed.
SUMMARY OF THE INVENTION
It is, therefore, a principal object of the present invention to provide a sustain keyer circuits capable of producing a uniform output signal decay characteristic which is free of any inconsistency in the properties of the major components employed.
Another object of the present invention is to provide a sustain keyer circuit for use in an electronic musical instrument, which comprises a keyer FET having its gate electrode adapted to receive an input tone signal and its drain electrode adapted to be keyed by a keyer control voltage and to derive a keyed tone signal thereat, another FET determining the sustain time constant following the opening of a key-operated switch together with a capacitor in a time constant circuit in the sustain keyer and having its gate to vary its equivalent resistance value in accordance with a rectangular waveform signal applied thereto, which signal has a variable duty factor controllable by an instrument player, thereby controlling the sustain characteristic uniformly, independently of the inconsistency in the gate cutoff voltages of the FET's employed.
A further object of the present invention is to provide sustain keyer circuits for use in an electronic musical instrument, which are capable of reducing signal leakage occurring upon mixing a plurality of keyed tone signals.
A still further object of the present invention is to provide sustain keyer circuits for use in electronic musical instruments, which are caused to reduce signal leakage due to the capacitance between the gate electrode and the drain electrode of an FET which is employed as the keyer.
Other objects, features and attendant advantages of the present invention will become apparent from the following description when taken in conjunction with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a circuit diagram illustrating a prior art keyer circuit for use in an electronic musical instrument, said keyer circuit employing FET's therein.
FIG. 2 a through d are charts for explaining the operation of the prior art keyer circuit, wherein FIG. 2 a is a characteristic curve of the gate-source voltage Vgs to the drain-source current I in an enhancement mode FET; FIG. 2 b is the waveform of a voltage which is applied to the gate G of FET Q 2 shown in FIG. 1; FIG. 2 c is a waveform showing an output signal at the circuit of FIG. 1; and FIG. 2 d is a waveform showing an output signal at the circuit of FIG. 1 in decibels.
FIG. 3 is a circuit diagram of a sustain keyer circuit illustrating an embodiment of the present invention.
FIG. 4 is a diagram showing a waveform of an output tone signal derived from the sustain keyer circuit of FIG. 3.
FIG. 5 is a circuit diagram representing a modification of a part of the circuit shown in FIG. 3.
FIGS. 6 and 7 are circuit diagrams showing other embodiments of the present invention, respectively.
It should be understood that like parts are indicated by like references and numerals throughout this specification.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
For the sake of simplicity of explanation, the following embodiments of the present invention will be explained by comparing with the prior art circuit which is shown in FIG. 1.
Description will hereunder be made on an embodiment of the present invention with reference to FIGS. 3 and 4.
Referring now to FIG. 3, there is shown a keyer circuit arrangement according to the present invention, which comprises: a p-type enhancement mode FET Q 11 with grounded source electrodes S, whose gate electrode G is adapted to receive a tone signal through the input terminal T 1 from a known tone generator such as a flip-flop circuit not shown and whose drain electrode D is connected directly to a mixing load resistor R L as well as to the output terminal T 2 which is common to a plurality of keyer circuits dealing with respectively different tone signals; a series circuit of a key-operated switch S o , a resistor R K and a first resistor 1 connected between the drain electrode of FET Q 11 and a power source line -Vd to form a keying circuit, a second resistor R 2 connected in parallel with the FET Q 11 between the drain and source electrodes thereof, a capacitor C d connected between the juncture of the resistor R 1 and the resistor R K and the power line (as an A.C. ground), and a p-type enhancement mode FET Q 22 as a switching element with its drain electrode connected at the connection point between the capacitor Cd and the resistor R 1 and its source electrode grounded. The FET Q 22 has its gate electrode adapted to receive a rectangular wave signal from a rectangular wave generator A to be rendered alternately conductive and non-conductive.
In operation, when the key-operated switch S o is opened, the capacitor Cd is charged up by the DC power source -V D and the drain electrode of the FET Q 11 is at the ground potential thereby, so that the FET Q 11 is maintained in its non-conductive state and hence in spite of a tone signal of a rectangular waveform applied to the gate electrode of the FET Q 11 , no output signal may be derived at the output terminal T 2 , while when the switch S o is closed, the capacitor Cd will begin to discharge through the resistor R K and the switch S o to thereby increase the drain potential of the FET Q 11 in the negative sense continuously, and as a result, the FET Q 11 is rendered conductive due to the rectangular waveform signal applied to its gate electrode. Accordingly, with the key operated switch S o closed, the FET Q 11 will be rendered non-conductive at a moment the applied input signal has zero level, whereas this FET is rendered conductive at a moment the input signal has a level above a predetermined level V. The resistance between the source-drain electrodes of the FET Q 11 will become infinitely high under its non-conductive state, while the resistance will become lower under its conductive state which latter resistance is hereinafter designated by R g1on . Furthermore, let us now assume that V H represents the drain potential of FET Q 11 in its non-conductive state, and that V L is the drain potential of FET Q 11 in its conductive state, then the signal voltage V S (peak to peak value of an available A.C. output) which is derived at the drain electrode of the FET Q 11 can be expressed by the following formula:
V S = V H - V L = (V D - V K ) [R 2 /(R 1 + R 2 ) - R o /(R 1 + R o )],
wherein:
R o = (R 2 . R q1on )/(R 2 + R q1on ) ; and
V K represents the voltage across the capacitor Cd.
FIG. 4 shows a graph of the above-mentioned signal voltage at the output terminal T 2 in association with the input signal applied to the input terminal T 1 . As will be apparent from the above-mentioned formula, the output signal voltage is independent of the gate cutoff voltage of the FET Q 11 .
The build-up characteristic Tr of the output signal upon keying the key-operated switch S o is determined by a time constant, which is determined by the capacitance of the capacitor Cd and the resistance of the resistor R K provided that the resistance value of the resistor R K is set as follows: R K << a parallel resistance composed of "R 1 + R 2 " and "the effective resistance of the FET Q 22 when viewed from its drain side toward the ground side." The resistor R K is only for determining the build-up time constant, and is not necessarily significant in this invention.
Then, upon release of the key-operated switch S o , the capacitor Cd begins charging again through the effective (average) resistance of the FET Q 22 , and the output signal decays gradually thereby. The decaying characteristic of the output signal is determined by a time constant, which is determined by the capacitance of the capacitor Cd and mainly the effective drain-source resistance of the FET Q 22 (also by the resistance value of the circuit including the resistor R 1 , the resistor R 2 and the FET Q 11 ). Accordingly, the decaying characteristic of the tone signal after keying-off, namely the so-called sustain characteristic, can be varied by varying the effective drain-source resistance of the FET Q 22 as required.
Referring to FIG. 5, there is shown an example circuit for controlling the FET Q 22 , in which arrangement is provided so that the output signal produced in a triangular waveform having a predetermined repetition frequency, such as 40 kHz, which is higher than the audible frequency and which is obtained from a triangular waveform generator G is applied via a DC blocking capacitor C' and a diode D in this order, to the input side of the known Schmitt trigger circuit F which is comprised of elements such as transistors and resistors, and that the rectangular waveform output terminal T o of the Schmitt trigger circuit F is connected to the gate electrode of the FET Q 22 having other two electrodes connected to the ground and the resistor R 1 , the capacitor Cd, and the resistor R K -- which constitutes the keying circuit -- of the sustain keyer circuit so that the rectangular waveform output signal of the aforesaid predetermined repetition frequency which is produced in said Schmitt trigger circuit F is applied to the gate electrode of the FET Q 22 . By the use of the aforesaid circuit arrangement, the latter is operative in such a way that, by changing the DC potential of the point d of connection between the capacitor C' and the diode D via a variable resistor R B which is interposed between the voltage source -V c and the ground, the duty factor (meaning the ratio of a pulse width to a pulse repetition period of the rectangular waveform signal produced at the output terminal T o ) is varied continuously from 0 to 100 percent so that the conducting-to-nonconducting time ratio of said FET Q 22 (in other words, the time ratio between the momentary conducting time and the momentary non-conducting time of this FET Q 22 ) is changed from 0 to ∞. It is to be noted that both the sustain keyer circuit and the aforesaid FET Q 22 are provided in, for example, the console of an electronic musical instrument each in number corresponding to the multiplicit number of tone generators installed in accordance with the number of the keys of the electronic musical instrument. It should be noted also that such elements as the triangular waveform generator G, the variable resistor R B and the Schmitt trigger circuit F are provided one each in such a way that the combination of these elements is used in common to said multiplicit number of FET Q 22 to continuously effect simultaneosus change of the conductive time of said multiplicity of FET Q 22 by changing the duty factor of the rectangular waveform signal generated at one output terminal T o of said Schmitt trigger circuit F .
Let us now assume that the circuitry is in the state such that the DC level of an output signal form the triangular wave generator G is set at a predetermined value by means of the variable resistor R B and that the duty factor of the rectangular wave produced at the output of the Schmitt trigger circuit F is set at a predetermined value to have the conducting to nonconducting time ratio of the FET Q 22 set at a predetermined value of the order of, for example, 0.5When the key-operated switch S o is opened in such a state of the circuitry, the drain electrode of the FET Q 22 and the drain electrode of the FET Q 11 are at the ground potential. So, this latter FET Q 11 is held in its "cut-off" state. Accordingly, the tone signal which is always applied to the gate electrode of the FET Q 11 does not appear at the drain side of the FET Q 11 .
During the foregoing operation of the circuitry, it will be underdtood that the capacitor C d which is connected through resistor R 1 to the drain electrode of the FET Q 11 is in the state of being charged up with the voltage of the power source -V d by the repetition of the momentary conducting which is effected between the drain electrode and the source electrode of the FET Q 22 , with the junction between the capacitor C d and the FET Q 22 being at a voltage potential substantially equal to the ground potential zero.
On the other hand, when the key-operated switch S o is closed, the charge on the capacitor C d which has been in the state of being charged up in the mode of operation described above is discharged through the resistance element R K which, in turn, is connected in series with said key-operated switch S o , and along with this, the potentials of both the drain electrode of the FET Q 11 and the drain electrode of the FET Q 22 approach the negative potential of the power source -V d . As a result, the FET Q 11 will become conductive as the tone signal which is applied to the input of the FET Q 11 is derived, as the output tone signal having a build-up characteristic in accordance with the characteristic of the keyer circuit, at the output terminal T 2 via the drain electrode of this FET Q 11 . The tone signal thus derived may be amplified as desired to be converted to an audible sound wave to be given out from such an appliance as a loud speaker not shown.
Next, when the key-operated switch S o is opened again, the capacitor C d which has been in the state of being discharged in the mode of operation described above begins to be charged up with the voltage of the power source -V d through the average (effective) resistance between the source and the drain of the FET Q 22 which is rapidly switched to be momentarily conducting and momentarily non-conducting, and along with this, the drain potential of the FET Q 11 as well as the drain potential of the FET Q 22 approach the ground potential. Also, when the potentials of these two electrodes constituting a keying terminal take a value in excess of a predetermined potential for a period of time, the FET Q 11 will produce no output at its drain electrode in the same manner as that described in connection with the opened state of the key-operated switch S o . Thus, it will be understood that the decaying characteristic of the output signal is determined by the time constant which is determined by the combination of the capacity of the capacitor C d , the average resistance resulting from the conducting to non-conducting time ratio between the drain and the source electrodes of the FET Q 22 , and a series resistance of resistors R 1 and R 2 (also incluing the FET Q 11 ).
The aforesaid sustain time or the decay time of an electronic musical instrument may be controlled by varying the DC level of the triangular waveform signal applied to the input side of the Schmitt trigger circuit F, by altering the resistance value of such an element as the variable resistor R B to thereby alter the duty factor of the rectangular waveform output signal derived at the output of said Schmitt trigger circuit F, whereby continuously varying both the momentary duration of cut-off time and the momentary duration of conducting time of the FET Q 22 . For example, from a viewpoint of the duty factor, when the momentary conducting period of time is considerably smaller as compared with the momentary cut-off period of time, the length of charge-up time of the capacitor C d following the opening of the aforesaid key-operated switch S o (meaning after the key switch-off time) will accordingly become greater. Hence, the sustain time or the decay time of the tone signal which is derived at the output terminal T 2 under the aforesaid condition will be prolonged. Contrariwise, in case where the momentary conducting period of time of the FET Q 22 is substantially great as compared with its momentary cut-off period of time, the length of charge-up time of the capacitor C d following the opening of the key-operated switch S o is reduced, so that the sustain time or the decay time of the aforesaid tone signal will become shorter. In this way, the sustain time of an electronic musical instrument can be controlled. However, in the present invention, the circuitry is arranged in such a way that the gate potential of the FET Q 22 is controlled at a very high repetition rate, such as 40 kHz so that this FET Q 22 can alternately become fully conductive and fully non-conductive. As a result, the FET Q 22 can effect the switching between its cut-off state and its conductive state at a high speed, regardless of the gate cut-off voltage of this FET Q 22 . Thus, the FET Q 22 is always held in either the fully conducting or fully non-conductive state, and the average (effective) internal resistance between the drain and the source electrodes of this FET Q 22 will be caused to vary by the varying duty factor. Therefore, it is possible to consider that the voltage to current characteristic is of a value equivalent to that of a variable resistor having a linear voltage to current characteristic. Thus, the decay characteristic of the tone signal within the aforesaid sustain time can be obtained as one which is quite close to a complete rectilinear line as shown by the envelope straight lines in logarithmic (dB) scale, so that the optimum auditory exponential decay pattern can be obtained.
It is to be noted that, by the employment of only one each of the rectangular waveform signal generating means -- such as the triangular wave generator G, the Schmitt trigger circuit F, the diode D and the variable resistor R B , which are capable of varying the duty factor -- it is possible to effect the switching of a number of FET Q 22 assigned for controlling the sustain time. Thus, the circuitry of the present invention is of many advantages that it can be produced easily and at a low cost, which is highly useful industrially.
From the foregoing description of the present invention, it will be understood that a keyed tone signal may be derived at the junction between the resistor R 1 and the keyer FET Q 11 in each keyer circuit regardless of the inconsistency in the gate cut-off voltages of the FET's which are employed.
Practically, in an electronic musical instrument having a large number of keyer circuits, there can arise the case that those keyed signals derived from a plurality of keyer circuits -- corresponding in number to the number of half octave tone keys -- are mixed, using the resistor R L in common to the group of keyer circuits. In such an arrangement, there may occur an undesirable signal leakage due to the possibility that the potential of a tone output signal keyed by a keyer circuit being turned on is given to a keyer FET Q 11 of another keyer circuit. In order to obviate this shortcoming, a class-A buffer amplifier including an FET Q 33 is provided, as shown in FIG. 6, in each keyer circuit of FIG. 3. To the gate electrode of the FET Q 33 is connected the drain electrode of the FET Q 11 , and to the drain electrode of the FET Q 33 is connected the common load resistor R L as mentioned above. Whereby, the intended tone signal mixing can be performed without a separate damper of signal leakage, since a gate current in FET's is in the order of 10 - 15 ampere in magnitude. A resistor R S connected to the source electrode of the FET Q 33 serves to reduce the inter-modulation distortion in the resulting tone signal which may take place due to the changes in the resistance of the FET Q 11 when looking at from the drain side thereof, which changes are caused by the variations in the drain potential of other keyer circuits.
FIG. 7 shows a further embodiment of the present invention which is intended to reduce as much as possible the signal leakage occurring due to the gate-drain capacitance of the keyer FET Q 11 as a rectangular waveform signal is applied to the input of this keyer FET. The signal leakage is considered to be caused because the applied rectangular waveform contains very high harmonics, in other words, because such rectangular wave contains harmonics over the range up to about 1 MHz clearly.
For the purpose of eliminating the signal leakage, the circuit of FIG. 6 is further provided with another FET Q 44 between the keyer FET Q 11 and the input terminal T 1 in each keyer circuit to become of a circuit as shown in FIG. 7. To the gate electrode of the FET Q 11 is connected the drain electrode of the FET Q 44 and a capacitor at its one end and grounded at the other end. The input terminal T 1 is connected to the source electrode of the FET Q 44 whose gate electrode is connected to the power source -V D . The FET Q 44 which is thus arranged is employed as a resistance element capable of exhibiting a high resistance value, for example, 10 M Ω. The capacitor C is set to have the capacitance of 1 pF, for example. Thus, there is formed a kind of low pass filter which comprises the drain-source resistance of the FET Q 44 and the capacitance of the capacitor C to thereby eliminate higher harmonics of the rectangular waveform input signal beyond the order of, for example, 16 kHz, resulting in an extreme reduction of signal leakage due to the gate-drain capacitance of the keyer FET Q 11 . Furthermore, even if a man's finger contacts the input terminal T 1 , there arises no danger of causing the breakdown of the FET Q 11 caused by an electrostatical shock, since a high resistance of the FET Q 44 is interposed between the input terminal T 1 and the FET Q 11 .
As will be clear from the foregoing description, the novel keyer circuit arrangement of the present invention not only provides desired keyer characteristics by overcoming the problem of inconsistency in the gate cut-off voltages of the FET's employed, but also it can prevent a signal leakage which can take place upon the mixing of keyed tone signals of different keyer circuits and can reduce any signal leakage source line; from the gate-drain capacitance of each keyer FET. It is to be noted that the above-mentioned circuit arrangement is very much suitable for and convenient to circuit integration (IC production).