Griffin, John R. (Portland, OR)
Forsberg, Charles A. (Tigard, OR)

04/782396

05/18/1971

12/09/1968

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Tektronix, Inc. (Beaverton, OR)

345/18

345/647, 345/26

G09G1/18; G09G1/26; G09G1/14; H01J29/70

340/324.1

3449620

DEVICE FOR REPRODUCING INFORMATION ON THE SCREEN OF A CATHODE-RAY TUBE

June 1969

Caron et al.

Waring, Alvin H.

Trafton, David L.

We claim

1. Character generator apparatus cooperable with display means for causing said display means to provide a representation of one or more characters, wherein said display means is provided with writing means, said apparatus comprising:

2. The apparatus according to claim 1 wherein said display means comprises a cathode-ray tube, said writing means comprising an electron beam emitted by an electron gun toward the face of said tube in order to visibly portray characters thereupon in accordance with the elemental portions thereof as said coincidence is detected by said detection means.

3. The apparatus according to claim 2 wherein said cathode-ray tube includes flood gun means, as well as electron gun, for causing said tube to exhibit bistable storage properties.

4. The character generator apparatus according to claim 1 further including means for translating information, received by said receiving means, into the identification of elemental portions of said pattern for portraying a particular character, said identification of elemental portions being supplied to said detecting means.

5. Character generator apparatus cooperable with a cathode-ray tube for causing said cathode-ray tube to provide a representation of a plurality of characters, said apparatus comprising:

6. The apparatus according to claim 5 wherein said responsive means comprises a first monostable circuit for interrupting the counting of said counters while said deflection means stabilize, and a second monostable circuit operated at the conclusion of the operation of the first monostable circuit for causing the energization of the electron beam in said cathode-ray tube.

7. The circuit according to claim 6 further including a clock generator for normally stepping said counters, said clock generator being inhibited by the operation of either of said monostable circuits.

8. The apparatus according to claim 5 wherein said responsive means includes a third counter which starts counting at said coincidence,

9. Character generator apparatus cooperable with a cathode-ray tube for causing the cathode-ray tube to provide a representation of a desired character, said apparatus comprising:

10. The apparatus according to claim 9 wherein said means for halting and enabling comprises means for providing a first delay during which said electron beam is not energized so that the prospective position thereof may become stabilized, and second means for causing said electron beam to write a portion of the desired character for a predetermined period.

11. The apparatus according to claim 10 wherein each of said first and second means operates to inhibit said clock generator.

BACKGROUND OF THE INVENTION

A cathode-ray tube apparatus is attractive for the output of computer information because of the rapid writing speed thereof as compared with mechanical devices. For example, cathode-ray tube presentations are advantageously utilized in computer terminal apparatus for communicating with a remote computer on a time shared basis over a telephone line.

If alphanumeric information is to be displayed, several methods are available for deflecting the cathode-ray tube's electron beam in a desired pattern. The cathode-ray tube apparatus may include a character generator capable of deflecting the tube's electron beam into the pattern of an identified character. If a separate circuit or device is employed to form and write each and every character in the generator's repertoire in response to a command, the generator can become quite complex. Alternatively, characters may be made up of small elements such as dots or strokes. However, random movement of the tube's electron beam as between dots, for example, requires extensive instructions from the computer for the formation of each character. In such an instance the computer memory becomes a part of the character generator with operation being in a programmed point plot made. A third alternative is employed according to the present invention, wherein the cathode-ray tube's deflection apparatus is operated so that the tube's electron beam would be consecutively positioned at locations to write the elements of all possible characters in the repertoire of the apparatus. Thus, the electron beam is successively moved so that, if energized, it would write a matrix of dots, and when the location of a particular dot is reached which should be written in order to present a character element, the electron beam is properly energized such that the writing of this element will take place. The electron beam must pause long enough at the location of a dot so that the dot may be written. Assuming a fairly large repertoire of characters, comprising at least the alphabet and numbers zero through nine, the prospective movement of the electron beam through all possible dot positions tends to be time consuming.

SUMMARY OF THE INVENTION

According to the present invention, character generator apparatus includes a means for causing a writing means such as an electron beam in a cathode-ray tube to move in a regular pattern corresponding to the elemental parts from which a plurality of selectable characters may be composed. This movement is normally at a fairly rapid speed, e.g. more rapid than would permit the writing of the elemental characters. However, when a character element is to be written, such condition is detected and the writing means is slowed down such that the character element can be written. After the character element is written, the writing means is restored to its faster rate of movement, that is assuming a next adjacent character element in the pattern is not also to be written. Since the number of character elements in a particular character are small compared to the total elements required for a repertoire of characters, movement of the writing means is on the whole much faster than would be the case if the writing means were moved at a speed wherein any element in a pattern could be written. Consequently, the speed of character writing is greatly increased and an appreciable saving in text writing time is achieved.

It is accordingly an object of the present invention to provide an improved character generator apparatus for presenting characters on the screen of a cathode-ray tube.

It is a further object of the present invention to provide character generator apparatus for presenting characters on an analog writing means in response to a minimum of character selection data.

It is a further object of the present invention to provide an improved character generator apparatus for presenting characters on an analog display means in response to minimum input identification data, and at a high writing speed. It is another object of the present invention to provide an improved character generator apparatus for providing a presentation of alphanumeric characters on an analog display means, which apparatus is relatively uncomplex and inexpensive, but which provides a high degree of character definition.

The subject matter which we regard as our invention is particularly pointed out and distinctly claimed in the concluding portion of this specification. The invention, however, both as to organization and method of operation, together with further advantages and objects thereof, may best be understood by reference to the following description taken in connection with the accompanying drawings wherein like reference characters refer to like elements.

DRAWINGS

FIG. 1 is a block diagram of a character generator apparatus according to the present invention;

FIG. 2 is a schematic diagram illustrating parts of a dot matrix and scanning sense array employed in the FIG. 1 circuit;

FIG. 3 is a schematic diagram of slow-down-and-write circuitry according to the present invention; and

FIG. 4 is a block diagram of alternative slow-down-and-write circuitry employing digital techniques.

DETAILED DESCRIPTION

Referring to the drawings, and particularly to FIG. 1, the apparatus according to the present invention operates a storage tube 10 for presenting a visual display of characters in response to computer output information or the like. The storage tube comprises an envelope 12 having a principal electron gun including a cathode 14, a control grid 16, a filament 18, and a focusing and accelerating structure 20. The electron beam 22, produced by writing means comprising a principal electron gun, is deflected horizontally by means of horizontal deflection plates 24 and vertically by means of vertical deflection plates 26. The beam 22 is in general directed towards a target disposed on the inner side of glass end plate 28, such storage target including a transparent storage target electrode 30 which may comprise a thin conductive layer such as tin oxide. The electrode is coated over its inner surface by a secondary emissive dielectric layer 34 of phosphor material. This layer is advantageously an integral semicontinuous phosphor layer which has a sufficiently porous structure to enable transmission of secondary electrons through such layer for collection by the conductive target electrode 30. Alternatively, portions of the target electrode areas may extend through portions of the phosphor layer to provide a raised collector configuration.

The storage tube 10 is additionally provided with one or more flood type electron guns 36 which are supported inside envelope 12 adjacent the ends of vertical deflection plates 26 closest to the target. Electrons emitted from the flood guns diverge into a wide beam which is substantially uniformly distributed towards phosphor layer 34. A plurality of electrodes are also provided on the inner surface of envelope 12 beyond the flood guns. A first electrode 38, connected to the midpoint of a voltage divider disposed between a positive voltage and ground, acts to provide a more uniform electric field for collimating electrons. A second electrode 41 near the target end of the tube is also connected to the midpoint of a voltage divider between a positive voltage and ground and acts to collimate electrons as well as possible to collect some secondary electrons.

A storage tube and target of the foregoing type is set forth and claimed in Robert H. Anderson U.S. Pat. No. 3,293,473, granted Dec. 20, 1996, entitled "Thin, Porous Storage Phosphor Layer," and assigned to the assignee of the present invention. This storage target may also be of the raised collector type as set forth and claimed in the copending application of Roger A. Frankland, entitled, "Cathode Ray Storage Tube and Method of Manufacture" filed Feb. 28, 1967, Ser. No. 619,904, which is also assigned to the assignee of the present invention.

During normal operation of the tube, the tube potentials are such that beam 22 has a relatively high velocity and is capable of producing secondary electrons when it strikes phosphor layer 34. Secondary electrons are then suitably collected by the target electrode 30, in which case an elemental area of target can be driven positive or "written" as the result of secondary emission. A written area is retained at a relatively positive potential after beam 22 has passed such elemental area because of the action of flood guns 36. Flood guns 36 produce relatively low velocity electrons which strike the target but which ordinarily have insufficient velocity for writing information. When electrons from flood guns 36 strike areas of the target upon which a positive charge has not been written, these flood electrons tend to maintain such areas at the relatively negative potential of the flood guns. This is one stable potential level of the target. However, the flood gun electrons are attracted by positive elemental areas and obtain a high velocity with respect to these areas for producing continued secondary emission therefrom. Therefore these last mentioned areas are maintained relatively positive or near the potential of the target electrode. This latter potential comprises the second stable potential level of the target. The target thus has bistable properties and is capable of retaining information written thereon, with the flood beam of electrons driving target areas toward one of two stable potentials depending upon the information written thereon with beam 22. Since the dielectric 34 comprises a phosphor, the storage tube is of the direct viewing type, and character information of the like, once written on the target dielectric, can be retained almost indefinitely by the storing action of the flood guns.

For erasure purposes, target electrode 30 is connected to an erase generator, and also to voltage dividers disposed between a positive voltage and ground. An erase signal applied by the erase generator 40 comprises a positive-going pulse immediately followed by a negative-going pulse. The positive portion of this signal fades the target positive, that is, causes the entire target to attain a positive state of secondary emission corresponding to the written bistable state of the target. The negative-going portion of the signal returns the entire target to a negative or nonwritten condition. This erase procedure is preferred because it results in uniform erasure wherein the entire target can end up at substantially the same potential.

Referring further to FIG. 1, a computer 42 or some other source of digital information is connected to a local interface and terminal control 44 via a telephone line or the like 43. The interface and terminal control as well as tube 10 may form part of a computer terminal for communicating with a computer at a remote location and providing an output indication in accordance with digital data transmitted from the computer memory. The interface and terminal control in turn operates a character generator according to the present invention for providing a visual display of the information received, upon the face of storage tube 10.

The character generator according to the present invention causes the storage cathode-ray tube to provide a dot presentation from which the characters are made up. Each dot, in this instance, comprises an elemental portion of a character. The CRT beam 22 is moved to a position, unblanked, moved to another position, unblanked, etc. with the dots being arranged in such a pattern that the results form a letter, number, or punctuation mark (collectively called characters). Random movement of the beam between dots for each character is generally impractical for a character generator, since this would be essentially a point-plot mode and would require several 12-bit words from a computer for each dot. Instead, the beam is made to move by steps through a fixed pattern, here comprising a rectangle of seven by nine dot positions. The dot rectangle is called a dot matrix and is illustrated at 62 in FIG. 1 as it would appear on the screen of the CRT, although it is normally not visible as such since beam 22 is blanked for most dot positions. The characters are formed by turning on the electron beam 22, or at least by turning it on to a greater extent, at selected positions as the beam 22 is stepped through the matrix. The blanked-dot rectangle is longer in the vertical axis than in the horizontal axis to give the characters the correct aspect ratio. For example, nine dots vertical and seven dots horizontal make up a 7×9 dot matrix.

Beam stepping is operated in synchronism with a system clock 60. The clock is an oscillator, the output of which is squared up to provide a clock pulse for each oscillation. The output of the clock is sent to a 9-count Y counter 50. The Y counter, 50, counts from 1 to 9, and then resets. Each clock-pulse input causes the Y counter to increment once. The X counter, 51, counts from 1 to 7, and then resets. Each reset of the Y counter causes the X counter to increment once. The X counter then increments each time the Y counter has counted up to 9. The counters are of the binary type, and provide their outputs respectively to binary-to-decimal converters 48 and 49, and to digital-to-analog converters 52 and 53.

The Y digital-to-analog converter 52 changes each number in the counter to a vertical analog position voltage. As the counter counts, analog voltage steps are applied to the vertical deflection plates of the storage tube through amplifier 56. The X digital-to-analog converter 53 changes each number in the X counter to a horizontal analog-position voltage. As the X counter counts, analog voltage steps are applied to the horizontal deflection plates of the storage tube via horizontal amplifier 54.

According to the sequence, the clock drives the Y counter for nine counts, and at that time the Y counter resets. The reset increments the X counter one count. Then, there are nine more Y counts, the X counter increments, and so on. The result will produce the dot matrix as indicated at 62 in FIG. 1. If the beam were unblanked, the display would appear as a vertical row of dots (starting in the upper left hand corner), a horizontal shift, and then another vertical row of dots, etc. The counter outputs thus cause the X and Y digital-to-analog converters to output analog voltages that step the beam in the pattern of the 7×9 rectangle. The beam has then been stepped through a total of 63 positions.

The Y binary-to-decimal converter 48 has nine output lines (numbered employing Roman numerals in FIG. 2), and the X binary-to-decimal converter 49 has seven. As the Y counter 50 counts from 1 to 9, the Y binary-to-decimal converter will have outputs first on line I, then II, then III, and so on up to IX. The binary-to-decimal converter 49 acts in the same manner, but has only seven output lines, 1 through 7. These output lines are connected to a 7×9 scanning sense array 47 to provide information as to the beam position on the display. This is necessary to assure that the proper dots can be unblanked to draw the character. The scanning sense array is made up of 63 triple input AND gates, one gate for each dot position in the character matrix. When all three inputs of an AND gate are energized, an output is provided to Z-axis amplifier 58 causing the particular dot to be unblanked. Thus, there is one AND gate for each possible dot position.

The other inputs to the scanning sense array 47 will now be considered. The character selection is made by a 7-bit code, or seven characters in parallel from the computer interface. Each combination of those seven bits or a "word" will cause a unique character to be written. The 7-bit word is entered into a register within binary-to-96 line converter 45. Binary-to-96 line converter 45 also includes a symbol-select matrix, comprising a translator or decoder, which interprets the 7-bit code and selects or specifies the proper character line. There are 96 possible character lines in the specific embodiment, since there are 96 lines in the ASCII code, that is the American Standard Code for Information Interchange, or a teletypewriter modification thereof. The 7-bit word is capable of 128 unique selections. Those left over may be used for special commands, instead of characters. The decoding of this binary digit series or word into an output on one of the 96 lines is accomplished in a conventional manner, and a number of conventional circuits may be used therefor such that each unique binary combination produces an output on no more than one of the 96 lines.

These 96 output lines from binary-to-96 line converter 45 are connected to a diode matrix or memory 46. When one of the 96 lines is activated, a number of diodes connected to that line are put in conduction. Each of these diodes connects to the scanning sense array 47. It takes from four to about 30 diodes to make up a character depending upon its complexity. The average character takes 16.7 diodes. Since there are 96 possible characters, and there are an average of 16.7 diodes per character, the diode matrix contains approximately 1,600 diodes. For each of the 96 lines, a plurality of diodes connect to ones of the AND gates in scanning sense array 47 for selecting the dots in the array which are to be unblanked in order to produce a representation of a character. The letter R in dot matrix 62 is composed of 26 dots, there being one diode in diode matrix 46 for each such dot.

The diodes in diode matrix 46 may be termed a "read only memory," because whenever one line of the 96 is activated, specific diodes transfer the information to the scanning sense array. The diode circuitry has "memorized," that is, it is wired to connect specified diodes when a character line is activated.

Returning to scanning sense array 47, when the input from the X and Y binary-to-decimal converters 48 and 49 (indicating dot position) coincide with the character information for a dot which is to form part of the character, the scanning sense array outputs a pulse indicating a dot is to be written and stored on the bistable storage tube target. Writing of a particular dot is accomplished by unblanking Z-axis amplifier 58, as hereinafter more fully set out. The scanning sense array comprises coincidence detecting means according to the present invention. Coincidence has taken place at 26 points in the dot matrix, as illustrated at 62, to form the letter R. Thus the 7-bit word applied to binary-to-96 line converter 45 causes the character generator to unblank designated dot positions as the character generator steps through the 7×9 matrix. The resultant character is formed from up to 30 of those 63 dots. Conventional circuitry is employed in digital-to-analog converters 52 and 53 as well as the counters and binary-to-decimal converters 48 and 49.

Typical circuitry for diode matrix 46 and scanning sense array 47 is illustrated in FIG. 2. The portions illustrated bring about the writing of the letter R when line 70 is enabled, the latter comprising one of the 96 lines from binary-to-96 line converter 45. Each of the diodes 72 is provided with a positive input from line 70 so that conduction may take place therein. Each of the diodes specifies a particular point or dot position in the dot matrix where the electron beam should be enabled, and each of the diodes connects to one of the AND gates 74, in scanning sense array 47, which corresponds to such dot position. As the X binary-to-decimal converter 49 sequences through outputs 1 through 7, selected of the AND gates 74 are also provided with a second input. While X binary-to-decimal 49 provides a one output, Y binary-to-decimal converter 48 sequences through outputs I through IX. As can be seen, the top nine AND gates 74 are energized successively by outputs from I through IX of converter 48, since then each of these gates in succession receives three necessary inputs. Then, the Z-axis circuitry of cathode-ray tube 10 will be enabled for these nine successive positions. The electron beam 22 will successively move downward along the first column at the left-hand side of matrix 62 in FIG. 1, when converter 49 provides a one output, and converter 48 sequences through outputs I through IX. Therefore, in each of these dot positions, the electron beam 22 will be turned on, writing the left-hand side stroke of the R. When X binary-to-decimal converter 49 provides an output on lead 2, two further AND gates 74' are operated at times when X binary-to-decimal converter 48 provides outputs on lines I and V, thus writing the beginning of the upper rounded portion of the R. This sequence continues until the entire character is written. It will be appreciated that the FIG. 2 circuit is by way of example only. A different connection of diodes and gates is implemented for each of the characters to be written.

Returning to FIG. 1, the digital-to-analog converter 52 receives further information from interface and terminal control 44 via position lines 64. These lines encode in binary fashion the desired location of a particular character upon the face of the cathode-ray tube. Thus, the interface and terminal control provides control signals on lines 64 which coarsely set the location of electron beam 22. Then, the information delivered to binary-to-96 line converter 45 unblanks the electron beam as clock 60 moves the electron beam position through the dot matrix. Each difference in deflection information digitally provided via lines 64 grossly positions the electron beam to a different location suitably separated from other locations horizontally by more than the width of the dot matrix and vertically by more than the height of the dot matrix.

According to the present invention, the writing means, comprising electron beam 22, is normally sequenced through the possible positions of the dot matrix at a relatively high speed, faster than would permit normal writing of a dot on the face of the cathode-ray storage tube. In the instance of one storage tube, the dot writing time is 20 microseconds. With the 7×9 matrix, if the electron beam stopped at each dot position in the dot matrix long enough to write, a total of 1.26 milliseconds would be required for each repetition of the dot matrix. Since most characters are drawn by unblanking only 5 to 25 of the 63 dots, a considerable speedup in character writing time is had according to the present invention by stepping along the nonwritten dot positions in a minimum time, for example, half a microsecond to 1 microsecond. For this purpose, a clock 60 may have an output pulse frequency of approximately 2 megahertz. Then, when a particular dot position is detected at which a dot is to be written, the beam is slowed down, for example halted in its movement for the full 20 microseconds, for the dot to be written. Five microseconds are allotted for the cathode-ray tube's electron beam to settle to the proper location before writing a dot. As a result, a considerable saving in text writing time is achieved.

The present invention is suitably implemented as further illustrated in block diagram form in FIG. 1. When scanning sense array 47 detects coincidence of the location of the electron beam with the position at which a dot is to be written, an output is provided on line 76 to AND gate 78. Gate 78 also is provided an input from clock 60, which is substantially continuously running at this time. As a result, a first monostable multivibrator 80 is triggered from a first state to a second state. When multivibrator 80 becomes triggered to its second state, it operates clock inhibit circuit 84 which prevents clock 60 from generating any more pulses that would move the electron beam. The monostable multivibrator 80 suitably remains in its second state for 5 microseconds during which time the electron beam can settle to the desired writing position. Then the trailing edge of the output of multivibrator 80 triggers multivibrator 82 from a first state to a second state.

Multivibrator 82 also operates inhibit circuit 84 so that electron beam 22 will be maintained at the desired position. Multivibrator 82 remains in its second state for 20 microseconds, and during this time Z-amplifier 58 is energized from multivibrator 82 whereby cathode-ray tube grid 16 is biased so that the electron beam 22 deposits sufficient charge at the dot location for writing the dot.

Gate 78 receives an input on line 86 from clock 60 as well as on line 76 from scanning sense array 47 inasmuch as monostable multivibrator 80 is AC responsive. Thus, if scanning sense array 47 detected two dots in a row which are to be written, multivibrator 80 might not be triggered when the input at 76 remains the same. Therefore, the additional input on line 86 is provided from clock 60, so that, after a dot is written, AND gate 78 will receive another input and multivibrator 80 will be triggered again, providing line 76 is still up.

FIG. 3 is a schematic diagram illustrating in greater detail the circuitry of multivibrators 80 and 82 as well as clock inhibit circuit 84 and clock 60. Clock 60 comprises an oscillator employing NPN transistors 88 and 90 having their emitters grounded and their collectors connected to a +5 volts via resistors 92 and 94. The transistor bases are also returned to +5 volts by resistors 96 and 98. The collector of each transistor is coupled to the base of the remaining transistor by means of coupling capacitors 100 and 102, whereby oscillation normally takes place. When in the normal oscillating state, the clock 60 provides substantially square pulses through an inverting circuit 112 to clock output lead 114.

Also connected to the oscillator circuit is an inhibit PNP transistor 104 having its emitter grounded and its collector connected to the base of transistor 88 via series connected diodes 106. The collector of transistor 104 is returned to -15 volts through a resistor 108 while the base of transistor 104 is similarly returned to -15 volts through resistor 110. Current normally flows through resistor 96 and diodes 106, which are employed for voltage level adjusting purposes, and resistor 108 to -15 volts. Also, transistor 104 normally draws current through resistor 108. As a result, the voltage at the base of transistor 88 is normally high enough, because of the drop in resistor 108, so that the oscillator is operative. However, if inhibit transistor 104 receives a positive input so that it is driven into a nonconducting state, it will no longer draw current through resistor 108, and as a result the voltage at the base of transistor 88 will drop for causing oscillation to cease in clock 60.

The inhibiting inputs which cause cessation of conduction in transistor 104 are provided via diodes 116 and 118, having their cathodes connected together and coupled to the base of transistor 104 through a voltage level adjusting diode 120. The cathode of diode 120 is connected to the base of transistor 104. Another diode 122 is employed for coupling a signal for inhibiting oscillator operation during the writing of nonalphanumeric plots and the like by means not shown. The anodes of diodes 116 and 118 are coupled to receive the outputs of monostable multivibrators 80 and 82, respectively.

Monostable multivibrator 80 includes a first NPN transistor 124 and a second NPN transistor 126 provided with collector resistors 128 and 130 connected to +5 volts. The emitters of both transistors are grounded. The base of transistor 126 is coupled to the +5 volt terminal via resistor 132, and to the collector of transistor 124 by means of capacitor 134. Transistor 126 normally conducts while transistor 124 is normally nonconducting. A resistor 136 shunted by capacitor 140 connects the collector of transistor 126 to the base of transistor 124.

The monostable multivibrator 80 receives an input from AND gate 78 when an input on line 76 indicates a particular dot in the dot matrix is to be written. A clock pulse will be provided on line 86. The output of AND gate 78 is coupled through capacitor 142 to the anode of a diode 144, the cathode of which is connected to a resistor 146. The remaining terminal of resistor 146 is grounded. Another diode 148 is also connected to the ungrounded end of resistor 146. When AND gate 78 is energized, a pulse is coupled via capacitor 142 causing diode 144 to conduct and provide a voltage across the resistor 146. The latter voltage is coupled via capacitor 150 to the base of transistor 124, causing transistor 124 to conduct. As transistor 124 conducts, its collector voltage lowers, and the change in voltage is coupled by way of capacitor 134 to the base of transistor 126, so transistor 126 is cut off. The rise in voltage on collector of transistor 126 is coupled by capacitor 140 in parallel with resistor 136 to the base of transistor 124 whereby transistor 124 conducts more heavily. The length of the unstable state wherein transistor 124 conducts and transistor 126 is nonconducting is determined primarily by the time constant of the capacitor 134-resistor 132 combination. Eventually, when capacitor 134 charges, transistor 126 will conduct again, and transistor 124 will be cut off. Monostable multivibrator 80 desirably has a time period in its unstable state of approximately 5 microseconds as hereinbefore mentioned.

In the input circuitry for monostable multivibrator 80, diode 152 prevents charge of capacitor 142 by a series of input pulses. Diode 148 may be employed for changing the state of monostable multivibrator 80 in the case of nonalphanumeric plotting by means not shown.

During the continuation of the unstable state of monostable multivibrator 80, the collector of transistor 126 will be relatively more positive than in the stable state, and diodes 116 and 120 will conduct causing transistor 104 to be cut off. Therefore, clock 60 will be inhibited as hereinbefore described, and the repetition of the clock pulses on lead 114 will be discontinued so that the electron beam 22 can settle down to the point where the writing of a dot is desired.

At the conclusion of the unstable state of monostable multivibrator 80, the negative-going transition at the collector of transistor 126 will be coupled through capacitor 154 and coupling resistor 156 to the base of an NPN transistor 158, forming part of a monostable multivibrator 82 together with NPN transistor 160. The emitters of both transistors 158 and 160 are grounded. The collectors of the same transistors are coupled to a +5 volt source of supply via resistors 162 and 164, while a resistor 166 connects the junction between capacitor 154 and resistor 156 to +5 volts. A cross-coupling capacitor 168 is interposed between the collector of transistor 160 and the junction between capacitor 154 and resistor 156. Also a resistor 170 shunted by capacitor 172 is coupled between the collector of transistor 158 and the base of transistor 160.

Monostable multivibrator 82 operates in the same manner as does monostable multivibrator 80, with transistor 158 being normally on. The negative-going excursion at the collector of transistor 126 causes transistor 158 to stop conducting and causes transistor 160 to start conducting. This situation continues for the unstable period of monostable multivibrator 82, which was 20 microseconds in the illustrated embodiment. The relatively negative voltage at the collector of transistor 160 is coupled through resistor 171 to the base of NPN transistor 173, the emitter of which is grounded and the collector of which is coupled to +5 volts via resistor 174. This transistor acts as an inverter and provides a positive-going pulse at the anode of diode 118 for continuing the disablement of clock 60. At the conclusion of the unstable state of monostable multivibrator 82, clock 60 resumes operation, and the electron beam 22 resumes scanning, assuming another dot is not immediately written. FIG. 4 illustrates an alternative embodiment of circuitry for slowing down the movement of the writing means, comprising electron beam 22, when a dot is to be written. In this embodiment, a digital counter 176 is employed for timing successive periods during which the electron beam is designed to settle down, and during which writing takes place. A Z-axis write command is delivered on line 178, e.g. from AND gate 78 in FIG. 1, at a time when scanning sense array 47 detects a dot is to be written. This command sets flip-flop 180 whereby the output of clock 60', normally delivered through AND gate 182 to the Y counter, is inhibited. For the latter purpose, the Q output of flip-flop 180 is provided as one of the inputs to AND gate 182. As a result, movement of the electron beam is halted and the electron beam settles down to a particular location. The Q output of flip-flop 180 is provided through AND gate 184, in combination with the output of clock 60', to counter 176.

The counter 176 is a conventional binary counter suitably formed of a plurality of cascaded flip-flops forming a dividing means inasmuch as the higher order stages of the counter will change state at times corresponding to every 2 nth pulse output from clock 60' wherein n is the number of the cascaded stage of the counter starting from the input thereof. At a time when the electron beam 22 has settled to a particular location, counter 176 is arranged to provide an output, D, e.g. at 5 microseconds after the Z-axis write command is received on line 178. This sets flip-flop 186 which operates the Z-axis amplifier 58', causing the latter to bias the cathode 16 of the cathode-ray tube correctly for enabling electron beam 22. At a later time, counter 176 provides an output, W, e.g., 20 microseconds later, and this output is applied to reset flip-flop 186. Consequently, amplifier 58' and the electron beam will then be disabled. During the intervening period, e.g. 20 microseconds, the dot will be written. At the same time, or at a short time later, counter 176 provides an output for resetting flip-flop 180. The Q output of flip-flop 180 now enables AND gate 182 again, and the output of clock 60' is again applied to the Y counter of the character generator for continuing movement of the electron beam through the raster pattern.

In the foregoing description, mention is frequently made of moving the writing means, e.g. the electron beam, through a dot matrix pattern, and writing with the electron beam at selected dot positions corresponding to elements of a character. However, it will be appreciated by those skilled in the art that in general the electron beam 22 will not be physically present for those dot positions at which writing does not take place. However, the deflection apparatus of the storage tube is set up for each dot position, and should the electron beam be enabled, then a dot will be written. When in the present specification and claims moving of the writing beam is described, through a dot matrix pattern, this should be understood to indicate prospective movement of this electron beam even though the electron beam itself may not at all times be present. Alternatively, it is possible to move the electron beam through the dot matrix pattern in a manner such that some dots, corresponding to a character, are written, while other dots are present at the lower degree of illumination which will not write a character. Thus, the location where a character is about to be written can be determined by the operator of the apparatus. In such instance, other apparatus (not shown) is employed to energize the electron beam for a brief period when it is in the position of each dot on the matrix, the period not being long enough for the storing of information, while being long enough for the dot to be visible temporarily on the screen of the cathode-ray tube. Then, an operator by means of interface and terminal control 44 may locate the dot matrix on the screen via control lines 64 prior to the writing of a character by a keyboard or the like.

Various changes may be made in the apparatus according to the present invention without departing from the spirit and scope thereof. For example, although employment of the bistable cathode ray storage tube is described and is highly advantageous, nevertheless other types of cathode-ray tube devices or other analog display devices also may be suitably employed. For instance, instead of employing a cathode-ray tube having bistable storage properties by virtue of bombardment with flood gun means, the cathode-ray tube may be of a standard type and employ image-refreshing circuitry. Thus, instead of writing the character only once on the face of the cathode-ray tube, it may be written repeatedly at a rate above the observable flicker level. Also electromagnetic rather than electrostatic deflection means may be employed in the cathode-ray tube.