This invention relates to a halftone display, and more particularly to a system for modulating the display duration of a light element to produce a halftone display.
During the early development of television in the latter part of the last century, a picture was generated on the retina of the eye of an observer by the rapid movement and intensity fluctuation of a narrow light beam. Because of persistence of vision of the human eye, a picture was in fact generated although of a very low quality. Basically, such displays require two matching integral parts: addressing and a light element. Addressing must be able to perform XY scanning as well as intensity modulation for a particular light element located at any XY location at the proper writing time. The light element, located in any XY position, must be able to respond to the writing and to effect a display.
As a result of inferior picture quality due to an inadequate addressing scheme and an operable light element, earlier efforts for producing a picture by means of light elements were abandoned in favor of its electron counterpart, the cathode ray tube. However, it is now realized that the cathode-ray tube displays have their limitation especially when producing color pictures. Screen sizes larger than 25-inch diagonal measurement produce a picture that lacks brightness as well as being difficult to handle (too bulky) and smaller than a 21-inch diagonal measurement suffers in resolution on account of tolerance requirements.
To overcome the brightness limitation imposed by the existing phosphers, various schemes have been proposed and developed for large screen display. Basically, these schemes rely on a modulatable-type light valve to be used in conjunction with an intense light source for projection, and for direct or projected viewing. The light elements proposed include light emissive, light reflective, light refractive, light absorbing and light transmitting elements.
In accordance with the present invention, the addressing scheme for such light elements provides a means for modulating the display duration with a video signal. The writing circuit for each light element includes a storage device for extending the short time the video signal is available during a writing time into a much longer time display signal. Display signals of sufficient energy change the light element from one light state to a second light state and maintain the second state at the termination of the writing time. A holding circuit controls the display duration of the light element by slowly removing the display signal from the storage device. The display duration is proportional to the magnitude of the video signal, but in no case longer than one frame time.
In accordance with another aspect of this invention, a display consists of a plurality of light elements with each light element display duration modulated. The light elements are arranged in rows and columns with each connected to an individual addressing scheme consisting of a writing circuit and a holding circuit. Typically, the writing circuit includes a switch for coupling a video signal to a storage capacitor connected across the light element. Such a writing circuit may be evaluated as an equivalent circuit having a time constant short in comparison to the writing time allotted to each element. The holding circuit includes a resistor connected in an RC configuration with the storage capacitor and provides an equivalent circuit having a time constant long in comparison to one frame time (i.e., the time between subsequent addressing of one light element).
To modulate the display duration of a light element, it is an object of this invention to provide a writing and holding circuit for the light element. Another object of this invention is to provide display duration modulation of a light element by means of a writing circuit having a time constant short in comparison to the writing time. A further object of this invention is to provide display duration modulation of a light element by means of a holding circuit having a time constant long in comparison to one frame time. Still another object of this invention is to provide a display of light elements each individually display duration modulated. An additional object of this invention is to provide a display wherein a plurality of light elements are individually cycled between one of two light states by means of a writing and holding circuit.
A more complete understanding of the invention and it advantages will be apparent from the specification and claims and from the accompanying drawings illustrative of the invention.
Referring to the Drawings:
FIG. 1 illustrates a picture-receiving system employing a plurality of light elements coupled to an address scanner in accordance with the present invention;
FIG. 2 is an enlarged view in perspective of a typical bistable light valve that may be employed in the panel illustrated in FIG. 1;
FIG. 3 schematically illustrates the writing equivalent circuit for addressing the individual light elements in the panel illustrated in FIG. 1;
FIG. 4 illustrates schematically the holding equivalent circuit for an individual light element;
FIG. 5 is a schematic of an addressing scheme for an individual light element;
FIG. 6 is a schematic of an addressing scheme for light elements arrange in a row of configuration; and
FIG. 7 is a schematic of an addressing scheme for a matrix of light elements arranged in rows and columns.
Basically, the system illustrated in FIG. 1 consists of a light valve panel 10 and an address scanner 12. The address scanner 12 performs XY scanning of the panel 10 as well as intensity modulation (Z axis control) for each light valve of a panel array. A video receiver 14, coupled to an antenna 16, provides a video signal for the operation of the address scanner 12 in the usual manner of present day video-receiving systems. To generate the visual display for an observer 18 on the panel 10, a light source 20 produces a light beam 22 columnated by a lens 24. A light panel may also be employed as a light source replacing the source 20 and the lens 24. This panel would match the size of the panel 10. By selectively opening and closing each light valve in the panel in accordance with the video signal received by the antenna 16, the observer 18 sees a picture displayed.
Although this description will proceed to emphasize a television system, it is not intended to be so limited. The address scanner 12 may be programmed from any one of many sources other than the receiver 14. For example, a computer can be employed to program the address scanner 12 to produce simulated environmental conditions, such as might be encountered in space travel, to observer 18. 6
In a typical television system in accordance with present day NTSC (National Television Systems Committee) regulations, the panel 10 includes 525 scanning lines, a bandwidth chosen for equal area resolution with an aspect ratio of 4:3, and there would be two interlaced fields in one frame having a frame rate of 30 frames per second. Accordingly, in order to fully utilize the NTSC information, the panel 10 has 525×( 4/3×525)= 367,500 light units (one light valve per unit for a monochrome display, two light valves per unit for a bicolor display, and three light valves per unit for a tricolor display. In terms of light units, the video information received at the antenna 16 comes in at a rate of 0.0906 microseconds per unit (roughly 0.1 microsecond). Thus, for sequential addressing each valve in the panel 10 must be able to be addressed within a writing time of 0.1 microsecond and updated once per frame time. Each frame time has a duration of one-thirtieth second.
Light elements that are used to make up the panel 10 may be any one of those that are classified as having some drive-light linearity, or bistable (on-off) elements, or those light elements which have highly nonlinear characteristics. Included within the group having some drive-light linearity are the E1 cells (electroluminescence cell), light bulbs, and light emitting diodes or the like. The nonlinear light elements include the gas discharge bulb and regional gaseous discharge elements or the like. Although any of these may be used in the panel 10, the invention will be described with reference to a bistable element such as disclosed in the copending application of Ray H. Lee, Ser. No. 713,503, filed Mar. 15, 1968 and assigned to the assignee of the present invention. Such a light element, as shown in FIG. 2, has two chargeable leaf shutters 28, 30 connected to receive a video signal through the address scanner 12. The light valve illustrated further includes a housing having sidewalls 34 and 36 along with front and back walls all of a reflective opaque material either electrically conductive, such as aluminum, or electrically insulating and covered with a conductive coating. An insulating layer (not shown) covers the conductive coating to electrically isolate the housing walls from the shutters. The housing or conductive coating is grounded by means of a lead 38 to provide electrostatic shielding, thereby eliminating electrostatic forces in the housing interior generated externally thereof.
Operationally, the light valve uses the well-known electroscope principle with each of the leaf shutters 28 and 30 considered one plate of a capacitor, with the respect of sidewall 34 or 36 forming the second plate. A charge is uniformly distributed, neglecting edge effects, over the facing surfaces, resulting in a uniformly distributed load on the leaf shutters and setting them in motion against both the inertia and elastic properties of the shutter material. To completely shut off the transmission of light to the observer 18, the leaf shutters 28 and 30 must be deflected to their respective sidewalls. The voltage connected to the valve to deflect the shutters to this position is identified as the "pull-in" voltage, Vp. To return the leaf shutters 28 and 30 to their light transmission position, the voltage to the valve must be reduced to the release voltage, Vr.
Although the valve described in the above-identified patent application has a measure of storage capability, to produce a halftone display with a plurality of such elements requires additional storage. This additional storage capability is provided for by means of an addressing scheme in the address scanner 12 which includes a writing circuit and a holding circuit. These circuits control the display duration of each valve in an array.
This additional storage capability and the writing and holding circuits for each light element make up the address scanner 12. Referring to FIGS. 3 and 4, there is shown an equivalent writing and holding circuit for each of the light elements of the panel 10. A capacitor 42 parallels the light element 40 and provides a means for storing a drive signal to maintain the light element in one of two light states. The writing equivalent circuit of FIG. 3 includes a resistor 44 in series with a signal source 46 coupled to the capacitor 42. A resistor 48 in the holding equivalent circuit shown in FIG. 4, forms an RC circuit configuration with the capacitor 42. The writing equivalent circuit including the resistor 44 and the capacitor 42 has a time constant short in comparison to the writing time, as discussed previously. The holding equivalent circuit including the resistor 48 and the capacitor 42 has a circuit time constant long in comparison to one frame time, again as discussed previously.
If the light element 40 is a bistable device as illustrated in FIG. 2, then it has two steady states, which may be denoted as state 0 and 1. With reference to the light element of FIG. 2, the 0 state corresponds to that condition when the leaf shutters 28 and 30 pass light through the housing, and the 1 state corresponds to that condition when the leaf shutters are attracted to the housing walls and block light from passing therethrough. Starting from a 0 initial state, the voltage across the capacitor 42 increases up to the pull-in voltage Vp at which point the light element 40 changes instantaneously from state 0 to state 1. The element remains in state 1 until the voltage across the capacitor 42 and consequently the element 40, reduces to the release voltage Vr, where Vr is less than or equal to Vp. At the release voltage level, the light element 40 returns instantaneously to the state 0. With a light element of the type illustrated in FIG. 2, and with most light elements, the release voltage Vr will be somewhat less than the pull-in voltage Vp as the result of hysteresis. For elements without hysteresis, the release voltage Vr will equal the pull-in voltage Vp. The system described herein may be used with light elements with or without hysteresis.
Assume that the light element 40 is a purely voltage device that does not affect the operation of the writing or holding circuit. Proceeding from this assumption, it can be shown that the voltage across the capacitor 42 alone determines the light element output. Within a writing time and starting from a discharge condition, the voltage buildup across the capacitor 42 takes place in accordance with the formula:
ec (t)= [ v(w)+vp ](1-e-t/rc ), (1 )
for t less than W,
where e c (t ) = the voltage across the capacitor 42,
r = the resistance value of the resistor 44,
c = the value of the capacitor 42, and V (W) = a constant value of the video signal occurring within a writing time W. Since the writing time W is usually short in comparison with the video content, the assumption is made that V(W) remains constant throughout the writing time. For a writing time W, the voltage across the capacitor 42 will be given by:
e c (W)= [ V(W)+ Vp ](1- e -W/rc ). (2 )
The term [V(W)+Vp in equation (2 ) represent the voltage of the source 46 and includes a bias voltage Vp equal to the pull-in voltage of the light element 40. By design, if the term (W/rc ) can be made large, than the linear transfer of the video signal V(t) can be made large, then the linear transfer of the video signal V(t) to the capacitor will take place in accordance with the approximation:
ec (W) ≅ V(W) + V p (3)
with an error of less than 5 percent with the term (W/rc) is larger than three.
At the termination of the writing time for a particular light element, the holding circuit takes over and the capacitor 42 begins to discharge through the resistor 48. With zero time considered as the start of the holding period, the voltage decay across the capacitor 42 will be in accordance with the expression:
ec (t)= e c (W) e -t/RC, (4)
which will be meaningful only if ec (W) is equal to or greater than Vp. If e c (W), as given by the above expression, is less than Vp, at the end of a writing time, the light element remains at state 0 during the frame time. However, if e c (W) is greater than Vp at the end of a writing time, the light element 40 changes from the initial state 0 to state 1. The display duration for the light element to be in state 1 is given by the formula:
ec (W) e -D/RC = Vr (5)
where D = the display duration, and R represents the resistance value of the resistor 48.
By design, if the term D/Rc is made small the following approximation can be written:
with an error less than 10 percent for D/Rc less than 0.2. This condition will be automatically satisfied by making F/Rc less than 0.2, where F is one frame time.
From equation (7 ) it can be concluded that the display duration of the light element 40 in the state 1 can be made proportional to the magnitude of the video signal. In summary, if the voltage ec (W) is less than or equal to the pull-in voltage Vp, then the light element 40 remains in state 0 at the completion of a writing time and the term D/Rc equals zero. However, if the voltage ec (W) is equal to or greater than Vp, then the light element 40 changes from the initial state 0 to the second state 1 and the display duration will be calculated in accordance with the approximation at (6 ).
For a light element with hysteresis, the change between the two states can be summarized as:
1. state 0, for an increasing ec equal to or greater than 0, but less than or equal to Vp,
2. state 1, for an increasing ec equal to or greater than Vp ;
3. state 1, for a decreasing ec greater than Vr ; and
4. state 0, for a decreasing ec equal or greater than 0, but less than or equal to Vr.
Referring to FIG. 5, there is shown an addressing scheme including a writing and holding circuit for a light element 50. The holding circuit includes a resistor 52 and a capacitor 54 which is connected across the light element 50. The writing circuit includes the capacitor 54 and a resistor 56 in series with a signal source 58. A single-pole single-throw switch 60 controls the addressing of the light element 50. During the writing time, the switch 60 is closed thereby connecting the source 58 to the capacitor 54 through the resistor 56. This circuit has a time constant short enough to ensure that the capacitor 54 will be charged to the level of the signal from a source 58 in the time allotted. During the holding time, the capacitor 54 discharges through the resistor 52. This RC circuit has a time constant long compared to one frame time. The frame time being the time interval between subsequent closings of the switch 60. The display duration of the element 50 is determined by the magnitude of the source voltage, the value of the resistor 52, and the value of the capacitor 54.
Referring to FIG. 6, there is illustrated an addressing scheme for a row of light elements 1, 2...n. Each light element branch includes: a light element 62, a storage capacitor 64 and a holding resistor 66, all in a parallel arrangement. The individual branches are coupled to a voltage source 68 through a writing resistor 70 by means of single-pole single-throw switches 72. During the writing time for branch 1, the switch 72 associated with this branch is closed, thereby charging the capacitor 64 with the voltage from the source 68. For this period, the switches for the remaining branches in the row are open. At the completion of the writing time for branch 1, the switch for branch 2 is closed for the writing time of this branch. This operation continues with one switch being closed at any given time. Between the closing cycle of the switch 72 for a particular branch, the holding circuit of resistor 66 and capacitor 64 controls the duration of the display element 62. The time between subsequent closings of the switch 72 for each branch is one frame time.
Referring to FIG. 7, there is shown an addressing scheme for a matrix of light elements arranged in rows b1, b2...bm and columns a1, a2...an, to be subsequently coupled to a video signal source 74 through a writing resistor 76 by means of single-pole single-throw switches. Each element branch includes a light element 78, a storage capacitor 80, and a holding resistor 82. In addition, each branch includes a diode 84 to eliminate the so called "cross-image effect." Assume the switch in column a1 and the switch in row b1 are closed. Although only one branch is coupled to both terminals of the source 74, all the branches in column a1 and all the branches in row b1 are coupled to one side or the other of the source. The diode 84, however, in all the branches except that one coupled to both terminals of the source 74, will be reverse biased thereby isolating these branches.
In operation, during the writing time for each branch the switches in the appropriate row and column are closed, thereby charging the capacitor 80 to the value of the video signal from the source 74. At the completion of the writing time for a particular branch, the column switch will be open and the next column switch closed. At the completion of one row, both the column and row switch will be opened and the next switch closed. The first column switch is then closed and all the branches in the second row are sequentially connected to the video signal source 74. Between subsequent couplings of a particular branch to the video signal source 74, that branch is considered to be in a holding state and the condition of the light element will be determined by the magnitude of the video signal connected thereto during the writing time and the component values for the resistor 82 and capacitor 80.
While only one embodiment of the invention, together with modifications thereof, has been described in detail herein and shown in the accompanying drawings, it will be evident that various further modifications are possible without departing from the scope of the invention.