BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] This invention relates to a plasma display panel, and more particularly to a plasma display panel that is adaptive for preventing an abnormal discharge occurring from a non-display area to thereby enhance a picture quality and reliability.

[0003] 2. Description of the Related Art

[0004] Generally, a plasma display panel (PDP) excites and radiates a phosphorus material using an ultraviolet ray generated upon discharge of an inactive mixture gas such as He+Xe, Ne+Xe or He+Ne+Xe, to thereby display a picture. Such a PDP is easy to be made into a thin-film and large-dimension type. Also, the PDP is available in the current market and shows a high occupation rate in the large-dimension flat panel market.

[0005] Referring to FIG. 1, a discharge cell of a conventional three-electrode, AC surface-discharge PDP includes a sustain electrode pair having a scan electrode Y and a sustain electrode Z provided on an upper substrate 1 , and an address electrode X provided on a lower substrate 2 . Each of the scan electrode Y and the sustain electrode Z consists of a transparent electrode and a metal bus electrode having a smaller line width than a line width of the transparent and provided at one edge of the transparent electrode.

[0006] On the upper substrate 10 provided with the scan electrode Y and the sustain electrode Z, an upper dielectric layer 6 and an MgO protective layer 7 are disposed. A lower dielectric layer 4 are formed on the lower substrate 2 provided with the address electrode X in such a manner to cover the address electrode X. Barrier ribs are formed vertically above the lower dielectric layer 4 . A phosphorous material 5 is coated onto the surfaces of the lower dielectric layer 4 and the barrier ribs 3 . An inactive mixture gas such as He+Xe, Ne+Xe or He+Ne+Xe is injected into a discharge space provided among the upper substrate 1 , the lower substrate 2 and the barrier ribs 3 .

[0007] Such a PDP makes a time-divisional driving of one frame, which is divided into various sub-fields having a different emission frequency, so as to realize gray levels of a picture. Each sub-field is again divided into an initialization period (or reset period) for initializing the entire field, an address period for selecting a scan line and selecting the cell from the selected scan line and a sustain period for expressing gray levels depending on the discharge frequency. The initialization period is divided into a set-up interval supplied with a rising ramp waveform and a set-down interval supplied with a falling ramp waveform.

[0008] For instance, when it is intended to display a picture of 256 gray levels, a frame interval equal to {fraction (1/60)} second (i.e. 16.67 msec) is divided into 8 sub-fields SF 1 to SF 8 as shown in FIG. 2 . Each of the 8 sub-field SF 1 to SF 8 is divided into an initialization period, an address period and a sustain period as mentioned above. Herein, the initialization period and the address period of each sub-field are equal for each sub-field, whereas the sustain period and the number of sustain pulses assigned thereto are increased at a ratio of 2 ⁿ (wherein n=0, 1, 2, 3, 4, 5, 6 and 7) at each sub-field.

[0009] FIG. 3 shows a driving waveform of the PDP shown in FIG. 1 .

[0010] Referring to FIG. 3 , the PDP is divided into an initialization period for initializing the full field, an address period for selecting a cell, and a sustain period for sustaining a discharge of the selected cell for its driving.

[0011] In the initialization period (or the reset period), a rising ramp waveform Ramp-up is applied to all the scan electrodes Y in a set-up interval SU. A discharge is generated within the cells of the full field with the aid of the rising ramp waveform Ramp-up. By this set-up discharge, positive wall charges are accumulated onto the address electrode X and the sustain electrode Z while negative wall charges are accumulated onto the scan electrode Y.

[0012] In a set-down interval SD, a falling ramp waveform Ramp-down falling from a positive voltage lower than a peak voltage of the rising ramp waveform Ramp-up is simultaneously applied to the scan electrodes Y after the rising ramp waveform Ramp-up was applied. The falling ramp waveform Ramp-down causes a weak erasure discharge within the cells to erase a portion of excessively formed wall charges. Wall charges enough to generate a stable address discharge are uniformly left within the cells with the aid of the set-down discharge. Herein, such a waveform applied during the initialization period may be referred to as “reset pulse”.

[0013] In the address period, a negative scanning pulse scan is sequentially applied to the scan electrodes Y and, at the same time, a positive data pulse data is applied to the address electrodes X in synchronization with the scanning pulse scan. A voltage difference between the scanning pulse scan and the data pulse data is added to a wall voltage generated in the initialization period to thereby generate an address discharge within the cells supplied with the data pulse data. Wall charges enough to cause a discharge when a sustain voltage is applied are formed within the cells selected by the address discharge.

[0014] Meanwhile, a positive direct current voltage Zdc is applied to the sustain electrodes Z during the set-down interval and the address period. The direct current voltage Zdc causes a set-down discharge between the sustain electrode Z and the scan electrode Y, and establishes a voltage difference between the sustain electrode Z and the scan electrode Y or between the sustain electrode Z and the address electrode X so as not to make a strong discharge between the scan electrode Y and the sustain electrode Z in the address period.

[0015] In the sustain period, a sustaining pulse sus is alternately applied to the scan electrodes Y and the sustain electrodes Z. Then, a wall voltage within the cell selected by the address discharge is added to the sustain pulse sus to thereby generate a sustain discharge, that is, a display discharge between the scan electrode Y and the sustain electrode Z whenever the sustain pulse sus is applied.

[0016] Just after the sustain discharge was finished, a ramp waveform ramp-ers having a small pulse width and a low voltage level is applied to the sustain electrode Z to thereby erase wall charges left within the cells of the entire field.

[0017] As shown in FIG. 4 and FIG. 5 , each of an upper non-display area 32 positioned at the upper outside of an active area 31 for displaying a picture and a lower non-display area 33 positioned at the lower outside thereof is provided with a discharge space having the same structure as the discharge cell at the active area 31 . In other words, dummy electrodes UDE and BDE are formed in the same pattern as the sustain electrode pair Y and Z within the active area 31 . Accordingly, each of the upper non-display area 32 and the lower non-display area 33 is provided with the address electrode X and the dummy electrodes UDE and BDE, and is provided with the dielectric layers 4 and 6 in such a manner to cover the electrodes X, UDE and BDE. The dummy electrodes UDE and BDE provided at each of the upper non-display area 32 and the lower non-display area 33 causes a discharge at the non-display area upon aging process, to thereby stabilize discharge characteristics of discharge cells at the first horizontal line and the nth horizontal line of the active area 31 in the same condition as other discharge cells of the active area 31 . To this end, a voltage capable of causing a discharge upon aging process is applied to the dummy electrodes UDE and BDE, and a voltage is not applied thereto after the aging process.

[0018] However, the conventional PDP has a problem in that a discharge is generated accidentally from the upper non-display area 32 and the lower non-display area 33 . Such a discharge is defined by “abnormal discharge”. More specifically, if a discharge, such as an initialization discharge, address discharge or a sustain discharge, etc., occurs upon driving of the PDP, then space charges generated by such a discharge are accumulated onto dielectric layers of the upper non-display area 32 and the lower non-display area 33 . For instance, as shown in FIG. 6 , upon address discharge, a negative scanning pulse scan is sequentially to the scan electrodes Y 1 to Yn to thereby move positive space charges 52 into the lower non-display area 33 and, at the same time, move negative space charges 51 into the upper non-display area 32 . The space charges 51 and 52 having been moved into the non-display areas 32 and 33 in this manner are accumulated within the non-display areas 32 and 33 and onto the dielectric layers 4 and 6 covering the electrodes at the active area 31 adjacent to the non-display areas 32 and 33 . If a wall voltage 61 of the discharge space raised by wall charges accumulated onto the non-display areas 32 and 33 and the active area 31 adjacent thereto becomes more than a voltage Vf enough to cause a discharge, then an abnormal discharge is generated accidentally within the non-display areas 32 and 33 and the active area 31 adjacent thereto. As shown in FIG. 8 , such an abnormal discharge allows a visible light 71 generated from the non-display areas 32 and 33 and the upper/lower edge of the active area 31 adjacent thereto to be viewed by an observer. In the more serious case, due to such a normal discharge, the PDP cannot a picture for several seconds and further damages the discharge cell. Also, the PDP has a problem in that its reliability is deteriorated due to a circuit break phenomenon caused by the abnormal discharge in which a very large current flows suddenly through a scan driving circuit mounted at the scan driver and an address driving circuit mounted at the address driver to burn each circuit chip. Such a normal discharge becomes more serious as the brightness or the resolution of the PDP is higher.

[0019] In order to overcome the normal discharge, there has been suggested a scheme that applies a reset pulse applied in the initialization period to the dummy electrode upon driving of the PDP to thereby discharge charges flowing into the dummy electrode and erase them continuously. However, such a conventional scheme fails to completely eliminate an abnormal discharge generated at the PDP.

SUMMARY OF THE INVENTION

[0020] Accordingly, it is an object of the present invention to provide a plasma display panel that is adaptive for preventing an abnormal discharge occurring from a non-display area to thereby enhance a picture quality and a reliability.

[0021] In order to achieve these and other objects of the invention, a plasma display panel according to one embodiment of the present invention has an active area on which a picture is displayed and a non-display area positioned at the outside of the active area, wherein dummy electrodes positioned within said non-display area have a different gap between electrodes from sustain electrode pairs positioned within said active area.

[0022] In the plasma display panel, the gap between electrodes of said dummy electrodes is narrower than that of said sustain electrode pairs.

[0023] In the plasma display panel, said dummy electrodes are formed from a transparent electrode and a metal electrode.

[0024] In the plasma display panel, said dummy electrodes have a narrower electrode width than said sustain electrode pairs.

[0025] In the plasma display panel, said transparent electrodes are formed from a non-conductive metal electrode.

[0026] In the plasma display panel, said transparent electrodes are formed from a conductive metal.

[0027] In the plasma display panel, said transparent electrodes are formed from a resin material.

[0028] In the plasma display panel, said dummy electrodes have a different electrode width from said sustain electrode pairs.

[0029] A plasma display panel has an active area on which a picture is displayed and a non-display area positioned at the outside of the active area, wherein dummy electrodes positioned within said non-display area include metal electrode.