DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0026] FIGS. 1A to 1 E are cross-sectional views showing the steps of a process of producing a semiconductor device according to a first embodiment of the present invention. A plurality of device forming regions corresponding to a plurality of semiconductor chips are provided on a surface of a semiconductor wafer W (a semiconductor substrate), and the plurality of device forming regions are separated by a scribe line region L. The scribe line region L is a region along a cutting line in a case where the semiconductor chips are cut out of the wafer W by a dicing saw.

[0027] In the device forming region corresponding to each of the semiconductor chips, a pad P for electrical connection to another solid device (a semiconductor chip or a wiring board, etc.) is provided on an active surface Wa. The pad P is exposed from an opening 11 a formed in a first polyimide film 11 (a first insulating film) with which the active surface Wa is coated. The pad P is an exposed part of an internal wiring electrically connected to an internal circuit, comprising functional devices such as transistors and resistors, formed on the active surface.

[0028] A thin conductive film 21 a is formed, as shown in FIG. 1 B, from a state shown in FIG. 1A where the first polyimide film 11 is formed on the active surface Wa. A process reported in “Basic study for Direct Metallization Using Surface Modification of Polyimide and Epoxy Resin” (by Nawafune et. al., Journal of JIEP (Japan Institute of Electronics Packaging), Vol. 2, No. 5 (1999), pp 390-393), “Production of Co/Pt Multi-layered Film Utilizing Surface Modification of Polyimide Resin and Magnetic Properties” (by Tamura et. al., the substance of the 99-th Conference of The Surface Finishing Society of Japan (1999), pp 35-36) , etc. can be applied to the formation of the thin conductive film 21 a.

[0029] Specifically, the surface of the first polyimide film 11 and the inner wall surface of the opening 11 a are subjected to surface modification processing. The surface modification processing is performed specifically by immersing in a potassium hydroxide solution the semiconductor wafer W in the state shown in FIG. 1A where the first polyimide film 11 is formed, cleaving an imide ring in a surface layer portion of the first polyimide film 11 , and introducing a carboxyl group into the surface of the first polyimide film 11 .

[0030] The thin conductive film 21 a can be thus formed with good adhesive properties by an ion-exchange reaction on the surface of the first polyimide film 11 which has been subjected to the surface modification processing. The ion-exchange reaction can be performed by immersing in a solution containing metal ions the semiconductor wafer W in a state where the first polyimide film 11 has been subjected to the surface modification processing. If the semiconductor wafer W is immersed in a copper sulfate solution, for example, a copper thin film serving as the thin conductive film 21 a can be provided on the surface of the first polyimide film 11 , the inner wall surface of the opening 11 a , and the surface of the pad P.

[0031] After the thin conductive film 21 a is thus formed on the surface of the first polyimide film 11 , a thick conductive film 21 is formed, as shown in FIG. 1 C, by electroplating for feeding power using the thin conductive film 21 a . That is, the conductive film 21 which is made low-resistive is formed on the surface of the first polyimide film 11 by thickening the thin conductive film 21 a using the electroplating. The power can be fed at the time of the electroplating by connecting the thin conductive film 21 a in the scribe line region L to an electrode.

[0032] Since the thin conductive film 21 a can be thickened in a short time by the electroplating, the formation of the conductive film 21 formed through the formation of the thin conductive film 21 a by the ion-exchange reaction and the thickening thereof can be achieved in a short-time step.

[0033] As shown in FIG. 1 D, the pattern of a resist film 15 is formed on the surface of the first polyimide film 11 . Prior to forming the resist film 15 , an insulating film 17 may be buried in a depression 25 formed in a portion, corresponding to the opening 11 a, in the thickened conductive film 21 a.

[0034] The conductive film 21 is then patterned by etching using the resist film 15 as a mask. Thereafter, as shown in FIG. 1 E, the resist film 15 is stripped, and a second polyimide film 12 (a second insulating film) is formed such that a surface of the conductive film 21 and the surface of the first polyimide film 11 exposed by etching away an unnecessary portion of the conductive film 21 are coated therewith. An opening 12 a is formed at a position, avoiding the opening 11 a in the first polyimide film 11 , in the second polyimide film 12 . A bump B is provided in the opening 12 a.

[0035] If an opening 11 b is formed in the first polyimide film 11 in the scribe line region L, the bump B can be quickly formed by the electroplating performed by feeding power from the conductive film 21 exposed from the opening 11 b. The bump B is formed in the shape of a thick film filling in the opening 12 a and projecting from a surface of the second polyimide film 12 in a quick step by the electroplating.

[0036] Thereafter, the wafer W is cut by a dicing saw along the scribe line region L, thereby obtaining respective pieces of semiconductor chips.

[0037] As described in the foregoing, according to the present embodiment, the thin conductive film 21 a is formed by the surface modification processing for the first polyimide film 11 and the ion-exchange reaction for the surface of the first polyimide film 11 after the surface modification processing. The conductive film 21 which is made low-resistive can be provided on the first polyimide film 11 by thickening the thin conductive film 21 a . So long time is not required to form the thin conductive film 21 a by the ion-exchange reaction. Further, the thin conductive film 21 a can be quickly thickened by the electroplating. Consequently, the productivity of the semiconductor chip can be improved.

[0038] The semiconductor chip produced in accordance with the process according to the present embodiment has the bump B serving as a connecting member to another solid device at a position shifted from the opening 11 a formed in the first polyimide film 11 , as shown in FIG. 1E . As a result, the first polyimide film 11 is interposed between the bump B and the active surface Wa of the wafer W serving as the semiconductor substrate. Such a structure is advantageous that when it is joined to another solid device, pressure received by the bump B is not directly exerted on the semiconductor substrate (the wafer W). Further, the first and second polyimide films 11 and 12 are interposed between the other solid device and the active surface Wa of the semiconductor chip. Consequently, the difference in the coefficient of thermal expansion between the solid device and the semiconductor chip can be satisfactorily absorbed. Therefore, stress caused by the difference in the coefficient of the thermal expansion can be effectively prevented from being exerted on the semiconductor substrate.

[0039] FIG. 2 is an illustrative sectional view for explaining a process of producing a semiconductor device according to a second embodiment of the present invention. In FIG. 2 , portions corresponding to the portions shown in FIGS. 1A to 1 E, described above, are assigned the same reference numerals as those shown in FIGS. 1A to 1 E.

[0040] In the second embodiment, a multi-layered wiring structure is formed on a wafer W. That is, a second conductive film 22 is formed on a surface of a second polyimide film 12 . The second conductive film 22 is joined to a first conductive film 21 at the bottom of an opening 12 a formed in the second polyimide film 12 . The second conductive film 22 rises along an inner wall surface of the opening 12 a , and further extends to the surface of the second polyimide film 12 .

[0041] The second conductive film 22 can be formed by the same process as that forming the first conductive film 21 . That is, surface modification processing for the second polyimide film 12 is performed in the same manner as surface modification processing for a first polyimide film 11 . A thin conductive film is formed by utilizing an ion-exchange reaction on the surface of the second polyimide film 12 which has been thus subjected to the surface modification processing. The thin conductive film is brought into contact with the first conductive film 21 in the opening 12 a . Accordingly, power is fed from the first conductive film 21 to thicken the thin conductive film formed on the second polyimide film 12 by electroplating, thereby making it possible to provide the thickened conductive film 22 . The second conductive film 22 has a depression 26 at a position corresponding to the opening 12 a . However, the depression 26 is filled with an insulating material 27 , as required.

[0042] The second conductive film 22 is patterned, as required. Thereafter, an insulating film 13 (e.g., a polyimide film) is formed so as to cover the second conductive film 22 and the surface of the second polyimide film 12 exposed by patterning the second conductive film 22 . An opening 13 a is formed at a position, avoiding the opening 12 a , in the insulating film 13 . A bump B is buried in the opening 13 a . If an opening 13 b is formed in the insulating film 13 in a scribe line region L, the bump B can be formed by the electroplating performed by power feeding through the first conductive film 21 and the second conductive film 22 in the scribe line region L.

[0043] As described in the foregoing, according to the second embodiment, a wiring having a two-layer structure can be provided on the wafer W by forming the thin conductive film using the surface modification processing and the ion-exchange reaction for the polyimide films and thickening the thin conductive film using the electroplating.

[0044] Although description has been made of the two embodiments of the present invention, the present invention can be embodied in another mode. Although in the above-mentioned first and second embodiments, polyimide resin is used as a material for the first and second insulating films, for example, epoxy resin can be also used. In this case, it is preferable that surface modification processing is processing for immersing in a sulfuric acid solution a wafer having a film composed of epoxy resin formed therein to introduce a sulfo group into a surface of the epoxy resin film. The sulfo group is replaced with metal ions by ion-exchange resin, thereby making it possible to form a thin conductive film on the surface of the epoxy resin film.

[0045] Although in the above-mentioned first and second embodiments, the depressions 25 and 26 in the first and second conductive films 21 and 22 are respectively filled with the insulating materials 17 and 27 , the filling with the insulating materials 17 and 27 may be omitted.

[0046] A metal material having conductive properties, for example, cobalt or nickel can be used in addition to copper as a material for the conductive films 21 and 22 . The same is true for a material for the bump B. However, the same material as that for the conductive films 21 and 22 is preferably used as the material for the bump B.

[0047] Although in the above-mentioned second embodiment, description has been made of an example in which the wiring having a two-layer structure is provided on the active surface Wa of the wafer W, a multi-layered wiring structure comprising three or more layers can be also formed in the same manner.

[0048] Although in the above-mentioned first and second embodiments, description has been made of an example in which both the first and second insulating films are composed of polyimide resin, they may be composed of epoxy resin, as described above, and they may be respectively composed of different insulating resin materials.

[0049] Although the present invention has been described and illustrated in detail, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, the spirit and scope of the present invention being limited only by the terms of the appended claims.

[0050] The application corresponds to Japanese Patent Application Serial No. 2000-89174 filed with the Japanese Patent Office on Mar. 28, 2000, the disclosure of which is incorporated herein by reference.